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nand: increase chip_delay in mv kirkwood nand driver

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The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay.
The Data Transfer from Cell to Register is >= 35us. Other Vendors
and older chips normally use >= 25us. To have enough margin 40us
is selected.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Stefan Bigler 2011-07-18 15:25:11 +02:00 committed by Scott Wood
parent 7b8ffea2ac
commit 156800905a
1 changed files with 1 additions and 1 deletions
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2
drivers/mtd/nand/kirkwood_nand.c
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@ -76,7 +76,7 @@ int board_nand_init(struct nand_chip *nand)
nand->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING;
nand->ecc.mode = NAND_ECC_SOFT;
nand->cmd_ctrl = kw_nand_hwcontrol;
nand->chip_delay = 30;
nand->chip_delay = 40;
nand->select_chip = kw_nand_select_chip;
return 0;
}