Commit graph

8674 commits

Author SHA1 Message Date
Purna Chandra Mandal
46c9d938ca drivers: net: phy: add SMSC LAN8740 Phy support.
Add SMSC LAN8740 Phy support required for PIC32MZDA devices.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-02-01 22:14:02 +01:00
Andrei Pistirica
102142c9e0 drivers: mmc: add driver for Microchip PIC32 SDHCI controller.
This driver implements platform specific glue and fixups for
PIC32 internal SDHCI controller.

Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com>
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01 22:14:01 +01:00
Purna Chandra Mandal
9ffa7a35ef drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).

Signed-off-by: Paul Thacker <paul.thacker@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01 22:14:01 +01:00
Paul Thacker
9e160ee823 drivers: serial: add driver for Microchip PIC32 UART controller.
This adds PIC32 UART controller support based on driver model.

Signed-off-by: Paul Thacker <paul.thacker@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01 22:14:00 +01:00
Purna Chandra Mandal
386d934e0b drivers: gpio: add driver for Microchip PIC32 GPIO controller.
In PIC32 GPIO controller is part of PIC32 pin controller.
PIC32 has ten independently programmable ports and each with multiple pins.
Each of these pins can be configured and used as GPIO, provided they
are not in use for other peripherals.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01 22:14:00 +01:00
Purna Chandra Mandal
5f266c60bf drivers: pinctrl: Add pinctrl driver for Microchip PIC32.
In PIC32 pin-controller is a combined gpio-controller, pin-mux and
pin-config module. Remappable peripherals are assigned pins through
per-pin based muxing logic. And pin configuration are performed on
specific port registers which are shared along with gpio controller.
Note, non-remappable peripherals have default pins assigned thus
require no muxing.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01 22:14:00 +01:00
Purna Chandra Mandal
a0e7908326 drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.
PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers
and dividers capable of supplying clock to various controllers
on or off-chip.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01 22:14:00 +01:00
Prabhakar Kushwaha
a2a4dc565d driver: net: fsl-mc: Update print to reflect correct string
Update printf with dpbp_exit to match with previous function call.

Signed-off-by: Itai Katz <itai.katz@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-01 09:11:11 -08:00
Prabhakar Kushwaha
5373b204df driver: net: fsl-mc: Memset dprc_cfg before configuring
All fields of struct dprc_cfg are not being configured while creating
child container. "Not" configured fields are assumed to be 0.

So memset dprc_cfg before configuring the fields.

Signed-off-by: Itai Katz <itai.katz@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-01 09:11:11 -08:00
Simon Glass
8de536c27c video: sandbox: Allow selection of font size and console name
For testing it is useful to be able to select the font size and the console
driver for sandbox. Add this information to platform data and copy it to
the video device when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:57:30 +01:00
Simon Glass
826f35f9b5 video: Allow selection of the driver and font size
Provide a way for the video console driver to be selected. This is
controlled by the video driver's private data. This can be set up when the
driver is probed so that it is ready for the video_post_probe() method.

The font size is provided as well. The console driver may or may not support
this depending on its capability.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-01-30 10:57:20 +01:00
Simon Glass
c0603b98d4 video: Add the Cantoraone decorative font
This font is a little more ornate than normal. Example uses are on security
screens where a feeling of formality is required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:56:34 +01:00
Simon Glass
7ad4e30dec video: Add the Rufscript handwriting font
This can be used when a a friendly 'hand-writing' font is needed. It helps
to make the device feel familiar.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:56:22 +01:00
Simon Glass
c43c43cd48 video: Add the AnkaCoder mono-spaced font
This can be used when a mono-space font is needed, but the console font
is too small (such as with high-DPI displays).

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:56:09 +01:00
Simon Glass
84b4791ada video: Add the Nimbus sans font
This provides a good-looking font for user prompts.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:55:57 +01:00
Simon Glass
a29b012037 video: Add a console driver that uses TrueType fonts
The existing 8x16 font is adequate for most purposes. It is small and fast.
However for boot screens where information must be presented to the user,
the console font is not ideal. Common requirements are larger and
better-looking fonts.

This console driver can use TrueType fonts built into U-Boot, and render
them at any size. This can be used in scripts to place text as needed on
the display.

This driver is not really designed to operate with the command line. Much
of U-Boot expects a fixed-width font. But to keep things working correctly,
rudimentary support for the console is provided. The main missing feature is
support for command-line editing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-01-30 10:55:47 +01:00
Simon Glass
7b9f7e445e video: Provide a backspace method
With proportional fonts the vidconsole uclass cannot itself erase the
previous character. Provide an optional method so that the driver can
handle this operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:55:37 +01:00
Simon Glass
58c733a70f video: Provide a signal when a new console line is started
When we start a new line (due to the user pressing return), signal this to
the driver so that it can flush its buffer of character positions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:55:27 +01:00
Simon Glass
c5b77d01d1 video: Provide a left margin for the text console
Allow the left margin to be set so that text does not have to be right up
against the left side. On some panels this makes it hard to read.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:55:15 +01:00
Simon Glass
5508f10ac9 video: Handle the 'bell' character
This can be sent when to many characters are entered. Make sure it is
ignored and does not cause a character to be displayed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 10:55:02 +01:00
Simon Glass
f266178698 video: Use fractional units for X coordinates
With anti-aliased fonts we need a more fine-grained horizontal position
than a single pixel. Characters can be positioned to start part-way through
a pixel, with anti-aliasing (greyscale edges) taking care of the visual
effect.

To cope with this, use fractional units (1/256 pixel) for horizontal
positions in the text console.

Signed-off-by: Simon Glass <sjg@chromium.org>
[agust: rebased]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-01-30 10:53:26 +01:00
Simon Glass
6e42e25196 video kconfig console_normal
Signed-off-by: Simon Glass <sjg@chromium.org>
[agust: rebased on current master]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-01-30 10:03:01 +01:00
Simon Glass
8340ef6278 video: Add stb TrueType font renderer
This is a header file which provides a fairly light-weight TrueType
rendering implementation. It is pulled from http://nothings.org/. The code
style does not comply with U-Boot but I think it is best to leave alone to
permit the source to be synced later if needed.

The only change is to fix a reference to fabs() which should route through
a macro to allow U-Boot to provide its own version.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-30 09:35:58 +01:00
Tom Rini
8a36287a01 Merge git://git.denx.de/u-boot-dm 2016-01-29 13:47:38 -05:00
Stephen Warren
e578b92cdb Implement "pci enum" command for CONFIG_DM_PCI
With CONFIG_DM_PCI enabled, PCI buses are not enumerated at boot, as they
are without that config option enabled. No command exists to enumerate the
PCI buses. Hence, unless some board-specific code causes PCI enumeration,
PCI-based Ethernet devices are not detected, and network access is not
available.

This patch implements "pci enum" in the CONFIG_DM_PCI case, thus giving a
mechanism whereby PCI can be enumerated.

do_pci()'s handling of case 'e' is moved into a single location before the
dev variable is assigned, in order to skip calculation of dev. The enum
sub-command doesn't need the dev value, and skipping its calculation
avoids an irrelevant error being printed.

Using a command to initialize PCI like this has a disadvantage relative to
enumerating PCI at boot. In particular, Ethernet devices are not probed
during PCI enumeration, but only when used. This defers setting variables
such as ethact, ethaddr, etc. until the first network-related command is
executed. Hopefully this will not cause further issues. Perhaps in the
long term, we need a "net start/enum" command too?

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-28 21:01:23 -07:00
Simon Glass
c6db965f67 dm: Remove device_probe_child()
This function is not used as the use case for it did not eventuate. Remove
it to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-28 21:01:23 -07:00
Christophe Ricard
b75fdc11eb tpm: st33zp24: Add tpm st33zp24 spi support
Add support for TPM ST33ZP24 spi.

The ST33ZP24 does have a spi interface.
The transport protocol is proprietary.

For spi we are relying only on DM_SPI.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
2016-01-28 21:01:22 -07:00
Christophe Ricard
3aa74088d4 tpm: st33zp24: Add tpm st33zp24 support with i2c
Add support for TPM ST33ZP24 family with i2c.

For i2c we are relying only on DM_I2C.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
2016-01-28 21:01:22 -07:00
Christophe Ricard
1259dcd79c tpm: Rename tpm_tis_infineon.h to tpm_tis.h and move infineon specific stuff in tpm_infineon.c
I2C protocol is not standardize for TPM 1.2.
TIS prococol is define by the Trusted Computing Group and potentially
available on several TPMs.

tpm_tis_infineon.h header is not generic enough.

Rename tpm_tis_infineon.h to tpm_tis.h and move infineon specific
defines/variables to tpm_tis_infineon.c

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
2016-01-28 21:01:22 -07:00
Christophe Ricard
ca5bc1bc10 tpm: tpm_tis_lpc: fix typo
TPM_TIS_LPC is connected to the LPC bus, not I2C.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
2016-01-28 21:01:22 -07:00
Tom Rini
82d72a1b99 Merge branch 'master' of git://git.denx.de/u-boot-net 2016-01-28 18:42:10 -05:00
Shaohui Xie
d8877e6f8c net: phy: implements probe for Cortina phy
Cortina phy cannot support soft reset, this commit implements probe
for Cortina PHY to tell phylib to skip phy soft reset by setting
PHY_FLAG_BROKEN_RESET in flags.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 13:20:31 -06:00
Shaohui Xie
ddcd1f3084 net: phy: introduce a quirk PHY_FLAG_BROKEN_RESET
Current driver always performs a phy soft reset when connecting the phy
device, but soft reset is not always supported by a phy device, so
introduce a quirk PHY_FLAG_BROKEN_RESET to let such a phy device to skip
soft reset. This commit uses 'flags' of phy device structure to store the
quirk.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 13:20:30 -06:00
Dinh Nguyen
ff7bd212cb net: phy: micrel: fix divisor value for KSZ9031 phy skew
The picoseconds to register value divisor(ps_to_regval) should be 60 and not
200. Linux has KSZ9031_PS_TO_REG defined to be 60 as well. 60 is the correct
divisor because the 4-bit skew values are defined from 0x0000(-420ps) to
0xffff(480ps), increments of 60.

For example, a DTS skew value of 420, represents 0ps delay, which should be 0x7.
With the previous divisor of 200, it would result in 0x2, which represents a
-300ps delay.

With this patch, ethernet on the SoCFPGA DE0 Atlas is now able to work with
1Gb ethernet.

References:
http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf -> page 26

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 13:20:30 -06:00
Alexandre Messier
1f9e672c79 net: phy: Use 'autoneg' flag from phydev
Use the 'autoneg' flag available in phydev when checking if
autoneg is in use.

The previous implementation was checking directly in the PHY
if autoneg was supported. Some PHYs will report that autoneg
is supported, even when it is disabled. Thus it is not possible
to use that bit to determine if autoneg is currently in use or
not.

Signed-off-by: Alexandre Messier <amessier@tycoint.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 13:20:29 -06:00
Alexandre Messier
53b0c38c7a net: phy: Set ANRESTART in setup_forced
When configuring a PHY in fixed (forced) link mode, in order for
the changes to be applied, either one of these conditions must
be triggered:
	1- PHY is reset
	2- Autoneg is restarted
	3- PHY transitions from power-down to power-up

Neither of these is currently done, so effectively the fixed link
configuration is not applied in the PHY.

Fix this by setting the Autoneg restart bit.

Signed-off-by: Alexandre Messier <amessier@tycoint.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 13:20:28 -06:00
Alexandre Messier
79e3efd5e5 net: phy: micrel: Disable B_CAST on config
Micrel PHYs KSZ8021/31 and KSZ8081 have a feature where MDIO address 0
is considered as a broadcast address; the PHY will respond even if it
is not its configured (pinstrapped) address. This feature is enabled
by default.

The Linux kernel disables that feature at initialisation, but not
before it probes the MDIO bus. This causes an issue, because a PHY
at address 3 will be discovered at addresses 0 and 3, but will then
only respond at address 3. Because Linux attaches the first PHY it
discovers on 'eth0', it will attach the PHY from address 0, which
will never answer again.

Fix the issue by disabling the broadcast feature in U-Boot, before
Linux is started.

Signed-off-by: Alexandre Messier <amessier@tycoint.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 13:20:21 -06:00
Simon Glass
dfa71e9fcb tegra: Report errors from PCI init
This function can fail, so be sure to report any errors that occur.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:32:44 -06:00
Alexey Brodkin
6968ec9216 net/designware: add support of max-speed device tree property
This property allows to specify fastest connection mode supported by
the MAC (as opposed to features of the phy).

There are situations when phy may handle faster modes than the
MAC (or even it's particular implementation or even due to CPU being too
slow).

This property is a standard one in Linux kernel these days and some
boards do already use it in their device tree descriptions.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
cc: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:32:44 -06:00
Alexey Brodkin
b884c3fe63 net/designware: do explicit port selection for 1Gb mode
Current implementation only sets "port select" bit for non-1Gb mode.
That works fine if GMAC has just exited reset state but we may as well
change connection mode in runtime. Then we'll need to reprogram GMAC for
that new mode of operation and if previous mode was 10 or 100 Mb and new
one is 1 Gb we'll need to reset port mode bit.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
cc: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:32:43 -06:00
Alexey Brodkin
b18acb0a11 drivers/net/phy: introduce phy_set_supported()
This new function will allow MAC drivers to override supported
capabilities of the phy. It is required when MAC cannot handle all
speeds supported by phy.

For example phy supports up-to 1Gb connections while MAC may only work
in modes up to 100 or even 10 Mbit/sec.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:32:42 -06:00
Sascha Hauer
44bc317487 net: phy: genphy: Allow overwriting features
of_set_phy_supported allows overwiting hardware capabilities of
a phy with values from the devicetree. This does not work with
the genphy driver though because the genphys config_init function
will overwrite all values adjusted by of_set_phy_supported. Fix
this by initialising the genphy features in the phy_driver struct
and in config_init just limit the features to the ones the hardware
can actually support. The resulting features are a subset of the
devicetree specified features and the hardware features.

This is a copy of the patch from Linux kernel, see
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c242a47238fa2a6a54af8a16e62b54e6e031d4bc

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:32:41 -06:00
Florian Fainelli
bbdcaff12a net: phy: ensure Gigabit features are masked off if requested
When a Gigabit PHY device is connected to a 10/100Mbits capable Ethernet
MAC, the driver will restrict the phydev->supported modes to mask off
Gigabit. If the Gigabit PHY comes out of reset with the Gigabit features
set by default in MII_CTRL1000, it will keep advertising these feature,
so by the time we call genphy_config_advert(), the condition on
phydev->supported having the Gigabit features on is false, and we do not
update MII_CTRL1000 with updated values, and we keep advertising Gigabit
features, eventually configuring the PHY for Gigabit whilst the Ethernet
MAC does not support that.

This patches fixes the problem by ensuring that the Gigabit feature bits
are always cleared in MII_CTRL1000, if the PHY happens to be a Gigabit
PHY, and then, if Gigabit features are supported, setting those and
updating MII_CTRL1000 accordingly.

This is a copy of patch from Linux kernel, see
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=5273e3a5ca94fbeb8e07d31203069220d5e682aa

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:31:30 -06:00
Bin Meng
a1c76c1508 net: tsec: Use priv->tbiaddr to initialize TBI PHY address
Add a new member 'tbiaddr' to tsec_private struct. For non-DM driver,
it is initialized as CONFIG_SYS_TBIPA_VALUE, but for DM driver, we
can get this from device tree. Update the bindings doc as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:23:19 -06:00
Bin Meng
9a1d6af55e net: tsec: Add driver model ethernet support
This adds driver model support to Freescale TSEC ethernet driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:23:15 -06:00
Bin Meng
56a27a1e6c net: tsec: Use tsec_private pointer as the parameter for internal routines
For internal routines like redundant_init(), startup_tsec() and
init_phy(), change to use tsec_private pointer as the parameter.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:23:07 -06:00
Bin Meng
8ba50176fc net: tsec: Adjust orders to avoid forward declaration of tsec_send()
Adjust static functions in a proper order so that forward declaration
of tsec_send() can be avoided.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:23:03 -06:00
Bin Meng
e677da9723 net: tsec: Move rxbd and txbd to struct tsec_private
rxbd and txbd are declared static with 8 byte alignment requirement,
but they can be put into struct tsec_private as well and are natually
aligned to 8 byte.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:59 -06:00
Bin Meng
362b123f47 net: tsec: Move rx_idx and tx_idx to struct tsec_private
At present rx_idx and tx_idx are declared as static variables
in the driver codes. To support multiple interfaces, move it to
struct tsec_private.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:55 -06:00
Bin Meng
9872b736f9 net: tsec: fsl_mdio: Fix several cosmetic issues
Clean up the tsec and fsl_mdio driver codes a little bit, by:
- Fix misuse of tab and space here and there
- Use correct multi-line comment format
- Replace license identifier to GPL-2.0+

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:49 -06:00
Codrin Ciubotariu
aae0e68909 drivers: net: vsc9953: Add LAG support
You can now configure LAG on VSC9953's ports using the command:
ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>}

A port must belong to a single LAG. By default, a port
belongs to a LAG equal to the port's number.

For each frame, a hash will be calculated based on
Source/Destination MAC addresses, Source/Destination IP(v4/v6)
addresses, Source/Destination ports. This hash will be used to
select a single egress port from LAG. This also assures
that frames from the same flow will always have the
same egress port.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:19 -06:00
Codrin Ciubotariu
ba389e65e5 drivers: net: vsc9953: Fix FDB aging time
By default, the aging period is set to 0, so the dynamic
FDB entries are never removed. This patch sets the aging
time to 300 seconds.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:08 -06:00
Stefan Agner
a058052c35 net: phy: do not read configuration register on reset
When doing a software reset, the reset flag should be written without
other bits set. Writing the current state will lead to restoring the
state of the PHY (e.g. Powerdown), which is not what is expected from
a software reset.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Michael Welling <mwelling@ieee.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:00 -06:00
Tom Rini
4b5a4a0535 Merge branch 'master' of git://git.denx.de/u-boot-x86 2016-01-28 10:07:22 -05:00
Stefan Roese
85056932f2 misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-28 13:53:30 +08:00
Tom Rini
cd85bec36d Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2016-01-27 15:05:36 -05:00
Gong Qianyu
940d2b89bf spi: fsl_qspi: Fix qspi_op_rdsr memcpy issue
In current driver, we always copy 4 bytes to the dest memory.
Actually the dest memory may be shorter than 4 bytes.
Add an argument to indicate the dest memory length.
Avoid writing memory outside of the bounds.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:28:31 -08:00
Gong Qianyu
5207014deb spi: fsl_qspi: Fix qspi_op_rdid memcpy issue
In current driver everytime we memcpy 4 bytes to the dest memory
regardless of the remaining length.
This patch adds checking the remaining length before memcpy.
If the length is shorter than 4 bytes, memcpy the actual length of data
to the dest memory.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:28:04 -08:00
Gong Qianyu
c2a4cb17b4 spi: fsl_qspi: fix compile warning for 64-bit platform
This patch fixes the following compile warning:
drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
drivers/spi/fsl_qspi.c:937:15:
  warning: cast to pointer from integer of different size
					 [-Wint-to-pointer-cast]
  priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
               ^
Just make the cast explicit.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:27:49 -08:00
Yangbo Lu
25503443ee mmc: fsl_esdhc: set Abort command type for CMD12
According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need
to be set an Abort command type when they are sent. So, we remove all
chip-specific #ifdefs and make it available for all platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:13 -08:00
Yangbo Lu
e978a31b63 mmc: fsl_esdhc: increase data transaction timeout to 500ms
The MMC spec says "It is strongly recommended for hosts to implement
more than 500ms timeout value even if the card indicates the 250ms
maximum busy length."  Even the previous value of 300ms is known to
be insufficient for some cards. So, increase the timeout to 500ms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:12 -08:00
Prabhakar Kushwaha
335b1936eb driver: net: fsl-mc: Remove portal id hard-coding
Management Complex firmware 9.0 has fixed the issue of
dprc_destroy_container i.e. the used portal is not return to the
free pool. Which was resulting in error ethernet driver want to
use this portal via either DPL or dynamically in Linux.

Hard-coding of portal id is removed.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:12 -08:00
Prabhakar Kushwaha
44b2036e12 driver: net: ldpaa: Add debug info of printing DPMAC stats
Add debug information prints to provide DPMAC statistics
 - Number of bytes received
 - Number of received and discard frames
 - Number of bytes transferred
 - Number of frames transferred
 etc.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:11 -08:00
Prabhakar Kushwaha
1c42beac80 driver: net: ldpaa: Increase num of buffers for a pool
Management Complex FW 9.0 set the hardware depletion to be 20
buffers in order to support multiple pools in DPNI. This requires
driver to fill the pool with at least 21 to be able to receive
frames. So, Increase number of buffers for a pool.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:11 -08:00
Prabhakar Kushwaha
6073548a0b driver: net: ldpaa: Report back only error frames for tx
Management Complex FW 9.0 puts a new requirement to provide Tx
confirmation and error queue configuration by calling
dpni_set_tx_conf API.

Configure report of only error frames for a tx frame.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:11 -08:00
Prabhakar Kushwaha
879a59ac90 driver: net: fsl-mc: Prepare extended cfg for DPNI create
Management Complex FW 9.0 puts a new requirement to prepare extended
parameters which should be provided as input in dpni_create. extended
parameters includes traffic class and IP reassembly configurations.

So prepare extended parameters with default "0" as input for
dpni_create.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:11 -08:00
Prabhakar Kushwaha
53e353fc3e driver: net: fsl-mc: flib changes for MC FW 9.0.0
MC firmware version 9.0.0 contains
 - Support of new APIs
 - Update in existing APIs
 - Change in Major and minor version of DPAA2 objects

This patch contains modifications in FLIB files to support new
MC firmware version.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:10 -08:00
Prabhakar Kushwaha
9a696f56fc driver: net: fsl-mc: Add version check for MC objects
Check and compare version of management  complex's object with
the version supported by Freescale ldpaa2 ethernet driver.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:13:10 -08:00
Ricardo Ribalda Delgado
21909baf57 net: xilinx_ll_temac: Fix string overflow
Size of this snprintf "lltemac.%lx" is bigger than 16 characters.
Replacing it with "ll_tem.%lx"

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:57:20 +01:00
Ricardo Ribalda Delgado
80cce2629b ppc: xilinx-ppc4xx: Port to DM serial
xilinx_uartlite has been ported to DM, this patch makes the
xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new
DM driver.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:57:11 +01:00
Siva Durga Prasad Paladugu
b215614638 mmc: zynq_sdhci: Added qurik to disable high speed
Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
4297900260 mmc: sdhci: Clear high speed if not supported
Clear high speed bit if it was not supported by
the driver.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
a57a4a5d83 sdhci: zynq: Remove hardcoded value zero as min frequency
Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
f17ea71d3a net: zynq: Change MDC setup for arm64
MDC setting depends on pclk input clocks which varies across SoC. This
driver is used by xilinx zynq and zynqmp SOC.
Input clock frequence on silicon is 125MHz where divider 64 put
frequency below 2.5MHz requires by spec (125/64=1.95).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
0179063273 net: phy: ti: Enable automatic crossover mode
Enable automatic crossover cable detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:54 +01:00
Michal Simek
842efb3a93 serial: zynq: Fix address reading from DM
Use dev_get_addr() instead of reading reg base directly in the driver.
Core function is also more robust.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Michal Simek
a2533183c0 serial: zynq: Extend compatible string list
ZynqMP is using updated core with cdns,uart-r1p12 compatible string.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:54 +01:00
Siva Durga Prasad Paladugu
f72132673a fpga: xilinx: Check for substring in device ID validation
Check for substrings in deviceID validation check
so that it can support xa bitstreams also.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:53 +01:00
Michal Simek
3229c869aa net: emaclite: Move emaclite to Kconfig
Add PHYLIB and MII dependencies and enable it by default for Microblaze.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
f412b6ab5b net: emaclite: Let core to handle received packet
Pass pointer to core to handle packet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:52 +01:00
Michal Simek
f03ec01015 net: emaclite: Rename start and stop functions
Rename start and stop functions to align with DM functions names.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:52 +01:00
Michal Simek
d538ee1b54 net: emaclite: Move driver to DM
Move driver to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
4d2749be62 net: emaclite: Use indirect access in emaclite_recv
When IP is configured with pong buffers, IP is receiving packets to ping
and then to pong buffer and than ping again.
The original logic in the driver remains there that when ping buffer is
free, pong buffer is checked too and return if both are free.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:52 +01:00
Michal Simek
0070251836 net: emaclite: Use indirect reg access in send
The original logic in the driver was exchanging buffers which are used for
sending packet and tx_ping and tx_pong buffers were exchanged all the
time to ensure that IP has enough time to send the packet out.
Based on this "feature" send function was using nextbuffertouse variable
to save which buffer should be used.
Before this algorithm was called driver checked that there is free
buffer available.
This checking remains in the driver but driver tries to use tx_ping
first if available. If not, tx_pong buffer is used instead.
To reach this code the original condition is met that at least one of the
buffer should be available.
Testing doesn't show any performance drop when this patch is applied.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
15c239c8ce net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flag
This flag is not documented anywhere in the latest documentation that's
why this patch removes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
26c7945a24 net: emaclite: Fix logic around available TX buffers
Simplify logic how to find out if there is free TX buffer.
Both buffers are checked all the time that's why logic around order
can be removed.
Also add check when only one buffer is available.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
5a4baa33e4 net: emaclite: Use indirect register access for TX reset
Move to use indirect register access when timeout expires for resetting
TX buffers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:52 +01:00
Michal Simek
3af709092c net: emaclite: Use indirect register access for rx_ping/pong
Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:51 +01:00
Michal Simek
a0b2bfb0bf net: emaclite: Use indirect register access for tx_ping/pong
Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
9a23c49662 net: emaclite: Convert MDIO to use register offset
Use u-boot coding style how to setup and access MDIO bus.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
d722e8641b net: emaclite: Add MDIO support to driver
Add MDIO support before move to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
8ce6947831 net: emaclite: Remove ancient OF probe function
Prepare for DM move.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
338a5f2bf1 net: Add axi emac to Kconfig
Also add dependency on PHYLIB and MII which is required.
Clean PHYLIB dependency from the driver too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
ad499e42be net: axi_emac: Rename start, stop, write_hwaddr functions
Rename few functions to fit to the new name convention used by DM.

Suggested-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:51 +01:00
Michal Simek
97d2363d20 net: axi_emac: Split recv from free_pkt
Call net_process_received_packet() by core.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
5d0449d4c7 net: axi_emac: Enable access to MDIO in probe
Detect phy when driver probes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
75cc93fad7 net: axi_emac: Move driver to DM
Move driver to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:51 +01:00
Michal Simek
f09854810c net: axi_emac: Pass private structure where possible
Use axidma_priv instead of ethdevice in preparation of the DM move.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:55:50 +01:00
Michal Simek
0d78abf5ba net: axi_emac: Pass private structure to phyread/phywrite
Prepare for move to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:50 +01:00
Michal Simek
6609f35b93 net: axi_emac: Put iobase to private structure
Saving iobase directly to private structure helps with moving to DM.
There is an option to load iobase from pdata but it is additional load.
Pointer to private structure is available all the time.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:50 +01:00
Michal Simek
f36bbcceba net: axi_emac: Pass directly pointer to register space
Simplify mdio_wait function by passing regs directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:50 +01:00
Michal Simek
2652a6219f net: axi_emac: Show phy address instead of register content
Fix debug message.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:50 +01:00
Michal Simek
3e3f8ba26e net: axi_emac: Fix parentheses around operand !
Fix these compilation warning by proper grouping:
In function 'axi_dma_init': drivers/net/xilinx_axi_emac.c:391:7:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
    if (!(in_be32(&priv->dmatx->control) |
        ^
In function 'axiemac_send': drivers/net/xilinx_axi_emac.c:501:21:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
  while (timeout && (!in_be32(&priv->dmatx->status) &

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27 15:55:50 +01:00
Michal Simek
54e24d3332 serial: uartlite: Add uartlite to Kconfig
- Move config option out of board file.
- Remove uartlite address from config file

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-27 15:55:49 +01:00
Michal Simek
4166ba3b23 serial: uartlite: Add support for debug console
Add support for debug console.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-27 15:55:49 +01:00
Michal Simek
93768393d7 serial: uartlite: Move driver to DM
Enable SPL DM too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-27 15:55:49 +01:00
Ricardo Ribalda Delgado
5b218ae106 mailaddr: Update mail address
The old mail address will stop working soon.
Update it all the files

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27 15:32:05 +01:00
Josh Wu
422b49e289 atmel_nand: use the definition: PMECC_OOB_RESERVED_BYTES instead magic number
As atmel_nand_ecc.h is sync with v4.1 kernel, which adds the
PMECC_OOB_RESERVED_BYTES. So use it in the driver.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2016-01-27 13:58:59 +01:00
Josh Wu
4c6a6ea3e1 atmel_nand: add '\n' in the end of error message for better display
Also align the open parenthesis.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-01-27 13:58:59 +01:00
Josh Wu
3a20567199 atmel_nand: use nand ecc_{strength, step}_ds instead of our own function
Since ecc_{strength,step}_ds is introduced in nand_chip structure for
minimum ecc requirements. So we can use them directly and remove our
own get_onfi_ecc_param function.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2016-01-27 13:58:58 +01:00
Gregory CLEMENT
75b03cf14c net: macb: Not all the GEM are gigabit capable
During the initialization of PHY the gigabit bit capable is set if the
controller is a GEM. However, for sama5d2 and sama5d4, the GEM is
configured to support only 10/100.

Improperly setting the GBE capability leads to an unresponsive MAC
controller. This patch fixes this behavior allowing using the gmac with
these SoCs.

Suggested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-01-27 13:58:58 +01:00
Gregory CLEMENT
b4670a0c2b mmc: atmel: Properly fix clock configuration
Timing issue occurs on eMMC not only when modifying the frequency but
also for all the switch command(CMD6). According to the MMC spec waiting
8 clocks after a switch command would be the thing to do.

This patch allows fixing CPU hang observed when trying to changing the
bus width on a eMMC on SAMA5D4.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-01-27 13:58:58 +01:00
Tom Rini
9e4de7fd4a Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-01-26 17:45:37 -05:00
Hans de Goede
2ca0299579 mvtwsi: Fix breakage introduced by "Fix mvtwsi not working on sun6i and newer sunxi SoCs"
"Fix mvtwsi not working on sun6i and newer sunxi SoCs" includes the following:

@@ -189,7 +200,8 @@ static int twsi_start(struct i2c_adapter *adap, int expected_status)
 	/* globally set TWSIEN in case it was not */
 	twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
 	/* assert START */
-	writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
+	twsi_control_flags |= MVTWSI_CONTROL_START | MVTWSI_CONTROL_CLEAR_IFLG;
+	writel(twsi_control_flags, &twsi->control);
 	/* wait for controller to process START */
 	return twsi_wait(adap, expected_status);
 }

The modification of twsi_control_flags done here was introduced while
merging to fix a line > 80 chars, but twsi_control_flags is a global variable
and should not be modified like this here, this commit fixes this, restoring
mvtwsi functionality.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-26 17:58:02 +01:00
Chen-Yu Tsai
f3c5045a95 sunxi: power: axp818: Enable support for ALDOs
Previously, AXP818 ALDO support was partially added to Kconfig, but
never enabled in the board file, nor properly set or configured in
Kconfig. The boards continue to work because the AXP818 is designed
to pair with the A83T/H8, and the default voltages match the reference
design's requirements.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-26 16:20:05 +01:00
Chen-Yu Tsai
0509efb7e9 power: axp818: Add support for DLDO and ELDO regulators
AXP818 provides an array of LDOs to provide power to various peripherals.
None of these regulators are critical.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-26 16:20:05 +01:00
Chen-Yu Tsai
3517a27ddb power: axp: merge separate DLDO functions into 1
Instead of one function for each DLDO regulator, make 1 function that
takes an extra "index". Since the control bits for the DLDO regulators
are contiguous, this makes the function very simple. This removes a lot
of duplicate code.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-01-26 16:20:05 +01:00
Hans de Goede
fe4b71b237 sunxi: Implement poweroff support for axp221 pmic
Adds poweroff support for axp221 pmic.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-01-26 16:20:04 +01:00
Michael van Slingerland
467e92b357 sunxi: Implement poweroff support for axp209 pmic
Adds poweroff support for axp209 pmic.

Signed-off-by: Michael van Slingerland <michael@deviousops.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-01-26 16:20:04 +01:00
Hans de Goede
c286cdfe14 sunxi: Implement poweroff support for axp152 pmic
Adds poweroff support for axp152 pmic.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-01-26 16:20:04 +01:00
Tom Rini
b72ae192e3 Merge branch 'master' of git://git.denx.de/u-boot-video 2016-01-26 09:48:07 -05:00
Anatolij Gustschin
7588c31252 video: add CONFIG_I2C_EDID and disable CONFIG_DISPLAY by default
Enabling CONFIG_DISPLAY breaks building for some architectures
(microblaze-generic), so we disable CONFIG_DISPLAY in Kconfig
by default and enable this option in defconfigs. CONFIG_DISPLAY
depends on CONFIG_I2C_EDID, so add and enable it in defconfigs, too.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-01-26 08:06:13 +01:00
Tom Rini
9c3193f8d0 Merge branch 'master' of git://git.denx.de/u-boot-usb 2016-01-25 17:23:19 -05:00
Masahiro Yamada
4feefdcfe9 usb: add clock support for generic EHCI
This driver is designed in a generic manner, so clocks should be
handled genericly as well.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-25 21:50:10 +01:00
Pratiyush Mohan Srivastava
c088326597 drivers: net: fsl_mc: Compare pointer value qbman_swp_mc_start
Current code compares the return pointer of function
qbman_cena_write_start with NULL. Instead the value of the return
pointer should be compared.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 08:24:17 -08:00
Ed Swarthout
81dfdee0dc drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers
Following commit 61bd2f75, exclude unused DDR controller from
calculating RAM size for SPL boot.

Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 08:24:16 -08:00
Shengzhou Liu
a994b3deb0 driver/ddr/fsl: Add workaround for A009663
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0
before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE]
to the desired value after DDR initialization has completed.

When DDR controller is configured to operate in auto-precharge
mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 08:24:15 -08:00
Shengzhou Liu
0d3972cfcd fsl/ddr: Add workaround for ERRATUM_A009942
During the receive data training, the DDRC may complete on a
non-optimal setting that could lead to data corruption or
initialization failure.

Workaround: before setting MEM_EN, set DEBUG_29 register with
specific value for different data rates.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 08:24:14 -08:00
Tom Rini
2218c54bc1 Merge branch 'master' of git://git.denx.de/u-boot-imx 2016-01-25 10:40:38 -05:00
Thomas Chou
cc4228f9d6 ns16550: zap the rockchip serial compatible string
Zap the rockchip serial compatible string, because rockchip
serial has "snps,dw-apb-uart" compatible string in the dts.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-25 10:40:04 -05:00
Bin Meng
e6655d7c23 net: eepro100: Fix build warnings
When building katmai, it reports quite a lot

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Fix this by casting the dev->iobase with u_long.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-25 10:40:01 -05:00
Masahiro Yamada
84b8bf6d5d bug.h: move BUILD_BUG_* defines to include/linux/bug.h
BUILD_BUG_* macros have been defined in several headers.  It would
be nice to collect them in include/linux/bug.h like Linux.

This commit is cherry-picking useful macros from include/linux/bug.h
of Linux 4.4.

I did not import BUILD_BUG_ON_MSG() because it would not work if it
is used with include/common.h in U-Boot.  I'd like to postpone it
until the root cause (the "error()" macro in include/common.h causes
the name conflict with "__attribute__((error()))") is fixed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-25 10:39:59 -05:00
Mateusz Kulikowski
e7138b34b0 net: zynq_gem: Use shared wait_for_bit
Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
2016-01-25 10:39:50 -05:00
Mateusz Kulikowski
8c25c2592e usb: ehci-mx6: Use shared wait_for_bit
Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
2016-01-25 10:39:49 -05:00
Mateusz Kulikowski
8d5c7bb294 usb: ohci-lpc32xx: Use shared wait_for_bit
Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
2016-01-25 10:39:49 -05:00
Mateusz Kulikowski
fd2cd66290 usb: dwc2: Use shared wait_for_bit
Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
2016-01-25 10:39:48 -05:00
Tom Rini
0080931abf serial: Remove serial_putc_raw_dev
clang-3.8 reports that serial_putc_raw_dev in serial_ns16550.c is
unused.  Further investigation shows that we have 3 places that
implement this function and no callers, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-25 10:39:45 -05:00
Peng Fan
bedaa842ae imx: nand: update GPMI NAND driver to support MX7
Update GPMI NAND driver and BCH head file to support i.MX7

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-01-24 12:09:32 +01:00
Peng Fan
1fc4f80495 imx: apbh_dma: Update APBH-DMA for MX7D
Update APBH-DMA driver and head files to support i.MX7D

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-01-24 12:09:16 +01:00
Simon Glass
0c7645bde0 x86: ivybridge: Use the I2C driver to perform SMbus init
Move the init code into the I2C driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:09:41 +08:00
Simon Glass
abb0b01e7a x86: i2c: Add a stub driver for Intel I2C/SMbus
This is used on most Intel platforms. We don't have a driver for it yet, but
add a stub to handle the init. For now this targets ivybridge so we may want
to add a device tree binding and generalise it when other platforms are
supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:09:40 +08:00
Simon Glass
e3b5f04143 ahci: Add a disk-controller uclass
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or
other controller types. There are no operations and no interface so far,
but it is possible to probe a SATA device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:09:39 +08:00
Simon Glass
7282672d29 dm: pci: Convert bios_emu to use the driver model PCI API
At present this BIOS emulator uses a bus/device/function number. Change
it to use a device if CONFIG_DM_PCI is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:19 +08:00
Simon Glass
ac94b7bcbe dm: syscon: Allow finding devices by driver data
We have a way to find a regmap by its syscon driver data value. Add the same
for syscon itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:19 +08:00
Simon Glass
907eed2ce3 dm: usb: Add a compatible string for PCI EHCI controller
Add a compatible string to allow this to be specified in the device tree
if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:19 +08:00
Simon Glass
d062482b46 dm: core: Display the error number when driver binding fails
This is often -96 (-EPFNOSUPPORT) which indicates that the uclass is not
compiled in. Display the error number to make this easier to spot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:18 +08:00
Simon Glass
f2b85ab5e6 dm: x86: spi: Convert ICH SPI driver to driver model PCI API
At present this SPI driver works by searching the PCI buses for its
peripheral. It also uses the legacy PCI API.

In addition the driver has code to determine the type of Intel PCH that is
used (version 7 or version 9). Now that we have proper PCH drivers we can
use those to obtain the information we need.

While the device tree has a node for the SPI peripheral it is not in the
right place. It should be on the PCI bus as a sub-peripheral of the LPC
device.

Update the device tree files to show the SPI controller within the PCH, so
that PCI access works as expected.

This patch includes Bin's fix-up patch from here:

   https://patchwork.ozlabs.org/patch/569478/

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:17 +08:00
Simon Glass
fffe25db04 spi: ich: Separate out the read/write trace from normal debugging
The trace is seldom useful for basic debugging. Allow it to be enabled
separately so that it is easier to see the more important init and error
debug messages.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:17 +08:00
Simon Glass
81afac1238 dm: x86: Add a driver for Intel PCH9
At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH9.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:17 +08:00
Simon Glass
1ff4f321b6 dm: x86: Add a driver for Intel PCH7
At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH7.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:17 +08:00