Commit graph

12089 commits

Author SHA1 Message Date
Simon Glass
4af0d7e870 dm: Fix up inclusion of common.h
It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.

Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:03 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Jagan Teki
2dbe9c1362 sun50i: a64: Add initial Banana Pi M64 support
BPI-M64 is a 64-bit quad-core mini single board computer
using the Allwinner A64 SOC.

BPI-M64 features
- 1.2 Ghz Quad-Core ARM Cortex A53
- 2GB DDR3 SDRAM with 733MHz
- MicroSD/eMMC(8GB)
- 10/100/1000Mbps ethernet (Realtek RTL8211E/D)
- Wifi + BT
- IR receiver
- Audio In/Out
- Video In/Out
- 5V 2A DC power-supply

For dts file,
Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'").

Boot from MMC:
-------------
U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE:  BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
NOTICE:  Configuring SPC Controller
NOTICE:  BL3-1: v1.0(debug):aa75c8d
NOTICE:  BL3-1: Built : 18:28:27, May 24 2017
NOTICE:  Configuring AXP PMIC
NOTICE:  PMIC: setup successful
INFO:    BL3-1: Initializing runtime services
INFO:    BL3-1: Preparing for EL3 exit to normal world
INFO:    BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9

U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology

CPU:   Allwinner A64 (SUN50I)
Model: BananaPi-M64
DRAM:  2 GiB
MMC:   SUNXI SD/MMC: 0, SUNXI SD/MMC: 1
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
starting USB...
No controllers found
Hit any key to stop autoboot:  0

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-01 09:26:05 +00:00
Andre Przywara
f98852bfa9 sunxi: A64/Pine64: update device tree from Linux
The Linux device tree for the Allwinner A64 SoC has changed a lot since
the U-Boot version was merged.
Let's replace the current DT with a exact copy of the Linux one as of:
commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b
Merge: 0ff4c01 3c0e3abd
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Tue May 9 10:07:33 2017 -0700

This is the DT used in Linux 4.12-rc1.

Since U-Boot has an Ethernet driver (while Linux does not yet), we
provide the required DT nodes for it in an ...-u-boot.dtsi file, to both
mark them as U-Boot specific and to allow easier upgrading once Linux gets
the driver and its own binding later.
Compared to the existing Ethernet DT nodes we just slightly tweak the clock
and reset nodes in there to match the new bindings used by Linux for those.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-01 09:25:30 +00:00
Tom Rini
31493dd5ff Merge branch 'master' of git://git.denx.de/u-boot-mips
Please pull another update for Broadcom MIPS.
This contains new SoC's, new boards and new drivers and some bugfixes.
2017-05-31 22:28:06 -04:00
Tom Rini
1b87f9538f Merge git://www.denx.de/git/u-boot-marvell
Mostly including the Armada 37xx pinctrl / gpio driver.
2017-05-31 22:27:54 -04:00
Daniel Thompson
221a949eb6 Kconfig: Finish migration of hashing commands
Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way.  As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
        migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-31 19:38:14 -04:00
Álvaro Fernández Rojas
c93bb1d7bb mips: bmips: fix BCM3380 periph clock frequency
Instead of having a peripheral clock of 50 MHz like the BCM63xx family, it
has a 48 MHz clock.
This fixes uart baud rate calculation for BCM3380.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2017-05-31 15:45:29 +02:00
Álvaro Fernández Rojas
9ac0b63973 mips: bmips: add board descriptions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
8df3788887 MIPS: add BMIPS Sagem F@ST1704 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
07661e7f50 MIPS: add support for Broadcom MIPS BCM6338 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
c4203e1d73 MIPS: add BMIPS Netgear CG3100D board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
23a2168398 MIPS: add support for Broadcom MIPS BCM3380 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
5e14ce2f33 MIPS: add BMIPS Comtrend CT-5361 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
bf9012b808 MIPS: add support for Broadcom MIPS BCM6348 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
d7efa94071 mips: bmips: add wdt-reboot driver support for BCM63268
This driver allows rebooting the SoC by calling wdt_expire_now op.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:55 +02:00
Álvaro Fernández Rojas
5b8a225edf mips: bmips: add wdt-reboot driver support for BCM6328
This driver allows rebooting the SoC by calling wdt_expire_now op.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:54 +02:00
Álvaro Fernández Rojas
968185378b mips: bmips: add wdt-reboot driver support for BCM6358
This driver allows rebooting the SoC by calling wdt_expire_now op.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:54 +02:00
Álvaro Fernández Rojas
1947a44b78 mips: bmips: add bcm6345-wdt driver support for BCM63268
This driver controls the watchdog present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:54 +02:00
Álvaro Fernández Rojas
404cacb371 mips: bmips: add bcm6345-wdt driver support for BCM6328
This driver controls the watchdog present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:54 +02:00
Álvaro Fernández Rojas
bbbb61123a mips: bmips: add bcm6345-wdt driver support for BCM6358
This driver controls the watchdog present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-31 14:49:54 +02:00
Benoît Thébaudeau
3e3aab3379 mx25: Add function to set PER clocks
Introduce the imx_set_perclk() function to make it possible to set the
PER clocks.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:14:30 +02:00
Benoît Thébaudeau
f7c13e6a79 mx25: Fix imx_get_perclk()
imx_get_perclk() used the AHB clock as the clock source for all PER
clocks, but the USB PLL output can also be a PER clock source if the
corresponding PER CLK MUX bit is set in CCM.MCR.

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:14:17 +02:00
Tim Harvey
6ecbe13756 drivers: pci: imx: add imx_pcie_remove function
There is no dedicated reset signal wired up for the MX6QDL thus if the
bootloader enables the link we need some special handling to get the core
back into a state where it is safe to touch it for configuration.

While there has been some special handling in the Linux kernel to do this,
it was removed in 4.11 thus we need to do it properly in the bootloader
and therefore without this if you enable PCI in the bootloader you will hang
while booting the 4.11 kernel.

This puts the PCIe controller back into a safe state for the kernel driver
before launching the kernel.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Peter Senna Tschudin <peter.senna@collabora.com>
2017-05-31 10:09:03 +02:00
Vanessa Maegima
1541d7a63d pico-imx7d: Add initial support
Add the initial support for pico-imx7d board based on Wig Cheng's
source code.

Add support for eMMC, USB gadget, I2C, PMIC and Ethernet.

For more information about this board, please visit:
http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 09:58:40 +02:00
Stefan Roese
780f80cd0f arm64: mvebu: Replace board specific with generic memory bank decoding
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt.
This change makes the dram_init* functions use a generic implementation
of decoding and populating memory bank and size data.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-05-31 07:42:17 +02:00
Stefan Roese
0cc209124f arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR)
This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting
the correct PHY type (KR / SFI) for the COMPHY driver and enabling the
ethernet0 device node in the dts.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
2017-05-31 07:39:06 +02:00
Gregory CLEMENT
045504bbb8 arm64: mvebu: armada37xx: add pinctrl definition
Start to populate the device tree of the Armada 37xx with the pincontrol
configuration used on the board providing a dts.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
2017-05-31 07:33:49 +02:00
Gregory CLEMENT
5cb7b79558 arm64: mvebu: Add pinctrl nodes for Armada 3700
Add the nodes for the two pin controller present in the Armada 37xx SoCs.

Initially the node was named gpio1 using the same name that for the
register range in the datasheet. However renaming it pinctr_nb (nb for
North Bridge) makes more sens.

Minor changes for U-Boot because of the slightly different dts version
done by Stefan Roese.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
2017-05-31 07:33:49 +02:00
Mylene JOSSERAND
6ff02fba04 sunxi: Update NanoPi Neo to use dtsi
Update the NanoPi Neo device tree file to use the NanoPi dtsi.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-30 11:05:24 +05:30
Mylene JOSSERAND
a647ea172a sunxi: Add support for NanoPi M1
NanoPi M1 is a board based on Allwinner H3 CPU.

This commit adds the support for this platform with:
   - an include device tree which enables UART, LEDs, GPIO key switch,
   1 USB host ports and the SD-card as a dtsi file.
   - a device tree specific to this board that enables the
   2 additional USB ports
   - a defconfig file for minimal support
   - a section in MAINTAINERS (add myself)

Synchronized with the kernel device tree, from commits:
sun8i-nanopi.dtsi: 85d2913614d9ab899d23b7ab7d22d23cf45bd1de
sun8i-h3-nanopi-m1.dts: 10efbf5f16336b7540ad6a16aa1cb0b26bab033b

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-30 11:05:09 +05:30
Tom Rini
380e86f361 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-05-26 11:19:27 -04:00
Tom Rini
8dc1b17f14 Merge branch 'master' of git://git.denx.de/u-boot-nds32
Move FTMAC100 to where it should be, alphabetically in
drivers/net/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	drivers/net/Kconfig
2017-05-26 11:18:53 -04:00
Tom Rini
be62fbf376 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2017-05-23 16:22:03 -04:00
Santan Kumar
f5bf23d827 armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot
This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below

Image				Flash Offset
RCW+PBI				0x00000000
Boot firmware (U-Boot)		0x00100000
Boot firmware Environment	0x00300000
PPA firmware			0x00400000
PHY firmware			0x00980000
DPAA2 MC			0x00A00000
DPAA2 DPL			0x00D00000
DPAA2 DPC			0x00E00000
Kernel.itb			0x01000000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:52:29 -07:00
Alison Wang
a9a5cef391 armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A
This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN
firmware load address, QE firmware load address, U-Boot start address
on serial flash and environment address.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:50:25 -07:00
Priyanka Jain
3049a583f3 armv8: ls2080ardb: Add LS2081ARDB board support
LS2081ARDB board is similar to LS2080ARDB board with few differences
 It hosts LS2081A SoC
 Default boot source is QSPI-boot
 It does not have IFC interface
 RTC and QSPI flash device are different
 It provides QIXIS access via I2C

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:47:08 -07:00
Priyanka Jain
e809e74799 armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:40:23 -07:00
Priyanka Jain
89a168f776 armv8: ls2080ardb: Add QSPI-boot support
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:38:55 -07:00
Priyanka Jain
5193405a16 board: freescale: ls2080ardb: Enable SD interface for RevF board
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:12:26 -07:00
rick
be71a179bd nds32: eth: Support ftmac100 DM.
Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform.
Verification:
 Boot linux kernel via dhcp and bootm ok.

 NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000;
 NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin
 BOOTP broadcast 1
 BOOTP broadcast 2
 BOOTP broadcast 3
 BOOTP broadcast 4
 DHCP client bound to address 10.0.4.178 (4899 ms)
	Using mac@e0100000 device
	TFTP from server 10.0.4.97; our IP address is 10.0.4.178
	Filename 'boomimage-310y-ae300-spi.bin'.
	Load address: 0x600000
	Loading: #################################################################
	         #################################################################
	         #################################################################
...
...
	         ###################################
	         233.4 KiB/s
					 done
					 Bytes transferred = 13872076 (d3abcc hex)
	NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb
	BOOTP broadcast 1
	BOOTP broadcast 2
	BOOTP broadcast 3
	BOOTP broadcast 4
	DHCP client bound to address 10.0.4.178 (4592 ms)
	Using mac@e0100000 device
	TFTP from server 10.0.4.97; our IP address is 10.0.4.178
	Filename 'ae300.dtb'.
	Load address: 0x2000000
	Loading: #
	         82 KiB/s
					 done
					 Bytes transferred = 2378 (94a hex)
	NDS32 # bootm 0x600000 - 0x2000000
	 Image Name:
	 Created:      2017-03-22   6:52:03 UTC
	 Image Type:   NDS32 Linux Kernel Image (uncompressed)
	 Data Size:    13872012 Bytes = 13.2 MiB
	 Load Address: 0000c000
	 Entry Point:  0000c000
	 Verifying Checksum ... OK
	 Booting using the fdt blob at 0x2000000
	 Loading Kernel Image ... OK
	 Loading Device Tree to 01efc000, end 01eff949 ... OK
	 Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09)
	(gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) )
  #293 PREEMPT Wed Mar 22 14:49:28 CST 2017
	CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159)
...
...
Signed-off-by: rick <rick@andestech.com>
2017-05-23 13:48:27 +08:00
Tom Rini
711391131c Merge git://git.denx.de/u-boot-sunxi
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't
get Kconfig errors on platforms without SPL, ie sandbox (without SPL).

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22 19:20:28 +00:00
Tom Rini
c2774e6149 Merge branch 'master' of git://git.denx.de/u-boot-nds32 2017-05-22 14:14:44 -04:00
Simon Glass
ded48cdc8b sandbox: Enable CMD_GETTIME
Enable this option by default on sandbox to increase build coverage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22 12:45:33 -04:00
Simon Glass
ee7c0e712a Convert CONFIG_CMD_LZMADEC to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_LZMADEC

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22 12:45:33 -04:00
Simon Glass
aed998aa34 Convert CONFIG_LZMA to Kconfig
This converts the following to Kconfig:
   CONFIG_LZMA

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22 12:45:32 -04:00
Simon Glass
1b330894bd Convert CONFIG_CMD_IRQ to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_IRQ

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22 12:45:31 -04:00
Simon Glass
7d0f5c1300 Convert CONFIG_CMD_IOTRACE to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_IOTRACE

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22 12:45:30 -04:00
Simon Glass
594e8d1c62 Convert CONFIG_CMD_IO to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_IO

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22 12:45:29 -04:00