mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Merge git://www.denx.de/git/u-boot-marvell
Mostly including the Armada 37xx pinctrl / gpio driver.
This commit is contained in:
Tom Rini
commit
1b87f9538f
17 changed files with 852 additions and 130 deletions
|
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@ -81,11 +81,15 @@
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};
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ð0 {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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status = "okay";
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phy-mode = "rgmii";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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};
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@ -117,6 +121,8 @@
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&spi0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi_quad_pins>;
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spi-flash@0 {
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#address-cells = <1>;
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@ -130,6 +136,8 @@
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/* Exported on the micro USB connector CON32 through an FTDI */
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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@ -106,6 +106,79 @@
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status = "disabled";
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};
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pinctrl_nb: pinctrl-nb@13800 {
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compatible = "marvell,armada3710-nb-pinctrl",
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"syscon", "simple-mfd";
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reg = <0x13800 0x100>, <0x13C00 0x20>;
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gpionb: gpionb {
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_nb 0 0 36>;
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gpio-controller;
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interrupts =
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<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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};
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spi_quad_pins: spi-quad-pins {
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groups = "spi_quad";
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function = "spi";
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};
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i2c1_pins: i2c1-pins {
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groups = "i2c1";
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function = "i2c";
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};
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i2c2_pins: i2c2-pins {
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groups = "i2c2";
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function = "i2c";
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};
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uart1_pins: uart1-pins {
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groups = "uart1";
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function = "uart";
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};
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uart2_pins: uart2-pins {
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groups = "uart2";
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function = "uart";
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};
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};
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pinctrl_sb: pinctrl-sb@18800 {
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compatible = "marvell,armada3710-sb-pinctrl",
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"syscon", "simple-mfd";
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reg = <0x18800 0x100>, <0x18C00 0x20>;
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gpiosb: gpiosb {
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_sb 0 0 29>;
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gpio-controller;
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interrupts =
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<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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};
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rgmii_pins: mii-pins {
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groups = "rgmii";
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function = "mii";
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};
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};
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usb3: usb@58000 {
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compatible = "marvell,armada3700-xhci",
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"generic-xhci";
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@ -169,8 +169,7 @@
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};
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phy2 {
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phy-type = <PHY_TYPE_SGMII0>;
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phy-speed = <PHY_SPEED_1_25G>;
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phy-type = <PHY_TYPE_SFI>;
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};
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phy3 {
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@ -224,6 +223,11 @@
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status = "okay";
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};
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&cpm_eth0 {
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status = "okay";
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phy-mode = "sfi"; /* lane-2 */
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};
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&cpm_eth1 {
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status = "okay";
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phy = <&phy0>;
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@ -46,75 +46,17 @@ const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
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/* DRAM init code ... */
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static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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int dram_init_banksize(void)
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{
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int offset;
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offset = fdt_path_offset(fdt, "/memory");
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if (offset < 0)
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return NULL;
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return fdt_getprop(fdt, offset, "reg", lenp);
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}
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int dram_init(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, len;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 0 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return -EINVAL;
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}
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val = get_memory_reg_prop(fdt, &len);
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if (len / sizeof(*val) < ac + sc)
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return -EINVAL;
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val += ac;
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gd->ram_size = fdtdec_get_number(val, sc);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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fdtdec_setup_memory_banksize();
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return 0;
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}
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int dram_init_banksize(void)
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int dram_init(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, cells, len, i;
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val = get_memory_reg_prop(fdt, &len);
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if (len < 0)
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return -ENXIO;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 1 || ac > 2 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return -ENXIO;
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}
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cells = ac + sc;
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len /= sizeof(*val);
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for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
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i++, len -= cells) {
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gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
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val += ac;
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gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
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val += sc;
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debug("DRAM bank %d: start = %08lx, size = %08lx\n",
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i, (unsigned long)gd->bd->bi_dram[i].start,
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(unsigned long)gd->bd->bi_dram[i].size);
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}
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if (fdtdec_setup_memory_size() != 0)
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return -EINVAL;
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return 0;
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}
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@ -131,8 +131,12 @@ int board_init(void)
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/* Toggle GPIO41 to reset onboard switch and phy */
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clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
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clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
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/* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */
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clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
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clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19));
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mdelay(1);
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setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
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setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
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mdelay(10);
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/* Init I2C IO expanders */
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@ -8,14 +8,13 @@ CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SPL=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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@ -25,15 +24,8 @@ CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_EFI_PARTITION=y
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# CONFIG_PARTITION_UUIDS is not set
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# CONFIG_SPL_PARTITION_UUIDS is not set
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@ -19,6 +19,7 @@ CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_FPGA is not set
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_DHCP=y
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@ -35,6 +36,8 @@ CONFIG_MAC_PARTITION=y
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CONFIG_ISO_PARTITION=y
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CONFIG_EFI_PARTITION=y
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CONFIG_BLOCK_CACHE=y
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CONFIG_DM_GPIO=y
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# CONFIG_MVEBU_GPIO is not set
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CONFIG_DM_I2C=y
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CONFIG_MISC=y
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CONFIG_DM_MMC=y
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@ -47,6 +50,8 @@ CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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CONFIG_MVEBU_COMPHY_SUPPORT=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_ARMADA_37XX=y
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# CONFIG_SPL_SERIAL_PRESENT is not set
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_MVEBU_A3700_UART=y
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|
|
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|||
|
|
@ -7,7 +7,6 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_BOARD_LATE_INIT=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_EARLY_INIT_R=y
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|
|
@ -16,12 +15,12 @@ CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_IMLS is not set
|
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# CONFIG_CMD_FLASH is not set
|
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CONFIG_CMD_MMC=y
|
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CONFIG_CMD_NAND=y
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CONFIG_CMD_PART=y
|
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CONFIG_CMD_SF=y
|
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CONFIG_CMD_SPI=y
|
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CONFIG_CMD_I2C=y
|
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CONFIG_CMD_USB=y
|
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CONFIG_CMD_NAND=y
|
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# CONFIG_CMD_FPGA is not set
|
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# CONFIG_CMD_SETEXPR is not set
|
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CONFIG_CMD_TFTPPUT=y
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|
|
@ -31,6 +30,7 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_MVEBU_BUBT=y
|
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CONFIG_MVEBU_NAND_BOOT=y
|
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CONFIG_CMD_EXT4=y
|
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CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
|
|
@ -45,18 +45,18 @@ CONFIG_MISC=y
|
|||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_XENON=y
|
||||
CONFIG_NAND_PXA3XX=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_MVEBU_NAND_BOOT=y
|
||||
CONFIG_NAND_PXA3XX=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_DM_PCI=y
|
||||
CONFIG_PCIE_DW_MVEBU=y
|
||||
CONFIG_MVEBU_COMPHY_SUPPORT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_ARMADA_8K=y
|
||||
# CONFIG_SPL_SERIAL_PRESENT is not set
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_BASE=0xf0512000
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ CONFIG_DM_PCI=y
|
|||
CONFIG_PCIE_DW_MVEBU=y
|
||||
CONFIG_MVEBU_COMPHY_SUPPORT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_ARMADA_8K=y
|
||||
# CONFIG_SPL_SERIAL_PRESENT is not set
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_BASE=0xf0512000
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ CONFIG_DM_PCI=y
|
|||
CONFIG_PCIE_DW_MVEBU=y
|
||||
CONFIG_MVEBU_COMPHY_SUPPORT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_ARMADA_8K=y
|
||||
# CONFIG_SPL_SERIAL_PRESENT is not set
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_BASE=0xf0512000
|
||||
|
|
|
|||
|
|
@ -57,6 +57,7 @@ CONFIG_DM_PCI=y
|
|||
CONFIG_PCIE_DW_MVEBU=y
|
||||
CONFIG_MVEBU_COMPHY_SUPPORT=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_ARMADA_8K=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
# CONFIG_SPL_SERIAL_PRESENT is not set
|
||||
CONFIG_DEBUG_UART=y
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
|
|||
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
|
||||
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
|
||||
obj-$(CONFIG_PINCTRL_MESON) += meson/
|
||||
obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/
|
||||
obj-$(CONFIG_ARCH_MVEBU) += mvebu/
|
||||
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
|
||||
obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
|
||||
obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o
|
||||
|
|
|
|||
|
|
@ -1,7 +1,17 @@
|
|||
config PINCTRL_MVEBU
|
||||
depends on ARCH_MVEBU
|
||||
bool
|
||||
default y
|
||||
if ARCH_MVEBU
|
||||
|
||||
config PINCTRL_ARMADA_37XX
|
||||
depends on ARMADA_3700
|
||||
bool "Armada 37xx pin control driver"
|
||||
help
|
||||
Support pin multiplexing and pin configuration control on
|
||||
Marvell's Armada-37xx SoC.
|
||||
|
||||
config PINCTRL_ARMADA_8K
|
||||
depends on ARMADA_8K
|
||||
bool "Armada 7k/8k pin control driver"
|
||||
help
|
||||
Support pin multiplexing and pin configuration control on
|
||||
Marvell's Armada-8K SoC.
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -4,4 +4,5 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
# https://spdx.org/licenses
|
||||
|
||||
obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
|
||||
obj-$(CONFIG_PINCTRL_ARMADA_37XX) += pinctrl-armada-37xx.o
|
||||
obj-$(CONFIG_PINCTRL_ARMADA_8K) += pinctrl-mvebu.o
|
||||
|
|
|
|||
631
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
Normal file
631
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
Normal file
|
|
@ -0,0 +1,631 @@
|
|||
/*
|
||||
* U-Boot Marvell 37xx SoC pinctrl driver
|
||||
*
|
||||
* Copyright (C) 2017 Stefan Roese <sr@denx.de>
|
||||
*
|
||||
* This driver is based on the Linux driver version, which is:
|
||||
* Copyright (C) 2017 Marvell
|
||||
* Gregory CLEMENT <gregory.clement@free-electrons.com>
|
||||
*
|
||||
* Additionally parts are derived from the Meson U-Boot pinctrl driver,
|
||||
* which is:
|
||||
* (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
|
||||
* Based on code from Linux kernel:
|
||||
* Copyright (C) 2016 Endless Mobile, Inc.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
* https://spdx.org/licenses
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <config.h>
|
||||
#include <dm.h>
|
||||
#include <dm/device-internal.h>
|
||||
#include <dm/lists.h>
|
||||
#include <dm/pinctrl.h>
|
||||
#include <dm/root.h>
|
||||
#include <errno.h>
|
||||
#include <fdtdec.h>
|
||||
#include <regmap.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define OUTPUT_EN 0x0
|
||||
#define INPUT_VAL 0x10
|
||||
#define OUTPUT_VAL 0x18
|
||||
#define OUTPUT_CTL 0x20
|
||||
#define SELECTION 0x30
|
||||
|
||||
#define IRQ_EN 0x0
|
||||
#define IRQ_POL 0x08
|
||||
#define IRQ_STATUS 0x10
|
||||
#define IRQ_WKUP 0x18
|
||||
|
||||
#define NB_FUNCS 2
|
||||
#define GPIO_PER_REG 32
|
||||
|
||||
/**
|
||||
* struct armada_37xx_pin_group: represents group of pins of a pinmux function.
|
||||
* The pins of a pinmux groups are composed of one or two groups of contiguous
|
||||
* pins.
|
||||
* @name: Name of the pin group, used to lookup the group.
|
||||
* @start_pins: Index of the first pin of the main range of pins belonging to
|
||||
* the group
|
||||
* @npins: Number of pins included in the first range
|
||||
* @reg_mask: Bit mask matching the group in the selection register
|
||||
* @extra_pins: Index of the first pin of the optional second range of pins
|
||||
* belonging to the group
|
||||
* @npins: Number of pins included in the second optional range
|
||||
* @funcs: A list of pinmux functions that can be selected for this group.
|
||||
* @pins: List of the pins included in the group
|
||||
*/
|
||||
struct armada_37xx_pin_group {
|
||||
const char *name;
|
||||
unsigned int start_pin;
|
||||
unsigned int npins;
|
||||
u32 reg_mask;
|
||||
u32 val[NB_FUNCS];
|
||||
unsigned int extra_pin;
|
||||
unsigned int extra_npins;
|
||||
const char *funcs[NB_FUNCS];
|
||||
unsigned int *pins;
|
||||
};
|
||||
|
||||
struct armada_37xx_pin_data {
|
||||
u8 nr_pins;
|
||||
char *name;
|
||||
struct armada_37xx_pin_group *groups;
|
||||
int ngroups;
|
||||
};
|
||||
|
||||
struct armada_37xx_pmx_func {
|
||||
const char *name;
|
||||
const char **groups;
|
||||
unsigned int ngroups;
|
||||
};
|
||||
|
||||
struct armada_37xx_pinctrl {
|
||||
void __iomem *base;
|
||||
const struct armada_37xx_pin_data *data;
|
||||
struct udevice *dev;
|
||||
struct pinctrl_dev *pctl_dev;
|
||||
struct armada_37xx_pin_group *groups;
|
||||
unsigned int ngroups;
|
||||
struct armada_37xx_pmx_func *funcs;
|
||||
unsigned int nfuncs;
|
||||
};
|
||||
|
||||
#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \
|
||||
{ \
|
||||
.name = _name, \
|
||||
.start_pin = _start, \
|
||||
.npins = _nr, \
|
||||
.reg_mask = _mask, \
|
||||
.val = {0, _mask}, \
|
||||
.funcs = {_func1, _func2} \
|
||||
}
|
||||
|
||||
#define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \
|
||||
{ \
|
||||
.name = _name, \
|
||||
.start_pin = _start, \
|
||||
.npins = _nr, \
|
||||
.reg_mask = _mask, \
|
||||
.val = {0, _mask}, \
|
||||
.funcs = {_func1, "gpio"} \
|
||||
}
|
||||
|
||||
#define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \
|
||||
{ \
|
||||
.name = _name, \
|
||||
.start_pin = _start, \
|
||||
.npins = _nr, \
|
||||
.reg_mask = _mask, \
|
||||
.val = {_val1, _val2}, \
|
||||
.funcs = {_func1, "gpio"} \
|
||||
}
|
||||
|
||||
#define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \
|
||||
_f1, _f2) \
|
||||
{ \
|
||||
.name = _name, \
|
||||
.start_pin = _start, \
|
||||
.npins = _nr, \
|
||||
.reg_mask = _mask, \
|
||||
.val = {_v1, _v2}, \
|
||||
.extra_pin = _start2, \
|
||||
.extra_npins = _nr2, \
|
||||
.funcs = {_f1, _f2} \
|
||||
}
|
||||
|
||||
static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
|
||||
PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"),
|
||||
PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"),
|
||||
PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"),
|
||||
PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"),
|
||||
PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
|
||||
PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
|
||||
PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
|
||||
PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
|
||||
PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
|
||||
PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
|
||||
PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
|
||||
PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
|
||||
PIN_GRP_GPIO_2("spi_cs2", 18, 1, BIT(13) | BIT(19), 0, BIT(13), "spi"),
|
||||
PIN_GRP_GPIO_2("spi_cs3", 19, 1, BIT(14) | BIT(19), 0, BIT(14), "spi"),
|
||||
PIN_GRP_GPIO("onewire", 4, 1, BIT(16), "onewire"),
|
||||
PIN_GRP_GPIO("uart1", 25, 2, BIT(17), "uart"),
|
||||
PIN_GRP_GPIO("spi_quad", 15, 2, BIT(18), "spi"),
|
||||
PIN_GRP_EXTRA("uart2", 9, 2, BIT(13) | BIT(14) | BIT(19),
|
||||
BIT(13) | BIT(14), BIT(19), 18, 2, "gpio", "uart"),
|
||||
PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),
|
||||
PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),
|
||||
PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),
|
||||
PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"),
|
||||
|
||||
};
|
||||
|
||||
static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
|
||||
PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
|
||||
PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
|
||||
PIN_GRP_GPIO("sdio_sb", 24, 5, BIT(2), "sdio"),
|
||||
PIN_GRP_EXTRA("rgmii", 6, 14, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"),
|
||||
PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"),
|
||||
PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"),
|
||||
PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
|
||||
PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
|
||||
PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"),
|
||||
};
|
||||
|
||||
const struct armada_37xx_pin_data armada_37xx_pin_nb = {
|
||||
.nr_pins = 36,
|
||||
.name = "GPIO1",
|
||||
.groups = armada_37xx_nb_groups,
|
||||
.ngroups = ARRAY_SIZE(armada_37xx_nb_groups),
|
||||
};
|
||||
|
||||
const struct armada_37xx_pin_data armada_37xx_pin_sb = {
|
||||
.nr_pins = 29,
|
||||
.name = "GPIO2",
|
||||
.groups = armada_37xx_sb_groups,
|
||||
.ngroups = ARRAY_SIZE(armada_37xx_sb_groups),
|
||||
};
|
||||
|
||||
static inline void armada_37xx_update_reg(unsigned int *reg,
|
||||
unsigned int offset)
|
||||
{
|
||||
/* We never have more than 2 registers */
|
||||
if (offset >= GPIO_PER_REG) {
|
||||
offset -= GPIO_PER_REG;
|
||||
*reg += sizeof(u32);
|
||||
}
|
||||
}
|
||||
|
||||
static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp,
|
||||
const char *func)
|
||||
{
|
||||
int f;
|
||||
|
||||
for (f = 0; f < NB_FUNCS; f++)
|
||||
if (!strcmp(grp->funcs[f], func))
|
||||
return f;
|
||||
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static int armada_37xx_pmx_get_groups_count(struct udevice *dev)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
|
||||
return info->ngroups;
|
||||
}
|
||||
|
||||
static const char *armada_37xx_pmx_dummy_name = "_dummy";
|
||||
|
||||
static const char *armada_37xx_pmx_get_group_name(struct udevice *dev,
|
||||
unsigned selector)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
|
||||
if (!info->groups[selector].name)
|
||||
return armada_37xx_pmx_dummy_name;
|
||||
|
||||
return info->groups[selector].name;
|
||||
}
|
||||
|
||||
static int armada_37xx_pmx_get_funcs_count(struct udevice *dev)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
|
||||
return info->nfuncs;
|
||||
}
|
||||
|
||||
static const char *armada_37xx_pmx_get_func_name(struct udevice *dev,
|
||||
unsigned selector)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
|
||||
return info->funcs[selector].name;
|
||||
}
|
||||
|
||||
static int armada_37xx_pmx_set_by_name(struct udevice *dev,
|
||||
const char *name,
|
||||
struct armada_37xx_pin_group *grp)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
unsigned int reg = SELECTION;
|
||||
unsigned int mask = grp->reg_mask;
|
||||
int func, val;
|
||||
|
||||
dev_dbg(info->dev, "enable function %s group %s\n",
|
||||
name, grp->name);
|
||||
|
||||
func = armada_37xx_get_func_reg(grp, name);
|
||||
|
||||
if (func < 0)
|
||||
return func;
|
||||
|
||||
val = grp->val[func];
|
||||
|
||||
clrsetbits_le32(info->base + reg, mask, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int armada_37xx_pmx_group_set(struct udevice *dev,
|
||||
unsigned group_selector,
|
||||
unsigned func_selector)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
struct armada_37xx_pin_group *grp = &info->groups[group_selector];
|
||||
const char *name = info->funcs[func_selector].name;
|
||||
|
||||
return armada_37xx_pmx_set_by_name(dev, name, grp);
|
||||
}
|
||||
|
||||
/**
|
||||
* armada_37xx_add_function() - Add a new function to the list
|
||||
* @funcs: array of function to add the new one
|
||||
* @funcsize: size of the remaining space for the function
|
||||
* @name: name of the function to add
|
||||
*
|
||||
* If it is a new function then create it by adding its name else
|
||||
* increment the number of group associated to this function.
|
||||
*/
|
||||
static int armada_37xx_add_function(struct armada_37xx_pmx_func *funcs,
|
||||
int *funcsize, const char *name)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
if (*funcsize <= 0)
|
||||
return -EOVERFLOW;
|
||||
|
||||
while (funcs->ngroups) {
|
||||
/* function already there */
|
||||
if (strcmp(funcs->name, name) == 0) {
|
||||
funcs->ngroups++;
|
||||
|
||||
return -EEXIST;
|
||||
}
|
||||
funcs++;
|
||||
i++;
|
||||
}
|
||||
|
||||
/* append new unique function */
|
||||
funcs->name = name;
|
||||
funcs->ngroups = 1;
|
||||
(*funcsize)--;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* armada_37xx_fill_group() - complete the group array
|
||||
* @info: info driver instance
|
||||
*
|
||||
* Based on the data available from the armada_37xx_pin_group array
|
||||
* completes the last member of the struct for each function: the list
|
||||
* of the groups associated to this function.
|
||||
*
|
||||
*/
|
||||
static int armada_37xx_fill_group(struct armada_37xx_pinctrl *info)
|
||||
{
|
||||
int n, num = 0, funcsize = info->data->nr_pins;
|
||||
|
||||
for (n = 0; n < info->ngroups; n++) {
|
||||
struct armada_37xx_pin_group *grp = &info->groups[n];
|
||||
int i, j, f;
|
||||
|
||||
grp->pins = devm_kzalloc(info->dev,
|
||||
(grp->npins + grp->extra_npins) *
|
||||
sizeof(*grp->pins), GFP_KERNEL);
|
||||
if (!grp->pins)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < grp->npins; i++)
|
||||
grp->pins[i] = grp->start_pin + i;
|
||||
|
||||
for (j = 0; j < grp->extra_npins; j++)
|
||||
grp->pins[i+j] = grp->extra_pin + j;
|
||||
|
||||
for (f = 0; f < NB_FUNCS; f++) {
|
||||
int ret;
|
||||
/* check for unique functions and count groups */
|
||||
ret = armada_37xx_add_function(info->funcs, &funcsize,
|
||||
grp->funcs[f]);
|
||||
if (ret == -EOVERFLOW)
|
||||
dev_err(info->dev,
|
||||
"More functions than pins(%d)\n",
|
||||
info->data->nr_pins);
|
||||
if (ret < 0)
|
||||
continue;
|
||||
num++;
|
||||
}
|
||||
}
|
||||
|
||||
info->nfuncs = num;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* armada_37xx_fill_funcs() - complete the funcs array
|
||||
* @info: info driver instance
|
||||
*
|
||||
* Based on the data available from the armada_37xx_pin_group array
|
||||
* completes the last two member of the struct for each group:
|
||||
* - the list of the pins included in the group
|
||||
* - the list of pinmux functions that can be selected for this group
|
||||
*
|
||||
*/
|
||||
static int armada_37xx_fill_func(struct armada_37xx_pinctrl *info)
|
||||
{
|
||||
struct armada_37xx_pmx_func *funcs = info->funcs;
|
||||
int n;
|
||||
|
||||
for (n = 0; n < info->nfuncs; n++) {
|
||||
const char *name = funcs[n].name;
|
||||
const char **groups;
|
||||
int g;
|
||||
|
||||
funcs[n].groups = devm_kzalloc(info->dev, funcs[n].ngroups *
|
||||
sizeof(*(funcs[n].groups)),
|
||||
GFP_KERNEL);
|
||||
if (!funcs[n].groups)
|
||||
return -ENOMEM;
|
||||
|
||||
groups = funcs[n].groups;
|
||||
|
||||
for (g = 0; g < info->ngroups; g++) {
|
||||
struct armada_37xx_pin_group *gp = &info->groups[g];
|
||||
int f;
|
||||
|
||||
for (f = 0; f < NB_FUNCS; f++) {
|
||||
if (strcmp(gp->funcs[f], name) == 0) {
|
||||
*groups = gp->name;
|
||||
groups++;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int armada_37xx_gpio_get(struct udevice *dev, unsigned int offset)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent);
|
||||
unsigned int reg = INPUT_VAL;
|
||||
unsigned int val, mask;
|
||||
|
||||
armada_37xx_update_reg(®, offset);
|
||||
mask = BIT(offset);
|
||||
|
||||
val = readl(info->base + reg);
|
||||
|
||||
return (val & mask) != 0;
|
||||
}
|
||||
|
||||
static int armada_37xx_gpio_set(struct udevice *dev, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent);
|
||||
unsigned int reg = OUTPUT_VAL;
|
||||
unsigned int mask, val;
|
||||
|
||||
armada_37xx_update_reg(®, offset);
|
||||
mask = BIT(offset);
|
||||
val = value ? mask : 0;
|
||||
|
||||
clrsetbits_le32(info->base + reg, mask, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int armada_37xx_gpio_get_direction(struct udevice *dev,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent);
|
||||
unsigned int reg = OUTPUT_EN;
|
||||
unsigned int val, mask;
|
||||
|
||||
armada_37xx_update_reg(®, offset);
|
||||
mask = BIT(offset);
|
||||
val = readl(info->base + reg);
|
||||
|
||||
if (val & mask)
|
||||
return GPIOF_OUTPUT;
|
||||
else
|
||||
return GPIOF_INPUT;
|
||||
}
|
||||
|
||||
static int armada_37xx_gpio_direction_input(struct udevice *dev,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent);
|
||||
unsigned int reg = OUTPUT_EN;
|
||||
unsigned int mask;
|
||||
|
||||
armada_37xx_update_reg(®, offset);
|
||||
mask = BIT(offset);
|
||||
|
||||
clrbits_le32(info->base + reg, mask);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int armada_37xx_gpio_direction_output(struct udevice *dev,
|
||||
unsigned int offset, int value)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent);
|
||||
unsigned int reg = OUTPUT_EN;
|
||||
unsigned int mask;
|
||||
|
||||
armada_37xx_update_reg(®, offset);
|
||||
mask = BIT(offset);
|
||||
|
||||
setbits_le32(info->base + reg, mask);
|
||||
|
||||
/* And set the requested value */
|
||||
return armada_37xx_gpio_set(dev, offset, value);
|
||||
}
|
||||
|
||||
static int armada_37xx_gpio_probe(struct udevice *dev)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent);
|
||||
struct gpio_dev_priv *uc_priv;
|
||||
|
||||
uc_priv = dev_get_uclass_priv(dev);
|
||||
uc_priv->bank_name = info->data->name;
|
||||
uc_priv->gpio_count = info->data->nr_pins;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dm_gpio_ops armada_37xx_gpio_ops = {
|
||||
.set_value = armada_37xx_gpio_set,
|
||||
.get_value = armada_37xx_gpio_get,
|
||||
.get_function = armada_37xx_gpio_get_direction,
|
||||
.direction_input = armada_37xx_gpio_direction_input,
|
||||
.direction_output = armada_37xx_gpio_direction_output,
|
||||
};
|
||||
|
||||
static struct driver armada_37xx_gpio_driver = {
|
||||
.name = "armada-37xx-gpio",
|
||||
.id = UCLASS_GPIO,
|
||||
.probe = armada_37xx_gpio_probe,
|
||||
.ops = &armada_37xx_gpio_ops,
|
||||
};
|
||||
|
||||
static int armada_37xx_gpiochip_register(struct udevice *parent,
|
||||
struct armada_37xx_pinctrl *info)
|
||||
{
|
||||
const void *blob = gd->fdt_blob;
|
||||
int node = dev_of_offset(parent);
|
||||
struct uclass_driver *drv;
|
||||
struct udevice *dev;
|
||||
int ret = -ENODEV;
|
||||
int subnode;
|
||||
char *name;
|
||||
|
||||
/* Lookup GPIO driver */
|
||||
drv = lists_uclass_lookup(UCLASS_GPIO);
|
||||
if (!drv) {
|
||||
puts("Cannot find GPIO driver\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
fdt_for_each_subnode(subnode, blob, node) {
|
||||
if (!fdtdec_get_bool(blob, subnode, "gpio-controller")) {
|
||||
ret = 0;
|
||||
break;
|
||||
}
|
||||
};
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
name = calloc(1, 32);
|
||||
sprintf(name, "armada-37xx-gpio");
|
||||
|
||||
/* Create child device UCLASS_GPIO and bind it */
|
||||
device_bind(parent, &armada_37xx_gpio_driver, name, NULL, subnode,
|
||||
&dev);
|
||||
dev_set_of_offset(dev, subnode);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct pinctrl_ops armada_37xx_pinctrl_ops = {
|
||||
.get_groups_count = armada_37xx_pmx_get_groups_count,
|
||||
.get_group_name = armada_37xx_pmx_get_group_name,
|
||||
.get_functions_count = armada_37xx_pmx_get_funcs_count,
|
||||
.get_function_name = armada_37xx_pmx_get_func_name,
|
||||
.pinmux_group_set = armada_37xx_pmx_group_set,
|
||||
.set_state = pinctrl_generic_set_state,
|
||||
};
|
||||
|
||||
int armada_37xx_pinctrl_probe(struct udevice *dev)
|
||||
{
|
||||
struct armada_37xx_pinctrl *info = dev_get_priv(dev);
|
||||
const struct armada_37xx_pin_data *pin_data;
|
||||
int ret;
|
||||
|
||||
info->data = (struct armada_37xx_pin_data *)dev_get_driver_data(dev);
|
||||
pin_data = info->data;
|
||||
|
||||
info->base = (void __iomem *)dev_get_addr(dev);
|
||||
if (!info->base) {
|
||||
error("unable to find regmap\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
info->groups = pin_data->groups;
|
||||
info->ngroups = pin_data->ngroups;
|
||||
|
||||
/*
|
||||
* we allocate functions for number of pins and hope there are
|
||||
* fewer unique functions than pins available
|
||||
*/
|
||||
info->funcs = devm_kzalloc(info->dev, pin_data->nr_pins *
|
||||
sizeof(struct armada_37xx_pmx_func), GFP_KERNEL);
|
||||
if (!info->funcs)
|
||||
return -ENOMEM;
|
||||
|
||||
|
||||
ret = armada_37xx_fill_group(info);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = armada_37xx_fill_func(info);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = armada_37xx_gpiochip_register(dev, info);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct udevice_id armada_37xx_pinctrl_of_match[] = {
|
||||
{
|
||||
.compatible = "marvell,armada3710-sb-pinctrl",
|
||||
.data = (ulong)&armada_37xx_pin_sb,
|
||||
},
|
||||
{
|
||||
.compatible = "marvell,armada3710-nb-pinctrl",
|
||||
.data = (ulong)&armada_37xx_pin_nb,
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(armada_37xx_pinctrl) = {
|
||||
.name = "armada-37xx-pinctrl",
|
||||
.id = UCLASS_PINCTRL,
|
||||
.of_match = of_match_ptr(armada_37xx_pinctrl_of_match),
|
||||
.probe = armada_37xx_pinctrl_probe,
|
||||
.priv_auto_alloc_size = sizeof(struct armada_37xx_pinctrl),
|
||||
.ops = &armada_37xx_pinctrl_ops,
|
||||
};
|
||||
|
|
@ -79,7 +79,7 @@
|
|||
#define CONFIG_SYS_ALT_MEMTEST
|
||||
|
||||
/* Keep device tree and initrd in lower memory so the kernel can access them */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
#define RELOCATION_LIMITS_ENV_SETTINGS \
|
||||
"fdt_high=0x10000000\0" \
|
||||
"initrd_high=0x10000000\0"
|
||||
|
||||
|
|
@ -133,4 +133,50 @@
|
|||
*/
|
||||
#include "mv-common.h"
|
||||
|
||||
/* Include the common distro boot environment */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#include <config_distro_defaults.h>
|
||||
|
||||
#ifdef CONFIG_MMC
|
||||
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
|
||||
#else
|
||||
#define BOOT_TARGET_DEVICES_MMC(func)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_STORAGE
|
||||
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
|
||||
#else
|
||||
#define BOOT_TARGET_DEVICES_USB(func)
|
||||
#endif
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
BOOT_TARGET_DEVICES_MMC(func) \
|
||||
BOOT_TARGET_DEVICES_USB(func) \
|
||||
func(PXE, pxe, na) \
|
||||
func(DHCP, dhcp, na)
|
||||
|
||||
#define KERNEL_ADDR_R __stringify(0x800000)
|
||||
#define FDT_ADDR_R __stringify(0x100000)
|
||||
#define RAMDISK_ADDR_R __stringify(0x1800000)
|
||||
#define SCRIPT_ADDR_R __stringify(0x200000)
|
||||
#define PXEFILE_ADDR_R __stringify(0x300000)
|
||||
|
||||
#define LOAD_ADDRESS_ENV_SETTINGS \
|
||||
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
|
||||
"fdt_addr_r=" FDT_ADDR_R "\0" \
|
||||
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
|
||||
"scriptaddr=" SCRIPT_ADDR_R "\0" \
|
||||
"pxefile_addr_r=" PXEFILE_ADDR_R "\0"
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
RELOCATION_LIMITS_ENV_SETTINGS \
|
||||
LOAD_ADDRESS_ENV_SETTINGS \
|
||||
"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
|
||||
"console=ttyS0,115200\0" \
|
||||
BOOTENV
|
||||
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
#endif /* _CONFIG_CLEARFOG_H */
|
||||
|
|
|
|||
|
|
@ -1476,47 +1476,6 @@ static int image_get_version(void)
|
|||
return e->version;
|
||||
}
|
||||
|
||||
static int image_version_file(const char *input)
|
||||
{
|
||||
FILE *fcfg;
|
||||
int version;
|
||||
int ret;
|
||||
|
||||
fcfg = fopen(input, "r");
|
||||
if (!fcfg) {
|
||||
fprintf(stderr, "Could not open input file %s\n", input);
|
||||
return -1;
|
||||
}
|
||||
|
||||
image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
|
||||
sizeof(struct image_cfg_element));
|
||||
if (!image_cfg) {
|
||||
fprintf(stderr, "Cannot allocate memory\n");
|
||||
fclose(fcfg);
|
||||
return -1;
|
||||
}
|
||||
|
||||
memset(image_cfg, 0,
|
||||
IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element));
|
||||
rewind(fcfg);
|
||||
|
||||
ret = image_create_config_parse(fcfg);
|
||||
fclose(fcfg);
|
||||
if (ret) {
|
||||
free(image_cfg);
|
||||
return -1;
|
||||
}
|
||||
|
||||
version = image_get_version();
|
||||
/* Fallback to version 0 is no version is provided in the cfg file */
|
||||
if (version == -1)
|
||||
version = 0;
|
||||
|
||||
free(image_cfg);
|
||||
|
||||
return version;
|
||||
}
|
||||
|
||||
static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd,
|
||||
struct image_tool_params *params)
|
||||
{
|
||||
|
|
@ -1657,18 +1616,62 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size,
|
|||
static int kwbimage_generate(struct image_tool_params *params,
|
||||
struct image_type_params *tparams)
|
||||
{
|
||||
FILE *fcfg;
|
||||
int alloc_len;
|
||||
int version;
|
||||
void *hdr;
|
||||
int version = 0;
|
||||
int ret;
|
||||
|
||||
version = image_version_file(params->imagename);
|
||||
if (version == 0) {
|
||||
fcfg = fopen(params->imagename, "r");
|
||||
if (!fcfg) {
|
||||
fprintf(stderr, "Could not open input file %s\n",
|
||||
params->imagename);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX *
|
||||
sizeof(struct image_cfg_element));
|
||||
if (!image_cfg) {
|
||||
fprintf(stderr, "Cannot allocate memory\n");
|
||||
fclose(fcfg);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
memset(image_cfg, 0,
|
||||
IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element));
|
||||
rewind(fcfg);
|
||||
|
||||
ret = image_create_config_parse(fcfg);
|
||||
fclose(fcfg);
|
||||
if (ret) {
|
||||
free(image_cfg);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
version = image_get_version();
|
||||
switch (version) {
|
||||
/*
|
||||
* Fallback to version 0 if no version is provided in the
|
||||
* cfg file
|
||||
*/
|
||||
case -1:
|
||||
case 0:
|
||||
alloc_len = sizeof(struct main_hdr_v0) +
|
||||
sizeof(struct ext_hdr_v0);
|
||||
} else {
|
||||
break;
|
||||
|
||||
case 1:
|
||||
alloc_len = image_headersz_v1(NULL);
|
||||
break;
|
||||
|
||||
default:
|
||||
fprintf(stderr, "Unsupported version %d\n", version);
|
||||
free(image_cfg);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
free(image_cfg);
|
||||
|
||||
hdr = malloc(alloc_len);
|
||||
if (!hdr) {
|
||||
fprintf(stderr, "%s: malloc return failure: %s\n",
|
||||
|
|
|
|||
Loading…
Reference in a new issue