Fix usage of 'mmc rescan' by many configs. Proper use is
'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan
the device. 'mmc rescan' itself does not take any arguments.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.
SERDES Connections
32 lanes grouped into four 8-lane banks
Two “front side” banks dedicated to Ethernet
Two “back side” banks dedicated to other protocols
DDR Controllers
Three independant 64-bit DDR3 controllers
Supports rates up to 2133 MHz data-rate
Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA
Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.
Detail information can be found in doc/README.t4qds
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The P5040 does not have SRIO, so don't put the SRIO definitions in
corenet_ds.h. They belong in the board-specific header files.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Some of the boards still used the old PXA_MMC driver instead of the
new generic one. Use the new one instead so the old can be removed
and the generic MMC framework can be properly used.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Flip the boards to use the generic bounce buffer instead of the
MMC one.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch provides a support to use buffered writes on flash
for versatile and vexpress boards.
This will certainly increase the flash writes.
Signed-off-by: Jagannadha Sutradharudu Teki <402jagan@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Oliver Brown <obrown@adventnetworks.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
The sbc8548/60 (both similar, just variations in UART hardware)
support has been removed from the linux kernel as of v3.6-rc1~132
so lets also now remove it from the u-boot tree as well.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The recent U-Boot version 2012.07 has improved drivers
(e.g. MMC and network/FEC) regarding DCache handling.
So it should be safe to use the DCache on the i.MX6, now.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
move most of mpc8xx hooks from cmd_ide.c into ide_preinit() and newly created
ide_init_postreset() (invoked after calling ide_reset after ide_preinit),
some cleanup to make checkpatch happy, enable IDE init hooks in configs of
affected boards.
confusingly, these hooks are used by more than just mpc8xx-based boards, and
therefore are placed in arch/ppc/lib/
note: checkpatch still emits warnings about using volatile
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: James F. Dougherty <jfd@broadcom.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
We define CONFIG_SYS_TEXT_BASE in board's specified header file.
So config.mk is useless, then remove it.
Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.
Displays supported:
HDMI - 1024 x 768 for maximum compatibility
Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.
Setting 'panel' environment variable to one of the names above will
override auto-detection.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we
move this to the board configuration file.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Add basic support for HP iPAQ h2200 palmtop. h2200 palmtop was targeted
to general consumers. It has 64 MB of RAM, 32 MB flash. No intergrated
Wi-Fi nor Ethernet. Based on Intel PXA255 processor. It was shipped with
Windows CE 4.2 operating system.
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch.
This patch add support for the extentin bits.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Since commit 50d4a707f0 (mx5/6: Define default SoC input clock frequencies)
we can use the default clock values.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
The mx6qsabreauto console is different than mx6qsabresd so the console
configuration is now set in the board file.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx6qsabresd has a AR8031 Gigabit PHY.
Add support for it.
Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail.
Tested on 1Gbp and 100Mbps networks.
Suggested-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
mx6qsabresd is a board based on mx6q SoC with the following features:
- 1GB of DDR3
- 1 USB OTG port
- 1 HDMI output port
- SPI NOR
- LVDS panel
- Gigabit Ethernet
- Camera Connector
- eMMC and SD card slot
- Audio
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This is extremely likely to be used from the boot.scr that Tegra's default
bootcmd locates and executes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Medcom is the marketing name for an older, PXA-based version of the same
device. In order to avoid confusion, rename the Tegra-based version to
the new marketing name.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: James MacAulay <james.macaulay@amirix.com>
Acked-by: Marek Vasut <marex@denx.de>
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter De Schrijver <p2@mind.be>
Acked-by: Marek Vasut <marex@denx.de>
Since the IOP480 (PPC401/3 variant from PLX) is only used on 2
boards that are not actively maintained, lets remove support
for it completely. This way the ppc4xx code will get a bit cleaner.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Marek Vasut <marex@denx.de>
Remove any notion of CONFIG_SERIAL_MULTI from board config files.
Since CONFIG_SERIAL_MULTI is now enabled by default, it is useless
to specify this config option in the board config files. Therefore
remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Rework the emulation of serial console via JTAG from simple ad-hoc
implementation of serial port routines to CONFIG_SERIAL_MULTI and
enable CONFIG_SERIAL_MULTI unconditionally for blackfin.
In order for the JTAG serial console to take precedence over all
other serial ports available in system, implement override for
default_serial_console call returning this JTAG serial console.
This brings in a bit of a growth of size, but eventually will allow
us to unconditionally enable CONFIG_SERIAL_MULTI throughout the whole
U-Boot and maintain only one serial subsystem.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Remove the prototypes for zoom2_serial_deviceN from serial.h . This
can't be done right away, as they are referenced from the zoom2
config file. Therefore, adjust the code so the config file only
specifies number of the port. Then, replace the simple return in
default_serial_console() with a switch across possible values, which
returns the zoom2_serial_deviceN . With such adjustment in place,
the exported prototypes in serial.h can be safely removed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Some of the boards using the mpc512x serial driver didn't properly
define which PSC console to use. This caused breakage when building
with CONFIG_SERIAL_MULTI enabled. Fix this by defining the default
PSC console.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Make use of the newly implemented weak default_serial_console in
the serial_pxa driver. This removes all reimplementations of this
function from board files.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Kill multiple occurances and redeclaration of MK_STR
in favor of __stringify().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Kill multiple occurances and redeclaration of xstr in favor of __stringify().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
The SPI flash is not properly detected by plain "sf probe" due to
it being located on different bus and different chipselect. Fix
this problem.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
The default configuration for ml507 will generate a hang() in the
Xilinx uartlite driver.
userial_ports[] in drivers/serial/serial_xuartlite.c does not get
initialized properly. CONFIG_SERIAL_BASE is unused.
XILINX_UARTLITE_BASEADDR is used instead.
Signed-off-by: Rommel Custodio <sessyargc+uboot@gmail.com>
Due to grown code sizes the TQM85xx boards don't build any more with
some older tool chains (like ELDK 4.2). As these boards have long
reached EOL it seems a waste of effort trying to fix them. The vendor
has agreed to drop support for them, too. So let's get rid of them.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Chin Liang See <clsee@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Tom Trini <trini@ti.com>
Cc: Wolfgang Denx <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
----
v8: Remove no_return attribute for reset_cpu
Based on v2012.10-rc2
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Marek Vasut <marex@denx.de>
CC: Joe Hershberger <joe.hershberger@gmail.com>
This patch adds support for the X600 SPEAr600 based board. Its also
the first SPEAr600 board that uses the newly introduced SPEAr600
SPL support. Xloader is not necessary any more. By using the new
"u-boot.spr" make target, one image will generated containing both,
U-Boot SPL (with mkimage header as needed by the SPEAr BootROM, and
the main U-Boot with mkimage header.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Malloc len of 128K caused a warning from
ehci_hcd asking for more.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
This patch adds support for the LaCie board d2 Network v2 which share
a lot of hardware caracteristics with the 2Big Network v2.
- CPU: Marvell 88F6281 1200Mhz
- SDRAM memory: 256MB DDR2 400Mhz
- 2 SATA ports: internal and eSATA
- Gigabit ethernet: PHY Marvell 88E1116R
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- i2c EEPROM: 512 bytes (24C04 type)
- 2 USB2 ports: host and host/device
- 1 push button
- 1 power switch
- 1 SATA LED (bi-color, blue and red)
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
This patch adds support for the LaCie boards Network Space v2 (Lite and
Mini). This two boards are derived from the Network Space v2 and a lot
of hardware caracteristics are shared.
- CPU: Marvell 88F6192 800Mhz
- SDRAM memory: 128MB DDR2 200Mhz
- 1 SATA port: internal
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- i2c EEPROM: 512 bytes (24C04 type)
- 2 USB2 ports (Lite only): host and host/device
- 1 push button
- 1 SATA LED (bi-color, blue and red)
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Defines CONFIG_EFI_PARTITION for LaCie boards.
Additionally this patch defines CONFIG_DOS_PARTITION. Note that this
definition is implicit in mv_common.h when CONFIG_CMD_USB is enabled.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Support of the MINI2440 board from FriendlyARM from
an old version of u-boot :
http://repo.or.cz/r/u-boot-openmoko/mini2440.git
Currently, supporting only boot from NOR.
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
kzm9g board use global timer. But by commit 813ffda31, timer function of
rmobile was changed that global timer might be used, when CONFIG_GLOBAL_TIMER
was defined.
This add CONFIG_GLOBAL_TIMER to board config file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Remove CONFIG_INTEGRATOR and CONFIG_ARCH_CINTEGRATOR. These are not for kzm9g.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The value of CONFIG_BAUDRATE is treated as string and put as initial value of
environment variable. If it begin with '(', it is wrongly parsed to 0 in number.
So I removed '(' and ')'.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reserve first 16MB for RT-CPU (as same as kernel config).
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM,
USB, Ethernet, and more.
This patch supports the following functions:
- 512MB DDR2-SDRAM
- 16MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SMSC)
- I2C
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since a while, the size of the u-boot.bin image is larger than
256kB. This requires moving the environment sectors by one. As
we are at it, we also update a few other custom settings.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
A fast boot is important to the beaglebone, so save 2 seconds here by
decreasing bootdelay. This is still plenty time to break into the prompt,
I do that at least once a day.
Mount the rootfs RO by default, this is needed to make fsck succeed
without resorting to an initramfs.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
This patch adds support for networking in SPL on TI AM335x based
boards. Vendor Class Identifier used by SPL during BOOTP is
"AM335x U-Boot SPL".
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Do not allow to overwrite it when video is enabled.
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The common spl framework expects the u-boot payload size through
CONFIG_SYS_MONITOR_LEN. Define the macro with the u-boot's size. With
this change, CONFIG_SYS_NAND_U_BOOT_SIZE is no longer required. Delete
the same.
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs.
- Remove duplicated code.
- Add spl_boot_device() that returns the statically chosen boot device.
Signed-off-by: Tom Rini <trini@ti.com>
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards. We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave
the NAND one in-place as we plan to replace it later in this series.
We use common/spl to avoid linker problems with respect to merging
constant strings in objects. Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.
Signed-off-by: Tom Rini <trini@ti.com>
This is an OMAP/related-specific function, move calling it to
spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that
enabled NAND and didn't enable this already.
Signed-off-by: Tom Rini <trini@ti.com>
Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing. Change how this works to
be opt-in and only turned on for omap4/5 now.
Signed-off-by: Tom Rini <trini@ti.com>
The environment now uses expressions but we missed the setexpr command
was not being include. This patch adds it.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.
If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.
Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch fixes the build error for MCF537x. As the NANDFLASH_SIZE is
redefined in boards.cfg, it is needed to rename NANDFLASH_SIZE into
CONFIG_NANDFLASH_SIZE in include/configs/M5373EVB.h.
Signed-off-by: Alison Wang <b18965@freescale.com>
Add support for the onboard eSDHC MMC controller. The hardware on the
MPC8308RDB has the following errata:
- ESDHC111: manual asynchronous CMD12 is broken
- DMA is broken (PIO works)
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
[added include fsl_esdhc header to prevent implicit declarations of
fsl_esdhc_mmc_init() and fdt_fixup_esdhc()]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.
This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This board is the only board that still sticks to OneNAND IPL.
Remove this board, since we have SPL around for a while and
OneNAND is well supported in the SPL framework. The board can
be revived if necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Tom Rini <trini@ti.com>
There is no reason to have board configs to select the NFC IP revision. Just let
the driver detect it. BTW, remove broken NFC IP revision configs from board
config files.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The mainline linux kernel is moving to flatten device tree support
Add the CONFIG_OF_LIBFDT option to support booting DT linux kernel
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The environment has been based on mx53loco and m28evk but keeping the
possibility to easy change the default console device as Freescale and
mainline kernels differ on the device name.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This patch is derived from an older patch provided by atmel in its
buildroot-avr32-v3.0.0.tar.bz2
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Fix CONFIG_SYS_HZ usage in board config.
Do not use hardcoded value. Use CONFIG_SYS_HZ instead.
Separate static configuration to single block.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.
Upcoming Tegra30 port will use common code/defines/names where possible.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
When I set up Tegra's config files to put the environment into eMMC, I
assumed that CONFIG_ENV_OFFSET was a linearized address relative to the
start of the eMMC device, and spanning HW partitions boot0, boot1,
general* and the user area in order. However, it turns out that the
offset is actually relative to the beginning of the user area. Hence,
the environment block ended up in a different location to expected and
documented.
Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust
CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire
eMMC.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Define default SoC input clock frequencies for i.MX31 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Helmut Raiger <helmut.raiger@hale.at>
Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Samsung SoC use the cmu control to set clock.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When I set up Tegra's config files to put the environment into eMMC, I
assumed that CONFIG_ENV_OFFSET was a linearized address relative to the
start of the eMMC device, and spanning HW partitions boot0, boot1,
general* and the user area in order. However, it turns out that the
offset is actually relative to the beginning of the user area. Hence,
the environment block ended up in a different location to expected and
documented.
Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust
CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire
eMMC.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.
Signed-off-by: Stefano Babic <sbabic@denx.de>
In order to use the serial interface on the PortuxG20 we need to enable the
level converter first by setting the PC9 pin to high. The level converter needs
some time to settle so we have to use the mdelay() function to wait for some
time. Unfortunately we have no timers available at board_early_init_f() so we
enable the serial output early within board_postclk_init().
Now the U-Boot output looks fine:
| U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32)
|
| CPU: AT91SAM9G20
| Crystal frequency: 18.432 MHz
| CPU clock : 396.288 MHz
| Master clock : 132.096 MHz
| DRAM: 64 MiB
| WARNING: Caches not enabled
| NAND: 128 MiB
| In: serial
| Out: serial
| Err: serial
| Net: macb0
| Hit any key to stop autoboot: 0
Signed-off-by: Markus Hubig <mhubig@imko.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The configuration that is common for all Integrator boards may
just as well be stored in a common include file as per pattern
from other boards. This eases maintenance quite a bit.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mtd name of the NAND in Linux is "gpmi-nand", not "gpmi-nand.0" as
it would be expected, since the controller doesn't support multiple NANDs
attached to it as of now. Rectify this flub by adjusting default mtdparts.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
For some reasons we had an own implementaion of dram_init and
dram_init_banksize. This is not needed anymore, use the standard
kirkwood functions instead.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
According to our last HW measures, this could be raised while still
compatible with the potential delays on the lines.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
These parameters are used by the the sf probe command that are used by
our update script and they therefore need to be set for all of our
boards.
The timing is the same as for the ENV SPI NOR Flash (since it's the
same physical device) and takes the boco2 delay on the bus into account.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Orion5x did not actually write GPIO output values
or input polarities, and ED Mini V2 had bad or
missing values for GPIO settings.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* 'master' of git://git.denx.de/u-boot-usb:
MUSB driver: Timeout is never detected as the while loop does not end
usb: fix ulpi_set_vbus prototype
pxa25x: Add UDC registers definitions
USB: Fix strict aliasing in ohci-hcd
usb: Optimize USB storage read/write
ehci: Optimize qTD allocations
usb_stor_BBB_transport: Do not delay when not required
usb_storage: Remove EHCI constraints
usb_storage: Restore non-EHCI support
ehci-hcd: Boost transfer speed
ehci: cosmetic: Define used constants
ehci: Fail for multi-transaction interrupt transfers
arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
arm:trats: Support for USB UDC driver at TRATS board.
dfu:cmd: Support for DFU u-boot command
dfu: MMC specific routines for DFU operation
dfu: DFU backend implementation
dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
dfu:usb: Support for g_dnl composite download gadget.
ehci: cosmetic: Define the number of qt_buffers
Signed-off-by: Wolfgang Denk <wd@denx.de>
Add at91sam9x5 series spi flash boot support
Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321
serial flash
SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on
atmel_spi patch, or else, it will occur receive overrun
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on TOT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The old update script uses 'load_addr' which is never set. Use 'fileaddr'
instead which is automagically set by e.g. dhcp.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Stelian Pop <stelian@popies.net>
Remove CONFIG_ARCH_CPU_INIT, no need it anymore
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Enable the g_dnl composite USB gadget driver with embedded DFU function on it.
It now uses the composite gadget framework to support download specific
USB functions (like enabled DFU or USB Mass Storage).
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory
* Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Align the SSP clock speed with oscilator to achieve
higher transfer stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
There is no need to undef an option that is not enabled by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
For i.MX233 addition the base registers need to be change so the SoC
definition needs to be known before the header include.
The following boards has been changed:
* apx4devkit
* m28evk
* mx28evk
* sc_sps_1
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
This allows a watchdog reset to start the ROM's
usb/serial downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This patch sets UART3 and MMC channle 0 for Exynos5250 Rev 1.0
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Default spl/u-boot-spl.lds created by spl/Makefile resolves
the spl text load addr to 0x0. As 0x0 belongs to iROM addr so
Global variables can not be used.
Adding specific smdk5250-uboot-spl.lds makes possible to use Global Variables
in spl.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
CONFIG_STACKSIZE is not referenced anywhere except on AVR32, but present
in most ARM board config files.
IRQs are only enabled for 1 config, so remove the unused config options
for IRQ and FIQ stack size as well.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards. Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add tegra20-common-post.h to be consistent with other tegra20 boards.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA.
The meaning of the config options is now:
CONFIG_TEGRA - Any tegra chip
CONFIG_TEGRA20 - A tegra20 family chip
CONFIG_TEGRA30 - A tegra30 family chip (not added yet)
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM,
contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors.
For more details, see http://www.raspberrypi.org/.
Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack
relocation to top of RAM) extracted from work by:
Oleksandr Tymoshenko <gonzo@bluezbox.com>.
GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Tom Rini <trini@ti.com>
Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2. As such, card configuration specifics need
to reside in the board file rather than the driver.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Enabling timers and clocks in PRCMU and cleaning up mailbox.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.
Move the usb header for da8xx platforms under arch-davinci.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms. As part of this we change some of the macros that are used
to be more clear. Previously (except for am335x evm) we had been
setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
equivalent to simply referencing NON_SECURE_SRAM_END. On am335x evm we
should have been doing this initially and do now.
Cc: Sricharan R <r.sricharan@ti.com>
Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
Fix build failure due the move of mx28 code to 'mxs' SoC.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to share code
among them.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
This adds support for Bluegiga APX4 Development Kit. It is built around
Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC,
RTC and USB. APX4 has only one ethernet port.
Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Stefano Babic <sbabic@denx.de>
This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.
Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
Add at91sam9x5ek board support, this board support the following SoCs
AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35
Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Beaglebone uses SMSC PHY which works incorrectly with generic PHY
driver so enable SMSC PHY driver to fix networking problems on
Beaglebone.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This fixes the breakage with SPL on most OMAP boards after the GPIO
driver was moved.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
- Add default commands
- Add HUSH parser
- Make environment, malloc areas larger
- Add ATAGS and OF_LIBFDT
- Add defaults to boot ramdisk and MMC, use uEnv.txt
Signed-off-by: Tom Rini <trini@ti.com>
This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
IGEP-based boards can have two different flash memories, a OneNAND or a
NAND device. Add a configuration option for to choose which memory to use.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split board-specific part into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
omap2plus_defconfig now has built-in compile support for EXT4 enabled
by default now. So, we can use EXT4 as the default root file system
type for MMC.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
An OMAP specific serial driver was merged on the Linux kenel a long
time ago. So, it makes sense to default the console name to OMAP
ttyO instead of the generic ttyS naming.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
This patch adds support for direct NOR boot mode on
da850/omap-l138. Added da850evm_direct_nor entry in
boards.cfg to allow to build targets.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will
be in SPI flash and U-Boot image will be in MMC/SD card. SPL will
do the low level initialization and then loads the u-boot image
from MMC/SD card.
Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138
configuration file to enable this feature.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
define SPI specific configs for SPL only when CONFIG_USE_SPIFLASH
config is defined
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
On Logic PD Rev.3 DA850/OMAP-L138 EVM, NOR and MMC/SD cannot
work together. This patch enables the MMC/SD support only
when NOR support is disabled. NOR Flash identification works
even without this patch, but erase and write will have issues.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
This patch adds support for MMC/SD on DA850/OMAP-L138.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
UART_RESET, UART_CLK_RUNNING_MASK, and UART_SMART_IDLE_EN
are defined inn evm.c but not used. Also removes unnecessary
include of serial.h
PHYS_DRAM_1_SIZE is defined in am335x_evm.h but never used.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Parameters used for configuring certain SoC peripherals are parsed
from the cfg file and appended as part of the ais image's header. The
u-boot-spl.ais generated is flashed separately to the nand, so do not
delete the file after generation of u-boot.ais.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
is now usable not only by powerpc platforms, but others as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Manfred Rudigier <manfred.rudigier@omicron.at>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Remove old o2dnt board without OF support. New support for this board
is added by the previous patch, O2I configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add common code for o2dnt and o2dnt2 based boards and add different
board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and
O3DNT boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Currently the -PC variants of the P1/P2 RDB boards do not print it on boot --
e.g. a P2020RDB-PC will claim to be a plain P2020RDB. Besides being incorrect,
this can confuse a user into building U-Boot for P2020RDB rather than P2020RDB-PC,
resulting in a board that does not boot.
P1024RDB and P1025RDB are not included, as these boards apparently do not
have -PC as part of their name, even though they are supported by p1_p2_rdb_pc.
The P2020RDB variant covered by this is apparently P2020RDB-PCA rather
than P2020RDB-PC.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
These are not supported as individual build targets, but instead
are supported by another target.
The dead p4040 defines in particular had bitrotted significantly.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The P3060 was cancelled before it went into production, so there's no point
in supporting it.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.
Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.
NOTE: Because the slave can not erase, write master's NOR flash by
PCIE interface, so it can not modify the ENV parameters stored
in master's NOR flash using "saveenv" or other commands.
environment and requirement:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image is in master NOR flash.
3. Put the slave's ucode and ENV into it's own memory space.
4. Normally boot from local NOR flash.
5. Configure PCIE system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to one PCIE interface by RCW.
3. RCW should configure the SerDes, PCIE interfaces correctly.
4. Must set all the cores in holdoff by RCW.
5. Must be powered on before master's boot.
For the slave module, need to finish these processes:
1. Set the boot location to one PCIE interface by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID of one PCIE for the boot.
4. Set a specific TLB entry in order to fetch ucode and ENV from
master.
5. Set a LAW entry with the TargetID one of the PCIE ports for
ucode and ENV.
6. Slave's u-boot image should be generated specifically by
make xxxx_SRIO_PCIE_BOOT_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
1. Updated the README.srio-boot-corenet to add descriptions about
boot from PCIE, and change the name to
README.srio-pcie-boot-corenet.
2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
"xxxx_SRIO_PCIE_BOOT", and the image builded with
"xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
from PCIE.
3. Updated other macros and documents if needed to add information
about boot from PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
For the powerpc processors with PCIE interface, boot location can be
configured from one PCIE interface by RCW. The processor booting from PCIE
can do without flash for u-boot image. The image can be fetched from another
processor's memory space by PCIE link connected between them.
The processor booting from PCIE is slave, the processor booting from normal
flash memory space is master, and it can help slave to boot from master's
memory space.
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.
Environment and requirement:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image is in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure PCIE system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to one PCIE interface by RCW.
3. RCW should configure the SerDes, PCIE interfaces correctly.
4. Must set all the cores in holdoff by RCW.
5. Must be powered on before master's boot.
For the master module, need to finish these processes:
1. Initialize the PCIE port and address space.
2. Set inbound PCIE windows covered slave's u-boot image stored in
master's NOR flash.
3. Set outbound windows in order to configure slave's registers
for the core's releasing.
4. Should set the environment variable "bootmaster" to "PCIE1", "PCIE2"
or "PCIE3" using the following command:
setenv bootmaster PCIE1
saveenv
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.
This has the following advantages:
1. No longer need to rebuild an image when change the SRIO port for
boot from SRIO, just rewrite the new RCW with selected port,
then the code will get the port information by reading new RCW.
2. It will be easier to support other boot location options, for
example, boot from PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as
a SRIO boot master via environment variable. Set the environment variable
"bootmaster" to "SRIO1" or "SRIO2" using the following command:
setenv bootmaster SRIO1
saveenv
The "bootmaster" will enable the function of the SRIO boot master, and
this has the following advantages compared with SRIOBOOT_MASTER build
configuration:
1. Reduce a build configuration item in boards.cfg file.
No longer need to build a special image for master, just use a
normal target image and set the "bootmaster" variable.
2. No longer need to rebuild an image when change the SRIO port for
boot from SRIO, just set the corresponding value to "bootmaster"
based on the using SRIO port.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The BR_PHYS_ADDR(x) macro was missing parentheses around "x" in the macro
definition, so callers had to supply their own parenthesis.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
ENV location compile logic is wrong, and when CONFIG_SYS_NO_FLASH is defined
and non-NOR u-boot is building, it will cause compile error. Also, add
CONFIG_SYS_FLASH_USE_BUFFER_WRITE for p2041, which will improve NOR flash
write performance.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add TLB mappings, board target options, and configuration items
need for SPI/SD boot.
Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit
address flash, therefore, when SDHC/ESPI booting and access to eLBC,
the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to
00b for them.
Configure the PX_BRDCFG0[0~1] to 10b which is connected to
SPI devices as SPI_CS(0:3)_B.
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The HW guys suggested to change these two values. And these values are
now identical to the values we use on mgcoge.
PSDMR_WRC was set to 1C as it should lead to better performance.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
mgcoge2ne was an intermediate step towards mgcoge3ne. One difference is the
smaller SDRAM on mgcoge2ne (128MB). To support both boards with the same
u-boot we use here the SDRAM detection.
This patch enables SDRAM detection between 256MB and 128MB.
So in addition to the existing 256MB geometry:
4 chips x 8M (13 rows, 10 cols) x 16 bit x 4 banks
we can now also have 128MB geometry:
4 chips x 4M (13 rows, 9 cols) x 16 bit x 4 banks
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
The only file including km82xx-common.h is km82xx.h.
So there is no need to have it as a separate file.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Since mgcoge and mgcoge3ne are the only km82xx boards, there is no need
to keep them as separate .h config files.
Therefore, make mgcoge3ne.h and mgcoge.h converge into a single km82xx.h
file.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
* 'master' of git://git.denx.de/u-boot-i2c:
km/common: remove printfs for i2c deblocking code
CONFIG: SMDK5250: I2C: Enable I2C
I2C: Add support for Multi channel
I2C: Modify the I2C driver for EXYNOS5
I2C: Move struct s3c24x0_i2c to a common place.
EXYNOS: PINMUX: Add pinmux support for I2C
EXYNOS5: define EXYNOS5_I2C_SPACING
EXYNOS: Add I2C base address.
EXYNOS: CLK: Add i2c clock
mx6qsabrelite: add i2c multi-bus support
imx-common: add i2c.c for bus recovery support
i.mx53: add definition for I2C3_BASE_ADDR
i.mx: iomux-v3.c: move to imx-common directory
i.mx: iomux-v3.h: move to imx-common include directory
iomux-v3: remove include of mx6x_pins.h
mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
mxc_i2c: add bus recovery support
mxc_i2c: prep work for multiple busses support
mxc_i2c: add i2c_regs argument to i2c_imx_stop
mxc_i2c: add retries
mxc_i2c: check for arbitration lost
mxc_i2c: change slave addr if conflicts with destination.
mxc_i2c: don't disable controller after every transaction
mxc_i2c: place i2c_reset code inline
mxc_i2c: place imx_start code inline
mxc_i2c: remove redundant read
mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state
mxc_i2c.c: code i2c_probe as a 0 length i2c_write
mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
mxc_i2c: create i2c_init_transfer
mxc_i2c: clear i2sr before waiting for bit
mxc_i2c: create tx_byte function
mxc_i2c: remove ifdef of CONFIG_HARD_I2C
mxc_i2c: fix i2c_imx_stop
i2c: deblock i2c bus also if accessed before realocation
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-microblaze:
microblaze: Wire up SPI driver
spi: microblaze: Adds driver for Xilinx SPI controller
microblaze: intc: Clear interrupt code
microblaze: Call serial multi initialization
microblaze: Move __udelay implementation
microblaze: Remove extern from board.c
microblaze: Wire up dts configuration
fdt: Add board specific dts inclusion
microblaze: Move individual board linker scripts to common script in cpu tree.
microblaze: Add gpio.h
microblaze: Add missing undefs for UBI and UBIFS
microblaze: Expand and correct configuration comments
microblaze: Enable ubi support
microblaze: Avoid compile error on systems without cfi flash
microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION
Conflicts:
drivers/spi/Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
This enables I2C support on smdk5250.
Pinmux setting moved to board file to avoid repeated setting of
gpio lines.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Depending on XILINX_SPI_FLASH_BASEADDR enable SPI flash
and environment in SPI flash.
Expected values from xparameters.h are:
- XILINX_SPI_FLASH_BASEADDR
- XILINX_SPI_FLASH_MAX_FREQ
- XILINX_SPI_FLASH_CS
Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Michal Simek <monstr@monstr.eu>
* 'next' of git://git.denx.de/u-boot:
MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
doc: cleanup - move board READMEs into respective board directories
net: sh_eth: add support for SH7757's GETHER
net: sh_eth: modify the definitions of regsiter
net: sh_eth: add SH_ETH_TYPE_ condition
net: sh_eth: clean up for the SH7757's code
net: fec_mxc: Fix MDC for xMII
net: fec_mxc: Fix setting of RCR for xMII
net: nfs: make NFS_TIMEOUT configurable
net: Inline the new eth_setenv_enetaddr_by_index function
net: allow setting env enetaddr from net device setting
net/designware: Consecutive writes to the same register to be avoided
CACHE: net: asix: Fix asix driver to work with data cache on
net: phy: micrel: make ksz9021 phy accessible
net: abort network initialization if the PHY driver fails
phylib: phy_startup() should return an error code on failure
net: tftp: fix type of block arg to store_block
Signed-off-by: Wolfgang Denk <wd@denx.de>
Hawkboard was using the wrong nand_read_page version for SPL image.
As a side effect, the u-boot image loaded by the SPL from nand
was getting corrupted.
Enable CONFIG_SYS_NAND_HW_ECC_OOBFIRST to select the correct nand_read_page
algorithm for SPL.
Signed-off-by: Linu Cherian <linucherian@gmail.com>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Acked-by: Tom Rini <trini@ti.com>
