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12076 commits

Author SHA1 Message Date
Stefano Babic
81687212ee I2C: mxc_i2c: address failure with mx35 processor
There is sporadic failures when more as one I2C slave
is on the bus and the processor tries to communicate
with more as one slave.
The problem was seen on a mx35pdk (two I2C slaves,
PMIC controller and CAN/RTC chip).

The current driver uses the IIF bit in the status register
to check if the bus is busy or not. According to the manual,
this is not correct, because the IIB bit should be checked.
Not only, to check if a transfer is finished must be checked
the ICF bit, and this is not tested at all.

This patch comes from analyse with a corresponding driver
provided by Freescale as part of the LTIB tool. Comparing
the two drivers, it appears that the current u-boot driver checks
the wrong bits, and depending on race condition, the transfer
can be successful or not.

The patch gets rid also of own debug function (DPRINTF),
replaced with the general debug().

Tested on Freescale mx35pdk.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2011-02-02 00:54:43 +01:00
Stefano Babic
1d549ade61 I2C: mxc_i2c: get rid of __REG access
This driver accesses to processor's register
via __REG macros, that are removed (or are planned
to be removed) and replaced by C structures.
This patches replaces all occurrencies of __REG macros.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2011-02-02 00:54:42 +01:00
Stefano Babic
04220612f6 mxc_i2c: Add support for the i.MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2011-02-02 00:54:42 +01:00
Stefano Babic
1b22b0d35b serial_mxc: add support for Freescale's i.MX35 processor
The patch adds UART support for the i.MX35 processor.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:42 +01:00
Stefano Babic
b9bb053159 Add support for MX35 processor
The patch adds basic support for the Freescale's i.MX35
(arm1136 based) processor.

The patch adds also a prototype for the initialization
of the FEC(ethernet controller) to netdev.h to avoid
warnings.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:42 +01:00
Marek Vasut
d59140170a iMX5: EfikaMX: Preliminary board support
Supported:
MMC
IDE
PMIC
SPI flash
LEDs

I can boot the kernel supplied by freescale/genesi with this from MMC card
and/or PATA disk.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
8a1edd7d54 imximage: Add MX53 boot image support
This patch add the MX53 boot image support.

This patch has been tested on Freescale MX53EVK board
and MX51EVK board.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Marek Vasut
c4a3c7442b MX51EVK: Use SWx macros in PMIC init
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-02-02 00:54:42 +01:00
Marek Vasut
3db9e9d7b4 MC13892: Add SWx buck switchers definitions
Define voltages configurable on SWx buck switchers.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:42 +01:00
Stefano Babic
58c758fe5a mxc_nand: add support for i.MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-02-02 00:54:42 +01:00
Marek Vasut
76f260d105 BLOCK: Add freescale IMX51 PATA driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
94391fbcee MX5:MX53: add initial support for MX53EVK board
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been supported.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
3382fd48f2 fsl_pmic: add I2C interface support
This patch add I2C interface for fsl_pmic driver support

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
127cec1889 mxc_i2c: add support for MX53 processor
This patch add I2C support for Freescale MX53 processor

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
01643ec180 mxc_gpio: add support for MX53 processor
This patch add mxc_gpio support for Freescale MX53 processor

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Liu Hui-R64343
0c466ad017 serial_mxc: add support for MX53 processor
This patch add UART support for Freescale MX53 processor

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Liu Hui-R64343
96912453fe fec_mxc: add support for MX53 processor
This patch add FEC support for Freescale MX53 processor

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Liu Hui-R64343
595f3e5645 MX5: Add initial support for MX53 processor
Add initial support for Freescale MX53 processor,

- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro

Signed-off-by: Jason Liu  <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Liu Hui-R64343
877eb0f915 MX51EVK: UART does not print out the early information
The early bootup information is not print out due to
the UART pin iomux not set up correctly before board_init

Add the board_early_init_f function and enable the
CONFIG_BOARD_EARLY_INIT_F. Move the UART pin setting
from board_init to board_early_init_f function.

This patch also move the FEC pin iomux setup to the
board_early_init_f.

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Wolfgang Denk
6f918bd464 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-01-31 23:20:32 +01:00
Wolfgang Denk
20ee3cee4c Merge branch 'master' of git://git.denx.de/u-boot-i2c 2011-01-31 23:17:33 +01:00
Ryan Mallon
f3100ff767 Fix at91 includes in soft_i2c driver
Make at91 header includes in soft_i2c depend only on CONFIG_AT91FAMILY
rather than individual SoCs.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: Reinhard Meyer<u-boot@emk-elektronik.de>
2011-01-27 07:27:32 +01:00
Alex Dubov
a14a94469c mpq101: initial support for Mercury Computer Systems MPQ101 board
Mpq101 is a RapidIO development board in AMC form factor, featuring MPC8548
processor, 512MB of hardwired DDR2 RAM, 128MB of hardwired NAND flash
memory, real time clock and additional serial EEPROM on i2c bus (enabled).
USB controller is available, but not presently enabled.

Additional board information is available at:
http://www.mc.com/products/boards/ensemble_mpq101_rapidio_powerquicc_iii.aspx

Environment is configured to precede the actual u-boot image so that it's
located at the beginning of flash erase block (made necessary by the recent
changes to the embedded environment handling). This is achieved by means of
custom ld script.

Signed-off-by: Alex Dubov <oakad@yahoo.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-26 23:44:00 -06:00
York Sun
2906845a1f p1022ds: fix pixis_reset altbank
Fix the bits for ngpixis to reset to alternative bank. Originally the mask
was 0xE0, which left it possible to reset to bank 3 if DIP switch is set to
boot from bank 1. Changing to 0xF0 gurantees to reset to bank 2.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-26 23:43:57 -06:00
Liu Ying
8d46d5b186 lcd: align fb writing address for horizontal display offset
CONFIG_SPLASH_SCREEN_ALIGN makes uboot support display
offset for splashimage. The framebuffer writing address
should be calculated according to different kinds of
framebuffer pixel format, i.e., bits per pixel value.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
2011-01-27 00:20:59 +01:00
Nobuhiro Iwamatsu
8aba9dceeb Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS
Linker needs to use the proper endian/bfd flags even when doing partial linking.
LDFLAGS_u-boot sets linker option which is called it when U-boot is built
(u-boot final).
LDFLAGS sets necessary option by partial linking (use in cmd_link_o_target).

CC: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-01-25 22:22:30 +01:00
Macpaul Lin
f8ea15f769 ftpmu010: support faraday ftpmu010 driver
Faraday's ftpmu010 is a power managemnet unit which support cpu
sleep and frequency scaling. It has been integrated into many SoC.

This patch also move ftpmu010 to a proper place for later enhancement.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-01-25 22:18:57 +01:00
Kumar Gala
e009cdeb63 powerpc: Fix FPU post related link warnings
If we built POST on PPC's that didn't enable CONFIG_SYS_POST_FPU we'd
get the following warning with newer toolchains:

powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o
		      uses hard float, libpost.o uses soft float

We actually worked around this sometime ago with the following commit:

commit ce82ff0538
Author: Yuri Tikhonov <yur@emcraft.com>
Date:   Sat Dec 20 14:54:21 2008 +0300

   FPU POST: fix warnings when building with 2.18 binutils

However, this only took into effect if CONFIG_SYS_POST_FPU was enabled.
We can simply move the GNU_FPOST_ATTR out of the CONFIG_SYS_POST_FPU
ifdef block to address the issue.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-25 21:16:08 +01:00
Kumar Gala
2b21ec92af UEC: Fix compiler warnings introduced by linux/mii.h change
Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced the following
compiler warnings in the uec ethernet driver:

In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0,
                 from uec.c:32:
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined
uec_phy.h:34:0: note: this is the location of the previous definition
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined
uec_phy.h:35:0: note: this is the location of the previous definition
In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0,
                 from uec_phy.c:27:
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined
uec_phy.h:34:0: note: this is the location of the previous definition
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined
uec_phy.h:35:0: note: this is the location of the previous definition

Fix them be removing the duplication in the uec code and utlizing the
linux/mii.h version instead.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-25 21:15:10 +01:00
Wolfgang Denk
5aebe3b072 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-01-25 21:13:04 +01:00
Kumar Gala
92966835e9 powerpc/8xxx: Fix compile warning when build for a DDR1 or DDR2 board
ctrl_regs.c: In function 'set_ddr_sdram_mode_2':
ctrl_regs.c:690:6: warning: unused variable 'i'

'i' is only used by DDR3 code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-24 23:30:23 -06:00
Loïc Minier
d6a5e6d531 Cleanup .boards.depend when using an objtree
.boards.depend was created in the source tree even when calling make
with O=objtree, and distclean O=objtree wouldn't clean it.  Create
.boards.depend in objtree instead as to clean it up properly.

Reported-by: Loc Minier <loic.minier@linaro.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-01-21 08:56:50 +01:00
Loïc Minier
a9d8bc9806 Don't add symlink in srctree when using an objtree
When building with srctree != objtree, the build creates arch/soc/cpu
specific symlinks in the source tree.  This means that the same source
tree can't be used for multiple builds at the same time.  Also, these
symlinks in the source tree are only cleaned up if one passes the same
O= to distclean.

When srctree != objtree, mkconfig creates an $objtree/include2 directory
in the objtree to host the asm -> arch/$arch/include/asm symlink so that
"#include <asm>" can be used.  But it also creates another identical
symlink in $objtree/include.

Then, mkconfig creates two symlinks:
$objtree/include/asm/arch -> arch/$arch/include/asm/arch-$cpu (or $soc)
$objtree/include/asm/proc -> arch/$arch/include/asm/proc-armv (on arm)
but because $objtree/include/asm points at $srctree already, the two
symlinks are created under $srctree.

To fix this, create a real $objtree/include/asm directory, instead of a
symlink.  Update cleanup code accordingly.

Signed-off-by: Loc Minier <loic.minier@linaro.org>
2011-01-21 08:53:40 +01:00
Dipen Dudhat
beba93ed05 powerpc/85xx: Protect all LBC code with CONFIG_FSL_LBC
Future SoC (like the P1010) replace the LBC controller with the new IFC
(Integrated Flash Controller) so ensure we properly protect code that is
related to the LBC.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
Prabhakar Kushwaha
b707090432 ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDB
u-boot cannot be compiled after disabling CONFIG_PCI.

Place PCI related codes under #ifdef CONFIG_PCI

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
York Sun
768d5b2baf powerpc/p4080: Fix warning in serdes code from early use of hwconfig
Hwconfig is called before relocating. Use the new hwconfig APIs.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
York Sun
6b06d7dc07 corenet_ds: Extend board specific parameters
Extend board specific parameters to include cpo, write leveling override
Extend write leveling sample to 0xf
Adding rcw overrid for quad-rank RDIMMs

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
York Sun
fa8d23c0ee mpc85xx: Implement workaround for erratum DDR-A003
Erratum DDR-A003 requires workaround to correctly set RCW10 for registered DIMM.
Also adding polling after enabling DDR controller to ensure completion.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:24 -06:00
York Sun
e1fd16b6f5 mpc85xx: Enable unique mode registers and dynamic ODT for DDR3
Added fsl_ddr_get_version() function to for DDR3 to poll DDRC IP version
(major, minor, errata) to determine if unique mode registers are available.
If true, always use unique mode registers. Dynamic ODT is enabled if needed.
The table is documented in doc/README.fsl-ddr. This function may also need
to be extend for future other platforms if such a feature exists.

Enable address parity and RCW by default for RDIMMs.

Change default output driver impedance from 34 ohm to 40ohm. Make it 34ohm for
quad-rank RDIMMs.

Use a formula to calculate rodt_on for timing_cfg_5.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
York Sun
d2a9568c57 mpc85xx: Adding more registers and options
This patch exposes more registers which can be used by the DDR drivers or
interactive debugging. U-boot doesn't use all the registers in DDRC.
When advanced tuning is required, writing to those registers is needed.

Add writing to cdr1, cdr2, err_disable, err_int_en and debug registers
Add options to override rcw, address parity to RDIMMs.
Use array for debug registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
York Sun
8ed20f2c17 corenet_ds: Enable ECC for corenet_ds
ECC can be turned on/off by hwconfig without recompiling. So enable it
by default.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
York Sun
47df8f03f4 mpc8xxx: Enable ECC on/off control in hwconfig
Add fsl_ddr:ecc=on in hwconfig. If ECC is enabled in board configuration file,
ECC can be turned on/off by this switch. If this switch is omitted, it is ON by
default.

Updated hwconfig calls to use local buffer.

Syntax is
hwconfig=fsl_ddr:ecc=on

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
York Sun
dd12768974 mpc8xxx: Display RDIMM if detected
Print a message when a RDIMM is detected.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Kumar Gala
243be8e296 powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headers
Add new headers that capture common defines for a given SoC/processor
rather than duplicating that information in board config.h and random
other places.

Eventually this should be handled by Kconfig & defconfigs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19 22:58:23 -06:00
Kumar Gala
dd50af2515 powerpc/8xxx: Add hwconfig APIs to address early parsing used by DDR init
There are several users of the hwconfig APIs (8xxx DDR) before we have
the environment properly setup.  This causes issues because of the
numerous ways the environment might be accessed because of the
non-volatile memory it might be stored in.  Additionally the access
might be so early that memory isn't even properly setup for us.

Towards resolving these issues we provide versions of all the hwconfig
APIs that can be passed in a buffer to parse and leave it to the caller
to determine how to allocate and populate the buffer.

We use the _f naming convention for these new APIs even though they are
perfectly useable after relocation and the environment being ready.

We also now warn if the non-f APIs are called before the environment is
ready to allow users to address the issues.

Finally, we convert the 8xxx DDR code to utilize the new APIs to
hopefully address the issue once and for all.  We have the 8xxx DDR code
create a buffer on the stack and populate it via getenv_f().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19 22:58:23 -06:00
Kumar Gala
f193e3da98 powerpc/p2040: Add various p2040 specific information
Add P2040 SoC specific information:
* SERDES Table
* Added p2040 to cpu_type_list and SVR list
* Added number of LAWs for p2040
* Set CONFIG_MAX_CPUS to 4 for p2040

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Kumar Gala
1eda59ff6b powerpc/p5020: Add various p5020 specific information
Add P5020 SoC specific information:
* SERDES Table
* LIODN setup
* Portal configuration

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Kumar Gala
d5d2cd4331 powerpc/p3041: Add various p3041 specific information
Add P3041 SoC specific information:
* SERDES Table
* LIODN setup
* Portal configuration

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Poonam Aggrwal
b5debec5b5 powerpc/85xx: Add Support for Freescale P1014 Processor
The P1014 is similar to the P1010 processor with the following differences:

- 16bit DDR with ECC. (P1010 has 32bit DDR w/o ECC)
- no eCAN interface. (P1010 has 2 eCAN interfaces)
- Two SGMII interface (P1010 has 3 SGMII)
- No secure boot

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Poonam Aggrwal
b8cdd01462 powerpc/85xx: Add Support for Freescale P1010 Processor
Key Features include of the P1010:
* e500v2 core frequency operation of 500 to 800 MHz
* Power consumption less than 5.0 W at 800 MHz core speed
* Dual SATA 3 Gbps controllers with integrated PHY
* Dual PCI Express controllers
* Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs)
	* TCP/IP acceleration and classification capabilities
	* IEEE 1588 support
	* Lossless flow control
	* RGMII, SGMII
* DDR3 with support for a 32-bit data interface (40 bits including ECC),
  up to 800 MHz data rate 32/16-bit DDR3 memory controller
* Dedicated security engine featuring trusted boot
* TDM interface
* Dual controller area networks (FlexCAN) controller
* SD/MMC card controller supporting booting from Flash cards
* USB 2.0 host and device controller with an on-chip, high-speed PHY
* Integrated Flash controller (IFC)
* Power Management Controller (PMC)
* Four-channel, general-purpose DMA controller
* I2C controller
* Serial peripheral interface (SPI) controller with master and slave support
* System timers including a periodic interrupt timer, real-time clock,
  software watchdog timer, and four general-purpose timers
* Dual DUARTs

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00