Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-10 23:24:38 +00:00
Code Issues Projects Releases Packages Wiki Activity

mpc8xxx: Enable ECC on/off control in hwconfig

Browse source 
Add fsl_ddr:ecc=on in hwconfig. If ECC is enabled in board configuration file,
ECC can be turned on/off by this switch. If this switch is omitted, it is ON by
default.

Updated hwconfig calls to use local buffer.

Syntax is
hwconfig=fsl_ddr:ecc=on

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
York Sun 2011-01-10 12:02:57 +00:00 committed by Kumar Gala
parent dd12768974
commit 47df8f03f4
2 changed files with 13 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
arch/powerpc/cpu/mpc8xxx/ddr/options.c
View file

@ -98,10 +98,13 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
/* Operational Mode Paramters */
/* Pick ECC modes */
#ifdef CONFIG_DDR_ECC
popts->ECC_mode = 1; /* 0 = disabled, 1 = enabled */
#else
popts->ECC_mode = 0; /* 0 = disabled, 1 = enabled */
#ifdef CONFIG_DDR_ECC
if (hwconfig_sub_f("fsl_ddr", "ecc", buf)) {
if (hwconfig_subarg_cmp_f("fsl_ddr", "ecc", "on", buf))
popts->ECC_mode = 1;
} else
popts->ECC_mode = 1;
#endif
popts->ECC_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */

7
doc/README.fsl-ddr
View file

@ -78,6 +78,13 @@ If the DDR controller supports address hashing, it can be enabled by hwconfig.
Syntax is:
hwconfig=fsl_ddr:addr_hash=true
Memory controller ECC on/off
============================
If ECC is enabled in board configuratoin file, i.e. #define CONFIG_DDR_ECC,
ECC can be turned on/off by hwconfig.
Syntax is
hwconfig=fsl_ddr:ecc=off
Memory testing options for mpc85xx
==================================