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fec_mxc: add support for MX53 processor

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This patch add FEC support for Freescale MX53 processor

Signed-off-by: Jason Liu <r64343@freescale.com>
This commit is contained in:
Liu Hui-R64343 2011-01-03 22:27:36 +00:00 committed by Albert Aribaud
parent 595f3e5645
commit 96912453fe
2 changed files with 3 additions and 3 deletions
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2
drivers/net/fec_mxc.c
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@ -354,7 +354,7 @@ static int fec_open(struct eth_device *edev)
*/
writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
&fec->eth->ecntrl);
#ifdef CONFIG_MX25
#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
udelay(100);
/*
* setup the MII gasket for RMII mode

4
drivers/net/fec_mxc.h
View file

@ -147,7 +147,7 @@ struct ethernet_regs {
uint32_t res14[7]; /* MBAR_ETH + 0x2E4-2FC */
#ifdef CONFIG_MX25
#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
uint16_t miigsk_cfgr; /* MBAR_ETH + 0x300 */
uint16_t res15[3]; /* MBAR_ETH + 0x302-306 */
uint16_t miigsk_enr; /* MBAR_ETH + 0x308 */
@ -204,7 +204,7 @@ struct ethernet_regs {
#define FEC_ECNTRL_RESET 0x00000001 /* reset the FEC */
#define FEC_ECNTRL_ETHER_EN 0x00000002 /* enable the FEC */
#ifdef CONFIG_MX25
#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
/* defines for MIIGSK */
/* RMII frequency control: 0=50MHz, 1=5MHz */
#define MIIGSK_CFGR_FRCONT (1 << 6)