Commit graph

2056 commits

Author SHA1 Message Date
Simon Glass
6e2941d787 common: freescale: Move arch-specific declarations
The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 12:30:55 -04:00
Simon Glass
c62db35d52 arm: Add explicit include of <asm/mach-types.h>
Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:36 -04:00
Tom Rini
541f538f4c Merge git://git.denx.de/u-boot-fsl-qoriq 2017-06-03 18:05:04 -04:00
York Sun
399e2bb60c armv8: layerscape: Make U-Boot EL2 safe
When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carried out before U-Boot runs. This applies
to the RAM version image used for SPL boot if PPA is loaded first.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-01 19:57:24 -07:00
Santan Kumar
1f55a93802 armv8: ls2080aqds: Add support for SD boot
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-06-01 19:57:17 -07:00
Bogdan Purcareata
33a8991a87 drivers: net: fsl-mc: Link MC boot to PHY_RESET_R
DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a single mc_env_boot function in the MC driver,
since it's semantically tied to it.

Call the function in a per-board reset_phy hook, as it gets called at a
later moment, when all board PHY devices have been initialized.

Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-06-01 19:55:50 -07:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Fabio Estevam
54d63bb1ad mx6sabresd: Update to SPL only mode
mx6sabresd only supports SPL mode now, so update the README file
accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:42:27 +02:00
Fabio Estevam
3791c31746 mx6sabresd: Update the config file
Only configs/mx6sabresd_defconfig is supported now, so update the
MAINTAINERS file accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:42:18 +02:00
Benoît Thébaudeau
747778cf69 mx25pdk: Set the eSDHC PER clock to 48 MHz
The maximum SD clock frequency in High Speed mode is 50 MHz. This change
makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1)
instead of the previous 33.25 MHz from the AHB clock (133 MHz / 2 / 2).

Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-31 10:14:41 +02:00
Tom Rini
380e86f361 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-05-26 11:19:27 -04:00
Udit Agarwal
7676074ac7 armv8: LS2080A: Adjust memory map for secure boot headers for NOR-boot
This patch adjusts memory map for secure boot headers on LS2080AQDS
and LS2080ARDB platforms. Secure boot headers are placed on NOR
flash at offset 0x00600000.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:59:14 -07:00
Santan Kumar
f5bf23d827 armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot
This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below

Image				Flash Offset
RCW+PBI				0x00000000
Boot firmware (U-Boot)		0x00100000
Boot firmware Environment	0x00300000
PPA firmware			0x00400000
PHY firmware			0x00980000
DPAA2 MC			0x00A00000
DPAA2 DPL			0x00D00000
DPAA2 DPC			0x00E00000
Kernel.itb			0x01000000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:52:29 -07:00
Alison Wang
8104deb2d6 armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A
This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:51:28 -07:00
Priyanka Jain
3049a583f3 armv8: ls2080ardb: Add LS2081ARDB board support
LS2081ARDB board is similar to LS2080ARDB board with few differences
 It hosts LS2081A SoC
 Default boot source is QSPI-boot
 It does not have IFC interface
 RTC and QSPI flash device are different
 It provides QIXIS access via I2C

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:47:08 -07:00
Priyanka Jain
89a168f776 armv8: ls2080ardb: Add QSPI-boot support
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:38:55 -07:00
Priyanka Jain
d1418c15c8 board: freescale: ls2080ardb: Update QIXIS code
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS
flag is enabled. In case QIXIS code is not enabled, use default
sysclk value as 100MHz per board documentation.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:29:13 -07:00
York Sun
c40e6f9169 armv8: ls1043ardb: Make NET independent of FMan
This allows using PCIe NIC without enabling DPAA FMan.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
2017-05-23 09:24:43 -07:00
York Sun
99b47c25d0 armv8: ls1046ardb: Make NET independent of FMan
This allows using PCIe NIC without enabling DPAA FMan.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
2017-05-23 09:23:52 -07:00
Priyanka Jain
5193405a16 board: freescale: ls2080ardb: Enable SD interface for RevF board
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23 09:12:26 -07:00
Simon Glass
fc843a02ac Kconfig: Add a CONFIG_IDE option
At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate
CONFIG_IDE option so that IDE support can be enabled without requiring
the 'ide' command.

Update existing users and move the ide driver into drivers/block since
it should not be in common/.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22 12:45:27 -04:00
Simon Glass
551c393446 Convert CONFIG_CMD_HASH to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_HASH

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22 12:38:15 -04:00
Simon Glass
ea7971f705 Convert CONFIG_CMD_ESBC_VALIDATE to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_ESBC_VALIDATE

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22 09:33:55 -04:00
Tom Rini
089df18bfe lib: move hash CONFIG options to Kconfig
Commit 94e3c8c4fd ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it.  Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool.  In many cases we can select
these because they are required to implement other drivers.  We also
correct how we include the various hashing algorithms in SPL.

This commit was generated as follows (after Kconfig additions):

[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL

Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.

Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22 08:36:58 -04:00
Ley Foon Tan
0680f1b1f7 Convert CONFIG_SPL_BOARD_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BOARD_INIT

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22 07:29:48 -04:00
Peng Fan
d1e204b566 imx: mx7dsabresd: switch to DM USB
Switch to use DM USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2017-05-18 11:24:34 +02:00
Peng Fan
709fef5131 imx: mx7dsabresd: reset ENET_RST_B
Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:34 +02:00
Peng Fan
6fbbcfdf06 imx: mx7dsabresd: enable more DM drivers
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-05-18 11:24:34 +02:00
Fabio Estevam
e2bab4b9ea mx6sabresd: Remove non-SPL targets
Now that mx6sabresd_spl_defconfig can be used to boot all
mx6sabresd variants, the non-SPL targets can be safely removed.

Signed-off-by: Fabio Estevam <fabio.estvam@nxp.com>
2017-05-18 11:24:33 +02:00
Fabio Estevam
b22841e582 mx6sabresd: Add SPL support for the mx6dl variant
Add support for the mx6dlsabresd board in SPL.

Retrieved the DCD table from:
board/freescale/mx6sabresd/mx6dlsabresd.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)

Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabresd boards.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-18 11:24:33 +02:00
Fabio Estevam
ff9f71b499 mx6sabresd: Prepare for supporting MX6DL
Currently only MX6Q/QP sabresd boards are supported in SPL.

In order to also support MX6DL we need to convert to using
IOMUX_PADS and SETUP_IOMUX_PADS macros.

Other than that move the <asm/arch/mx6-ddr.h> header inclusion to the
SPL code block in order to avoid build error.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-18 11:24:33 +02:00
Simon Glass
7ffce4f17f i2c: powerpc: Remove use of CONFIG_HARD_I2C
Drop use of this long-deprecated option for powerpc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-15 06:17:25 +02:00
Simon Glass
eb5ba3aefd i2c: Drop use of CONFIG_I2C_HARD
This option is pretty old. It predates CONFIG_SYS_I2C which is itself
deprecated in favour of driver model. Disable it for all boards.

Also drop I2C options which depend on this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-15 06:17:09 +02:00
Tom Rini
b411f2af49 m5253demo: Fix static variable in non-static inline function warning
The function 'spin_wheel' is declared as inline, but not static and thus
we see warnings that 'w' and 'p' are declared static in a non-static
inline function.  Correct this by marking spin_wheel as static inline.

Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-12 08:37:33 -04:00
Tom Rini
687175946c mx6ul_14x14_evk: Fix unused variable warning
The variable usdhc1_pads is only referenced during SPL builds, add a guard.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-05-12 08:37:25 -04:00
Tom Rini
61ebeb9998 mx6slevk: Fix unused variable warning
The variable usdhc1_pads is only referenced during SPL builds, add a
guard.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-05-12 08:37:24 -04:00
Tom Rini
85ea850976 p1_p2_rdb: Fix unused variable warning
With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-09 09:11:04 -04:00
Simon Glass
c04b9b3440 Convert CONFIG_CMD_BLOB to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_BLOB

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-30 10:30:03 -04:00
York Sun
fedebf0d08 armv8: layerscape: Fix DDR size calcuation for SPL build
Commit 088454cd dropped return value from initram(), setting
gd->ram_size directly. Three boards were missed for SPL boot.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-24 09:07:12 -07:00
Hou Zhiqiang
2ac2e20ef8 armv8: ls1046aqds: Integrate FSL PPA
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:03:22 -07:00
Hou Zhiqiang
e1b0929059 armv8: ls1043aqds: Integrate FSL PPA
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:02:58 -07:00
Santan Kumar
99fe76d023 armv8: ls2080ardb: Add phy number for serdes1 protocol 0x4b
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 09:02:46 -07:00
Alison Wang
5d267ec679 arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033
Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.

This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 08:59:43 -07:00
Shengzhou Liu
e0dfec863e powerpc/board/t1024rdb: enable board-level reset when issuing reset command
As board-specific reset logic, it needs to issue reset signal
via CPLD when issuing 'reset' command in u-boot, this patch
solves the issue of reset command not working on T1024RDB.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
York Sun
73fb583829 armv7: ls1021a: Drop macro CONFIG_LS102XA
Use CONFIG_ARCH_LS1021A instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Ruchika Gupta
511fc86d0b arm: ls1046ardb: Add SD secure boot target
- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size
  as header is appended to u-boot image. So header will also be
  copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
  (128K) where 32K are reserved for use by boot ROM and 6K for the
  header.
- Reduce the size of CAAM driver for SPL Blobification functions
  and descriptors, that are not required at the time of SPL are
  disabled. Further error code conversion to strings is disabled
  for SPL build.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Ruchika Gupta
762f92a60e arm: ls1043ardb: Add NAND secure boot target
Add NAND secure boot target for ls1043ardb.

- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size as
  header is appended to u-boot image. So header will also be copied
  from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
  from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
  also defined.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Ruchika Gupta
70f9661ca9 arm: ls1043ardb: Add SD secure boot target
- Add SD secure boot target for ls1043ardb.
- Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream
  ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main
  U-Boot by SPL to also include the u-boot Secure Boot header size as
  header is appended to u-boot image. So header will also be copied
  from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
  (128K) where 32K are reserved for use by boot ROM and 6K for secure
  boto header.
- Error messages during SPL boot are limited to error code numbers
  instead of strings to reduce the size of SPL image.

Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Vinitha Pillai-B57223
11d14bfb75 armv8: LS1012ARDB: Add QSPI Secure Boot target
Add QSPI Secure Boot target to enable chain of trust

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Vinitha Pillai-B57223
f7244f2c48 armv8: LS1046ARDB: Add QSPI Secure Boot target
Add QSPI Secure Boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Sumit Garg
b7c19ea1ca armv8: LS1046AQDS: Add NOR Secure Boot Target
Add NOR secure boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Sumit Garg
a52ff334c5 armv8: ls1046ardb: SPL size reduction
Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
   only ddr_init and board_early_init_f funcations in case of SPL
   build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
   build and NAND driver from bieng compiled in case of SPL MMC build.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Sumit Garg
4139b17037 armv8: ls1043ardb: SPL size reduction
Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
   only ddr_init and board_early_init_f funcations in case of SPL
   build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
   build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17 09:03:30 -07:00
Tom Rini
3fea953698 Merge branch 'master' of git://git.denx.de/u-boot-video 2017-04-14 22:05:17 -04:00
Sanchayan Maity
b215fb3f34 Convert CONFIG_FSL_DCU_FB to Kconfig
Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB
and convert it to Kconfig.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
2017-04-14 13:37:35 +02:00
Tom Rini
1622559066 Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-13 11:19:00 -04:00
Simon Glass
f1683aa73c board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-13 09:40:57 -04:00
Simon Glass
3eace37e50 arm: freescale: Rename initdram() to fsl_initdram()
This function name shadows a global name but is in fact different. This
is very confusing. Rename it to help with the following refactoring.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-12 13:28:32 -04:00
Breno Lima
ce2f9def82 mx6sabresd: README: Add eMMC boot configuration
Explain how to flash the eMMC and how to boot from it.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-04-12 18:15:27 +02:00
Simon Glass
76b00aca4f board_f: Drop setup_dram_config() wrapper
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 16:36:51 -04:00
Simon Glass
088454cde2 board_f: Drop return value from initdram()
At present we cannot use this function as an init sequence call without a
wrapper, since it returns the RAM size. Adjust it to set the RAM size in
global_data instead, and return 0 on success.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:59:20 -04:00
Simon Glass
52c411805c board_f: Drop board_type parameter from initdram()
It looks like only cm5200 and tqm8xx use this feature, so we don't really
need it in generic code. Drop it and have the users access gd->board_type
directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:58:44 -04:00
Simon Glass
70e2aaf380 board_f: powerpc: Use timer_init() instead of init_timebase()
There is no good reason to use a different name on PowerPC. Change it to
timer_init() like the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:54:29 -04:00
Santan Kumar
54ad7b5ab8 board: freescale: ls2080a/ls2088a: Enable PPA
Enable PPA on LS2080A, LS2088A boards:
-LS2080ARDB, LS2080AQDS
-LS2088ARDB, LS2088AQDS

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28 09:27:58 -07:00
Udit Agarwal
ac55dadb1c fsl: Secure Boot: Enable IE (Key extention) Feature
For validating images from uboot (Such as Kernel Image), either keys
from SoC fuses can be used or keys from a verified table of public
keys can be used. The latter feature is called IE Key Extension
Feature.

For Layerscape Chasis 3 based platforms, IE table is validated by
Bootrom and address of this table is written in scratch registers 13
and 14 via PBI commands.

Following are the steps describing usage of this feature:

1) Verify IE Table in ISBC phase using keys stored in fuses.
2) Install IE table. (To be used across verification of multiple
   images stored in a static global structure.)
3) Use keys from IE table, to verify further images.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28 09:03:04 -07:00
Hou Zhiqiang
9e052d9750 fsl-layerscape/ppa: cleanup ppa.h
Moved the ifdef into ppa.h and removed the duplicated macros.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28 08:59:47 -07:00
Udit Agarwal
a8c6fd4ec1 armv8: LS2080A: Move sec_init to board_init
Moves sec_init to board_init rather than in misc_init function beacuse
PPA will be initialised in board_init function and for PPA validation
sec_init has to be done prior to PPA init.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28 08:58:46 -07:00
Peng Fan
001cdbbb32 imx: mx6slevk: enable more DM drivers
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. So needs to enable them together.

DM FEC and SPI are not enabled, but they use gpio in board code.
So use gpio_request first to request the gpio, because DM_GPIO
is enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-03-20 19:01:34 +01:00
Tom Rini
02ccab1908 Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/bk4r1_defconfig
	configs/colibri_vf_defconfig
	configs/pcm052_defconfig
	include/configs/colibri_vf.h
	include/configs/pcm052.h
2017-03-19 15:13:38 -04:00
Stefan Agner
7966b43778 ARM: vf610: move to standard arch/board approach
Move Freescale/NXP Vybrid to a standard arch/board approach, similar
to what has been done to i.MX 6 earlier in commit 89ebc82137 ("ARM:
mx6: move to a standard arch/board approach").

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2017-03-19 17:30:11 +01:00
Peng Fan
77fa04577a imx: imx7ulp: add EVK board support
Add EVK board support.
Add the evk dts file.

LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)

CPU:   Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM:  1 GiB
MMC:   FSL_SDHC: 0
In:    serial@402D0000
Out:   serial@402D0000
Err:   serial@402D0000
Net:   Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-03-17 09:27:08 +01:00
Priyanka Jain
35cc100bba armv8: fsl-layerscape: Add vid support for LS2080AQDS
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Arpit Goel <arpit.goel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-14 08:44:03 -07:00
Priyanka Jain
29ca713cc1 armv8: fsl-lsch3: Update VID support
VID support in NXP layerscape Chassis-3 (lsch3) compilant SoCs like
LS2088A, LS2080A differs from existing logic.
-VDD voltage array is different
-Registers are different
-VDD calculation logic is different

Add new function adjust_vdd() for LSCH3 compliant SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Arpit Goel <arpit.goel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-14 08:44:03 -07:00
York Sun
4961eafc25 armv8: layerscape: Update early MMU for DDR after initialization
In early MMU table, DDR has to be mapped as device memory to avoid
speculative access. After DDR is initialized, it needs to be updated
to normal memory to allow code execution. To simplify the code,
dram_init() is moved into a common file as a weak function.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-03-14 08:44:03 -07:00
York Sun
36cc0de0b9 armv8: layerscape: Rewrite memory reservation
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure memory is
carved out first. DDR bank size is reduced. Reserved memory is then
allocated on the top of available memory. U-Boot still has access
to reserved memory as data transferring is needed. Device tree is
fixed with reduced memory size to hide the reserved memory from OS.
The same region is reserved for efi_loader.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-03-14 08:44:03 -07:00
Tom Rini
285226785e Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
In some cases this is absolutely required, so select this for some secure
features.  This also requires migration of RSA_FREESCALE_EXP

Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 11:37:24 -05:00
Masahiro Yamada
e856bdcfb4 flash: complete CONFIG_SYS_NO_FLASH move with renaming
We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
not completed. Finish this work by the tool.

During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH"
than those of "#ifdef CONFIG_SYS_NO_FLASH".  Flipping the logic will
make the code more readable.  Besides, negative meaning symbols do
not fit in obj-$(CONFIG_...) style Makefiles.

This commit was created as follows:

[1] Edit "default n" to "default y" in the config entry in
    common/Kconfig.

[2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH"

[3] Rename the instances in defconfigs by the following:
  find . -path './configs/*_defconfig' | xargs sed -i \
  -e '/CONFIG_SYS_NO_FLASH=y/d' \
  -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/'

[4] Change the conditionals by the following:
  find . -name '*.[ch]' | xargs sed -i \
  -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \
  -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \
  -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \
  -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/'

[5] Modify the following manually
  - Rename the rest of instances
  - Remove the description from README
  - Create the new Kconfig entry in drivers/mtd/Kconfig
  - Remove the old Kconfig entry from common/Kconfig
  - Remove the garbage comments from include/configs/*.h

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-12 14:30:25 -05:00
Tom Rini
c83a824e62 Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/ls1046aqds_defconfig
	configs/ls1046aqds_nand_defconfig
	configs/ls1046aqds_qspi_defconfig
	configs/ls1046aqds_sdcard_ifc_defconfig
	configs/ls1046aqds_sdcard_qspi_defconfig
	configs/ls1046ardb_emmc_defconfig
	configs/ls1046ardb_qspi_defconfig
	configs/ls1046ardb_sdcard_defconfig
2017-02-03 20:33:42 -05:00
Prabhakar Kushwaha
5b404be671 armv8: ls1012a: Add support of PPA
The PPA implements PSCI which requires for power managment.

Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:30:47 -08:00
Prabhakar Kushwaha
7d559604d0 board: freescale: ls1012a: Enable secure DDR on LS1012A platforms
PPA binary needs to be relocated on secure DDR, hence marking out
a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag
is set

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:30:28 -08:00
York Sun
e9866cf759 armv7: ls1021aqds: Set cpo_sample for erratum A-009942
Set cpo_sample as suggested by the driver
"WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize
cpo".

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-01-31 09:25:22 -08:00
Peng Fan
e389033f72 imx: mx6sxsabreauto: enable more dm drivers
Enable MMC/I2C/GPIO/PMIC/REGULATOR/PCA953X DM drivers
for mx6sxsabreauto board. Drop non-DM code.

Note:
The i.MX DM drivers has such dependency.
  MXC GPIO -> MXC I2C -> PFUZE/REGULATOR
  MXC GPIO -> PCA953X
  MXC GPIO -> FSL_USDHC

So the drivers needs to be enabled all to avoid
compiling error.

The uboot dm tree log:
=> dm tree
 Class       Probed   Name
 ----------------------------------------
  root        [ + ]    root_driver
  thermal     [   ]    |-- imx_thermal
  simple_bus  [ + ]    |-- soc
  simple_bus  [ + ]    |   |-- aips-bus@02000000
  simple_bus  [   ]    |   |   |-- spba-bus@02000000
  gpio        [ + ]    |   |   |-- gpio@0209c000
  gpio        [ + ]    |   |   |-- gpio@020a0000
  gpio        [ + ]    |   |   |-- gpio@020a4000
  gpio        [ + ]    |   |   |-- gpio@020a8000
  gpio        [ + ]    |   |   |-- gpio@020ac000
  gpio        [ + ]    |   |   |-- gpio@020b0000
  gpio        [ + ]    |   |   |-- gpio@020b4000
  simple_bus  [   ]    |   |   |-- anatop@020c8000
  simple_bus  [   ]    |   |   |-- snvs@020cc000
  pinctrl     [ + ]    |   |   `-- iomuxc@020e0000
  pinconfig   [ + ]    |   |       `-- imx6x-sabreauto
  pinconfig   [ + ]    |   |           |-- i2c2grp-1
  pinconfig   [ + ]    |   |           |-- i2c3grp-2
  pinconfig   [   ]    |   |           |-- uart1grp
  pinconfig   [ + ]    |   |           |-- usdhc3grp
  pinconfig   [   ]    |   |           |-- usdhc3grp-100mhz
  pinconfig   [   ]    |   |           |-- usdhc3grp-200mhz
  pinconfig   [ + ]    |   |           |-- usdhc4grp
  pinconfig   [ + ]    |   |           `-- vccsd3grp
  simple_bus  [ + ]    |   |-- aips-bus@02100000
  mmc         [ + ]    |   |   |-- usdhc@02198000
  mmc         [ + ]    |   |   |-- usdhc@0219c000
  i2c         [ + ]    |   |   |-- i2c@021a4000
  i2c_generic [ + ]    |   |   |   |-- generic_8
  i2c_generic [ + ]    |   |   |   `-- generic_4e
  i2c         [ + ]    |   |   `-- i2c@021a8000
  gpio        [ + ]    |   |       |-- gpio@30
  gpio        [ + ]    |   |       `-- gpio@32
  simple_bus  [   ]    |   `-- aips-bus@02200000
  simple_bus  [   ]    |       `-- spba-bus@02200000
  simple_bus  [ + ]    `-- regulators
  regulator   [ + ]        `-- regulator@0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2017-01-27 10:53:14 +01:00
Simon Glass
cbcbf71bf2 powerpc: Drop probecpu() in favour of arch_cpu_init()
To avoid an unnecessary arch-specific call in board_init_f(), rename this
function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:41 -05:00
Tom Rini
88077715d8 NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST
Introduce board/freescale/common/Kconfig so that we have a single place
for CONFIG options that are shared between ARM and PowerPC NXP platforms.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 10:33:59 -05:00
Tom Rini
0675f992db Merge git://git.denx.de/u-boot-fsl-qoriq 2017-01-19 12:22:23 -05:00
Yangbo Lu
5e4a6db8f4 armv8: ls1012a: define esdhc_status_fixup for RDB board
On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2
signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select
eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command
inhibit bits of eSDHC2_PRSSTAT register will never release. This would
cause below continious error messages in linux since it uses polling
mode to detect card.
"mmc1: Controller never released inhibit bit(s)."
"mmc1: Controller never released inhibit bit(s)."
"mmc1: Controller never released inhibit bit(s)."
This patch is to define esdhc_status_fixup function for RDB to disable
SDHC2 status if no SDIO wifi or eMMC is selected.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:46:52 -08:00
Yangbo Lu
208e1ae8d1 armv8: ls1012a: define esdhc_status_fixup for QDS board
The LS1012AQDS board has a hardware issue. When there is no eMMC
adapter card inserted in SDHC2 adapter slot, the command inhibit
bits of eSDHC2_PRSSTAT register will never release. This would cause
below continious error messages in linux since it uses polling mode
to detect card.
"mmc1: Controller never released inhibit bit(s)."
"mmc1: Controller never released inhibit bit(s)."
"mmc1: Controller never released inhibit bit(s)."
This patch is to define esdhc_status_fixup function for QDS to
disable SDHC2 status if no eMMC adapter card is detected.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:46:45 -08:00
Hou Zhiqiang
dccef2ec01 ls1046ardb: Add support power initialization
Add the chip power supply voltage initialization on LS1046ARDB.
Add function power_init_board(), and it will initialize the
PMIC and call the chip power initialization function.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:29:13 -08:00
Hou Zhiqiang
6424577b1b ls1046ardb: cpld: add API for selecting core volt
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:29:02 -08:00
Hou Zhiqiang
4394ad1227 pmic: pmic_mc34vr500: Add APIs to set/get SWx volt
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18 09:28:57 -08:00
Tom Rini
4386feb73d SPL: Adjust more debug prints for ulong entry_point
With entry_point now being an unsigned long we need to adapt the last
two debug prints to use %lX not %X.

Fixes: 11e1479b9e ("SPL: make struct spl_image 64-bit safe")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-11 10:45:48 -05:00
Jagan Teki
a8eac0acdc mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig
Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig
which is missing in below commit
"imx: mx6ull_14x14_evk: add plugin defconfig"
(sha1: b90ebf49bb)

Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-08 10:07:10 -05:00
York Sun
51370d5618 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:52 -05:00
York Sun
146ded4d25 powerpc: T2081QDS: Remove macro T2081QDS
Use TARGET_T2081QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:28 -05:00
York Sun
86e0a31321 powerpc: T2080RDB: Remove macro CONFIG_T2080RDB
Use TARGET_T2080RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:27 -05:00
York Sun
80d261881f powerpc: T2080QDS: Remove macro T2080QDS
Use TARGET_T2080QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:26 -05:00
York Sun
960286b6d9 powerpc: T1024RDB: Remove macro CONFIG_T1024RDB
Use TARGET_T1024RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04 19:40:24 -05:00
York Sun
9082405d47 powerpc: T1023RDB: Remove macro CONFIG_T1023RDB
Use TARGET_T1023RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:22 -05:00
Fabio Estevam
cfb37772a1 mx6qsabreauto: Fix the EIM clock for the mx6qp variant
On the MX6Q the aclk_eim_slow_podf field is '1' after POR, while on the
MX6DQP it is '3'.

This makes the EIM clock to be only 66MHz on the mx6qp variant, instead of
132 MHz.

Instead of relying on the POR values for the CSMR1 register, make sure to
manually configure the clk_eim_slow_sel field as '00' so that EIM clock is
derived from AXI clock and the aclk_eim_slow_podf field as '1' so that EIM
clock can be AXI clock divided by 2.

This way a consistent EIM clock frequency is configured for all the mx6
variants.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2017-01-02 17:12:37 +01:00
Peng Fan
47895838a4 imx: mx6sllevk: add MAINTAINERS file
add MAINTAINERS files

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-12-27 11:24:19 -05:00