mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
i2c: Drop use of CONFIG_I2C_HARD
This option is pretty old. It predates CONFIG_SYS_I2C which is itself deprecated in favour of driver model. Disable it for all boards. Also drop I2C options which depend on this. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
22f3368e71
commit
eb5ba3aefd
81 changed files with 211 additions and 701 deletions
17
README
17
README
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@ -2213,22 +2213,9 @@ The following options need to be configured:
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- approved multibus support
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- better i2c mux support
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** Please consider updating your I2C driver now. **
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** CONFIG_HARD_I2C is now being removed **
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These enable legacy I2C serial bus commands. Defining
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CONFIG_HARD_I2C will include the appropriate I2C driver
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for the selected CPU.
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This will allow you to use i2c commands at the u-boot
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command line (as long as you set CONFIG_CMD_I2C in
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CONFIG_COMMANDS) and communicate with i2c based realtime
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clock chips. See common/cmd_i2c.c for a description of the
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command line interface.
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CONFIG_HARD_I2C selects a hardware I2C controller.
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There are several other quantities that must also be
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defined when you define CONFIG_HARD_I2C.
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----under removal:
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In both cases you will need to define CONFIG_SYS_I2C_SPEED
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to be the frequency (in Hz) at which you wish your i2c bus
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@ -24,17 +24,5 @@
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#define MV_UART_CONSOLE_BASE ARMD1_UART1_BASE
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#define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register
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represents UART Unit Enable */
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/*
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* I2C definition
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*/
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_I2C_MV 1
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#define CONFIG_MV_I2C_NUM 2
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#define CONFIG_I2C_MULTI_BUS 1
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#define CONFIG_MV_I2C_REG {0xd4011000, 0xd4025000}
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#define CONFIG_HARD_I2C 1
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#define CONFIG_SYS_I2C_SPEED 0
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#define CONFIG_SYS_I2C_SLAVE 0xfe
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#endif
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#endif /* _ARMD1_CONFIG_H */
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@ -156,17 +156,7 @@ int board_init(void)
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int board_late_init(void)
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{
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u8 mac[6];
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/* Read Mac Address and set*/
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_I2C_MODULE);
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/* Read MAC address */
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i2c_read(0x50, 0x0, 0, mac, 6);
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if (is_valid_ethaddr(mac))
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eth_setenv_enetaddr("ethaddr", mac);
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printf("Cannot use I2C to get MAC address\n");
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return 0;
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}
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@ -161,14 +161,7 @@ int dram_init(void)
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*/
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static void read_hw_id(hw_id_t hw_id)
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{
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int i;
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for (i = 0; i < HW_ID_ELEM_COUNT; ++i)
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if (i2c_read(CONFIG_SYS_I2C_EEPROM,
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hw_id_format[i].offset,
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2,
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(uchar *)&hw_id[i][0],
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hw_id_format[i].length) != 0)
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printf("ERROR: can't read HW ID from EEPROM\n");
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printf("ERROR: can't read HW ID from EEPROM\n");
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}
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@ -221,7 +214,7 @@ static void compose_module_name(hw_id_t hw_id, char *buf)
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strcat(buf, tmp);
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}
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
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/*
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* Compose string with hostname.
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* buf is assumed to have enough space, and be null-terminated.
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@ -237,7 +230,7 @@ static void compose_hostname(hw_id_t hw_id, char *buf)
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*p = tolower(*p);
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}
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#endif
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#ifdef CONFIG_OF_BOARD_SETUP
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/*
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@ -270,15 +263,6 @@ int checkboard(void)
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hw_id_t hw_id_tmp;
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char module_name_tmp[MODULE_NAME_MAXLEN] = "";
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/*
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* We need I2C to access HW ID data from EEPROM, so we call i2c_init()
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* here despite the fact that it will be called again later on. We
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* also use a little trick to silence I2C-related output.
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*/
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gd->flags |= GD_FLG_SILENT;
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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gd->flags &= ~GD_FLG_SILENT;
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read_hw_id(hw_id_tmp);
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identify_module(hw_id_tmp); /* this sets gd->board_type */
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compose_module_name(hw_id_tmp, module_name_tmp);
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@ -334,16 +318,16 @@ int misc_init_r(void)
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" device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM,
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CONFIG_MAC_OFFSET);
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}
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hostname[0] = 0x00;
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/* set the hostname appropriate to the module we're running on */
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compose_hostname(hw_id, hostname);
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setenv("hostname", hostname);
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#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */
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if (!getenv("ethaddr"))
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printf(LOG_PREFIX "MAC address not set, networking is not "
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"operational\n");
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/* set the hostname appropriate to the module we're running on */
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hostname[0] = 0x00;
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compose_hostname(hw_id, hostname);
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setenv("hostname", hostname);
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return 0;
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}
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#endif /* CONFIG_MISC_INIT_R */
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@ -13,34 +13,6 @@
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#ifdef CONFIG_CMD_BSP
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static int do_i2c_test(char * const argv[])
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{
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unsigned char temp, temp1;
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printf("Starting I2C Test\n"
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"Please set Jumper:\nI2C SDA 2-3\nI2C SCL 2-3\n\n"
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"Please press any key to start\n\n");
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getc();
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temp = 0xf0; /* set io 0-4 as output */
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i2c_write(CONFIG_SYS_I2C_IO, 3, 1, (uchar *)&temp, 1);
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printf("Press I2C4-7. LED I2C0-3 should have the same state\n\n"
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"Press any key to stop\n\n");
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while (!tstc()) {
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i2c_read(CONFIG_SYS_I2C_IO, 0, 1, (uchar *)&temp, 1);
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temp1 = (temp >> 4) & 0x03;
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temp1 |= (temp >> 3) & 0x08; /* S302 -> LED303 */
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temp1 |= (temp >> 5) & 0x04; /* S303 -> LED302 */
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temp = temp1;
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i2c_write(CONFIG_SYS_I2C_IO, 1, 1, (uchar *)&temp, 1);
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}
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getc();
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return 0;
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}
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static int do_usb_test(char * const argv[])
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{
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int i;
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@ -387,9 +359,7 @@ static int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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switch (argc) {
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case 2:
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if (strncmp(argv[1], "i2c", 3) == 0)
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rcode = do_i2c_test(argv);
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else if (strncmp(argv[1], "led", 3) == 0)
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if (strncmp(argv[1], "led", 3) == 0)
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rcode = do_led_test(argv);
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else if (strncmp(argv[1], "usb", 3) == 0)
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rcode = do_usb_test(argv);
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@ -29,9 +29,6 @@ int misc_init_r(void)
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{
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u32 tmp;
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/* we use I2C-2 for on-board eeprom */
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i2c_set_bus_num(2);
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tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
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printf("FPGA: %u-%u.%u.%u\n",
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(tmp & 0xFF000000) >> 24,
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@ -18,17 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
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int eeprom_write_enable(unsigned dev_addr, int state)
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{
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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if (dev_addr != CONFIG_SYS_I2C_EEPROM_ADDR)
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return -1;
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if (state == 0)
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setbits_be32(&im->gpio.gpdat, 0x00100000);
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else
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clrbits_be32(&im->gpio.gpdat, 0x00100000);
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return 0;
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return -ENOSYS;
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}
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int board_early_init_f(void)
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@ -174,27 +174,6 @@ int dram_init(void)
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int misc_init_r(void)
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{
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u8 tmp_val;
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/* Using this for DIU init before the driver in linux takes over
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* Enable the TFP410 Encoder (I2C address 0x38)
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*/
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i2c_set_bus_num(2);
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tmp_val = 0xBF;
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i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
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/* Verify if enabled */
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tmp_val = 0;
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i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
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debug("DVI Encoder Read: 0x%02x\n", tmp_val);
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tmp_val = 0x10;
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i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
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/* Verify if enabled */
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tmp_val = 0;
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i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
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debug("DVI Encoder Read: 0x%02x\n", tmp_val);
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return 0;
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}
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@ -17,7 +17,6 @@
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#include <i2c.h>
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#endif
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static int eeprom_diag;
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static int mac_diag;
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static int gpio_diag;
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#define HW_COMP_MAINCPU 2
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static struct eeprom_layout eeprom_content;
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static int eeprom_was_read; /* has_been_read */
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static int eeprom_is_valid;
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static int eeprom_version;
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static int read_eeprom(void)
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{
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int eeprom_datalen;
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int ret;
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if (eeprom_was_read)
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return 0;
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eeprom_is_valid = 0;
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ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
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CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
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(uchar *)&eeprom_content, sizeof(eeprom_content));
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if (eeprom_diag) {
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printf("DIAG: %s() read rc[%d], size[%d]\n",
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__func__, ret, sizeof(eeprom_content));
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}
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if (ret != 0)
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return -1;
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eeprom_was_read = 1;
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/*
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* check validity of EEPROM content
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* (check version, length, optionally checksum)
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*/
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eeprom_is_valid = 1;
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eeprom_datalen = get_eeprom_field_int(eeprom_content.len);
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eeprom_version = get_eeprom_field_int(eeprom_content.version);
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if (eeprom_diag) {
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printf("DIAG: %s() magic[%c%c%c] len[%d] ver[%d] type[%d]\n",
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__func__, eeprom_content.magic[0],
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eeprom_content.magic[1], eeprom_content.magic[2],
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eeprom_datalen, eeprom_version, eeprom_content.type);
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}
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if (strncmp(eeprom_content.magic, "ifm", strlen("ifm")) != 0)
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eeprom_is_valid = 0;
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if (eeprom_datalen < sizeof(struct eeprom_layout) - 5)
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eeprom_is_valid = 0;
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if ((eeprom_version != 1) && (eeprom_version != 2))
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eeprom_is_valid = 0;
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if (eeprom_content.type != HW_COMP_MAINCPU)
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eeprom_is_valid = 0;
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if (eeprom_diag)
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printf("DIAG: %s() valid[%d]\n", __func__, eeprom_is_valid);
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return ret;
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return -ENOSYS;
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}
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int mac_read_from_eeprom(void)
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@ -324,9 +276,6 @@ int misc_init_r(void)
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char *s;
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int want_recovery;
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/* we use bus I2C-0 for the on-board eeprom */
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i2c_set_bus_num(0);
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/* setup GPIO directions and initial values */
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gpio_configure();
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@ -44,17 +44,7 @@ int board_init(void)
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int board_late_init(void)
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{
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u8 mac[6];
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/* Read Mac Address and set*/
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_I2C_MODULE);
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/* Read MAC address */
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i2c_read(0x50, 0x10, 0, mac, 6);
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if (is_valid_ethaddr(mac))
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eth_setenv_enetaddr("ethaddr", mac);
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printf("Cannot get MAC address from I2C\n");
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return 0;
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}
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@ -486,20 +486,14 @@ int board_early_init_f (void)
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static int tfp410_read_reg(int reg, uchar *buf)
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{
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if (i2c_read(CONFIG_SYS_TFP410_ADDR, reg, 1, buf, 1) != 0) {
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puts ("Error reading the chip.\n");
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return 1;
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}
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return 0;
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puts("Error reading the chip.\n");
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return -ENOSYS;
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}
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static int tfp410_write_reg(int reg, uchar buf)
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{
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if (i2c_write(CONFIG_SYS_TFP410_ADDR, reg, 1, &buf, 1) != 0) {
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puts ("Error writing the chip.\n");
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return 1;
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}
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return 0;
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puts("Error writing the chip.\n");
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return -ENOSYS;
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}
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typedef struct _tfp410_config {
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@ -525,12 +519,9 @@ static int charon_last_stage_init(void)
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{
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volatile struct mpc5xxx_lpb *lpb =
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(struct mpc5xxx_lpb *) MPC5XXX_LPB;
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int oldbus = i2c_get_bus_num();
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uchar buf;
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int i = 0;
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i2c_set_bus_num(CONFIG_SYS_TFP410_BUS);
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/* check version */
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if (tfp410_read_reg(TFP410_REG_DEV_ID_H, &buf) != 0)
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return -1;
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@ -551,7 +542,6 @@ static int charon_last_stage_init(void)
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i++;
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}
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printf("TFP410 initialized.\n");
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i2c_set_bus_num(oldbus);
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/* set deadcycle for cs3 to 0 */
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setbits_be32(&lpb->cs_deadcycle, 0xffffcfff);
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@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_ASKENV=y
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CONFIG_LOOPW=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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@ -19,7 +18,6 @@ CONFIG_CMD_PING=y
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CONFIG_CMD_SNTP=y
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CONFIG_CMD_BMP=y
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CONFIG_CMD_BSP=y
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CONFIG_CMD_DATE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_DIAG=y
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@ -4,7 +4,6 @@ CONFIG_TARGET_O2D300=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_BOOTDELAY=5
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -8,7 +8,6 @@ CONFIG_HUSH_PARSER=y
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CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n"
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CONFIG_AUTOBOOT_STOP_STR="++++++++++"
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -7,7 +7,6 @@ CONFIG_HUSH_PARSER=y
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CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n"
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CONFIG_AUTOBOOT_STOP_STR="++++++++++"
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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@ -4,7 +4,6 @@ CONFIG_TARGET_O2D=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_BOOTDELAY=5
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_TARGET_O2I=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -5,7 +5,6 @@ CONFIG_OF_BOARD_SETUP=y
|
|||
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M110\""
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -5,7 +5,6 @@ CONFIG_OF_BOARD_SETUP=y
|
|||
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M112\""
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -5,7 +5,6 @@ CONFIG_OF_BOARD_SETUP=y
|
|||
CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M113\""
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_TARGET_O2MNT=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -4,7 +4,6 @@ CONFIG_TARGET_O3DNT=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -15,7 +14,6 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -15,7 +14,6 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -19,7 +18,6 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -19,7 +18,6 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -19,7 +18,6 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -9,7 +9,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -18,7 +17,6 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -7,7 +7,6 @@ CONFIG_HUSH_PARSER=y
|
|||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n"
|
||||
CONFIG_AUTOBOOT_DELAY_STR="asdfg"
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
|
|
@ -5,7 +5,6 @@ CONFIG_FIT=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_PROMPT="ac14xx> "
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -13,7 +13,6 @@ CONFIG_VERSION_VARIABLE=y
|
|||
# CONFIG_CMD_ENV_EXISTS is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_ECHO is not set
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
|
|
|
@ -14,14 +14,12 @@ CONFIG_HUSH_PARSER=y
|
|||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_UBI=y
|
||||
|
|
|
@ -5,7 +5,6 @@ CONFIG_OF_BOARD_SETUP=y
|
|||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
|
|
|
@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3
|
|||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
# CONFIG_CMD_NET is not set
|
||||
# CONFIG_CMD_NFS is not set
|
||||
|
|
|
@ -7,14 +7,12 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_DOS_PARTITION=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
|
|
|
@ -7,14 +7,12 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_DOS_PARTITION=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
|
|
|
@ -9,7 +9,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
|
|
@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_SILENT_CONSOLE=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
|
|
@ -13,7 +13,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
|
|||
CONFIG_AUTOBOOT_DELAY_STR="d"
|
||||
CONFIG_AUTOBOOT_STOP_STR=" "
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -21,7 +20,6 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -11,7 +11,6 @@ CONFIG_AUTOBOOT_KEYED=y
|
|||
CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n"
|
||||
CONFIG_AUTOBOOT_DELAY_STR=" "
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -19,7 +18,6 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -13,7 +13,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
|
|||
CONFIG_AUTOBOOT_DELAY_STR="d"
|
||||
CONFIG_AUTOBOOT_STOP_STR=" "
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -21,7 +20,6 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -13,7 +13,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
|
|||
CONFIG_AUTOBOOT_DELAY_STR="d"
|
||||
CONFIG_AUTOBOOT_STOP_STR=" "
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -21,7 +20,6 @@ CONFIG_CMD_MII=y
|
|||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -12,7 +12,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
|
|||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
@ -21,7 +20,6 @@ CONFIG_CMD_PING=y
|
|||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_BSP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
|
|
|
@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3
|
|||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
|
|
|
@ -7,13 +7,11 @@ CONFIG_BOOTDELAY=5
|
|||
# CONFIG_CONSOLE_MUX is not set
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
CONFIG_LOOPW=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
|
|
|
@ -22,7 +22,6 @@ CONFIG_CMD_GREPENV=y
|
|||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
|
|
|
@ -6,12 +6,10 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
|
|
|
@ -8,12 +8,10 @@ CONFIG_AUTOBOOT_KEYED=y
|
|||
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
|
||||
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_BEDBUG=y
|
||||
CONFIG_LED_STATUS=y
|
||||
|
|
|
@ -6,13 +6,11 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_MAC_PARTITION=y
|
||||
|
|
|
@ -7,13 +7,11 @@ CONFIG_BOOTDELAY=5
|
|||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_MAC_PARTITION=y
|
||||
|
|
|
@ -4,11 +4,9 @@ CONFIG_TARGET_PCM030=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000"
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_USB=y
|
||||
|
|
|
@ -4,11 +4,9 @@ CONFIG_TARGET_PCM030=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_SYS_PROMPT="uboot> "
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_USB=y
|
||||
|
|
|
@ -10,13 +10,11 @@ CONFIG_SILENT_CONSOLE=y
|
|||
# CONFIG_CONSOLE_MUX is not set
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
# CONFIG_PCI is not set
|
||||
|
|
|
@ -13,7 +13,6 @@ CONFIG_VERSION_VARIABLE=y
|
|||
# CONFIG_CMD_ENV_EXISTS is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_ECHO is not set
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
|
|
|
@ -3,13 +3,11 @@ CONFIG_MPC5xxx=y
|
|||
CONFIG_TARGET_V38B=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
CONFIG_MAC_PARTITION=y
|
||||
|
|
|
@ -499,9 +499,19 @@ void reset_phy (void);
|
|||
void fdc_hw_init (void);
|
||||
|
||||
/* $(BOARD)/eeprom.c */
|
||||
#ifdef CONFIG_CMD_EEPROM
|
||||
void eeprom_init (int bus);
|
||||
int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
|
||||
int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
|
||||
#else
|
||||
/*
|
||||
* Some EEPROM code is depecated because it used the legacy I2C interface. Add
|
||||
* some macros here so we don't have to touch every one of those uses
|
||||
*/
|
||||
#define eeprom_init(bus)
|
||||
#define eeprom_read(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
|
||||
#define eeprom_write(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Set this up regardless of board
|
||||
|
|
|
@ -166,7 +166,6 @@
|
|||
|
||||
/* I2c */
|
||||
#undef CONFIG_SYS_FSL_I2C
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
/* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
|
|
|
@ -124,8 +124,7 @@
|
|||
#ifndef CONFIG_CAM5200
|
||||
/* POST support */
|
||||
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
|
||||
CONFIG_SYS_POST_CPU | \
|
||||
CONFIG_SYS_POST_I2C)
|
||||
CONFIG_SYS_POST_CPU)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_POST
|
||||
|
@ -144,7 +143,6 @@
|
|||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#define CONFIG_CMD_REGINFO
|
||||
|
||||
|
@ -278,54 +276,6 @@
|
|||
#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#ifdef CONFIG_TQM5200_REV100
|
||||
#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
|
||||
#else
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* I2C clock frequency
|
||||
*
|
||||
* Please notice, that the resulting clock frequency could differ from the
|
||||
* configured value. This is because the I2C clock is derived from system
|
||||
* clock over a frequency divider with only a few divider values. U-Boot
|
||||
* calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
|
||||
* approximation allways lies below the configured value, never above.
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
|
||||
* also). For other EEPROMs configuration should be verified. On Mini-FAP the
|
||||
* EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
|
||||
* same configuration could be used.
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
|
||||
|
||||
/*
|
||||
* HW-Monitor configuration on Mini-FAP
|
||||
*/
|
||||
#if defined (CONFIG_MINIFAP)
|
||||
#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
|
||||
#endif
|
||||
|
||||
/* List of I2C addresses to be verified by POST */
|
||||
#if defined (CONFIG_MINIFAP)
|
||||
#undef CONFIG_SYS_POST_I2C_ADDRS
|
||||
#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
|
||||
CONFIG_SYS_I2C_HWMON_ADDR, \
|
||||
CONFIG_SYS_I2C_SLAVE}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Flash configuration
|
||||
*/
|
||||
|
@ -544,18 +494,6 @@
|
|||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
*/
|
||||
#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
|
||||
# define CONFIG_RTC_M41T11 1
|
||||
# define CONFIG_SYS_I2C_RTC_ADDR 0x68
|
||||
# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
|
||||
year */
|
||||
#else
|
||||
# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
|
|
|
@ -81,7 +81,6 @@
|
|||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_IDE
|
||||
|
||||
#if defined(CONFIG_PCI)
|
||||
|
@ -145,25 +144,6 @@
|
|||
*/
|
||||
#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
#define CONFIG_SYS_EEPROM_WREN 1
|
||||
#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
|
||||
|
||||
/*
|
||||
* Flash configuration
|
||||
*/
|
||||
|
|
|
@ -336,28 +336,11 @@
|
|||
|
||||
#define CONFIG_CMDLINE_EDITING 1 /* command line history */
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
|
||||
/* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* IIM - IC Identification Module
|
||||
*/
|
||||
#undef CONFIG_FSL_IIM
|
||||
|
||||
/*
|
||||
* EEPROM configuration for Atmel AT24C01:
|
||||
* 8-bit addresses, 30ms write delay, 32-Byte Page Write Mode
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 30
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
|
||||
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*/
|
||||
|
@ -384,7 +367,6 @@
|
|||
#define CONFIG_LOADS_ECHO 1
|
||||
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#undef CONFIG_CMD_FUSE
|
||||
#undef CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_JFFS2
|
||||
|
|
|
@ -35,20 +35,6 @@
|
|||
#define CONFIG_BITBANGMII
|
||||
#define CONFIG_BITBANGMII_MULTI
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_SH_SH7734_I2C 1
|
||||
#define CONFIG_HARD_I2C 1
|
||||
#define CONFIG_I2C_MULTI_BUS 1
|
||||
#define CONFIG_SYS_MAX_I2C_BUS 2
|
||||
#define CONFIG_SYS_I2C_MODULE 0
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x50
|
||||
#define CONFIG_SH_I2C_DATA_HIGH 4
|
||||
#define CONFIG_SH_I2C_DATA_LOW 5
|
||||
#define CONFIG_SH_I2C_CLOCK 500000000
|
||||
#define CONFIG_SH_I2C_BASE0 0xFFC70000
|
||||
#define CONFIG_SH_I2C_BASE1 0xFFC71000
|
||||
|
||||
/* undef to save memory */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
/* Monitor Command Prompt */
|
||||
|
|
|
@ -79,12 +79,6 @@
|
|||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
|
||||
#endif
|
||||
|
||||
/* RTC */
|
||||
#ifdef CONFIG_CMD_DATE
|
||||
#define CONFIG_RTC_PCF8563
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
|
||||
#endif
|
||||
|
||||
/* Boot Linux */
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
#define CONFIG_BOOTCOMMAND "run bootcmd_nand"
|
||||
|
|
|
@ -340,31 +340,11 @@
|
|||
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
|
||||
/* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#if 0
|
||||
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IIM - IC Identification Module
|
||||
*/
|
||||
#undef CONFIG_FSL_IIM
|
||||
|
||||
/*
|
||||
* EEPROM configuration for Atmel AT24C32A-10TQ-2.7:
|
||||
* 16-bit addresses, 10ms write delay, 32-Byte Page Write Mode
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
|
||||
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*/
|
||||
|
@ -392,7 +372,6 @@
|
|||
#define CONFIG_LOADS_ECHO 1
|
||||
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#undef CONFIG_CMD_FUSE
|
||||
#undef CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_JFFS2
|
||||
|
|
|
@ -100,7 +100,7 @@
|
|||
/*
|
||||
* Environment settings
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_EEPROM
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#define CONFIG_ENV_SIZE SZ_512
|
||||
#define CONFIG_ENV_OFFSET 0
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
/*
|
||||
* POST support
|
||||
*/
|
||||
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
|
||||
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU)
|
||||
#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
|
||||
/* List of I2C addresses to be verified by POST */
|
||||
#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_SLAVE, \
|
||||
|
@ -199,16 +199,6 @@
|
|||
"2m(kernel),27904k(rootfs)," \
|
||||
"-(config)"
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
|
||||
#define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||
#define CONFIG_SYS_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
|
||||
#define CONFIG_SYS_I2C_EEPROM 0x53 /* I2C EEPROM device address */
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
*/
|
||||
|
|
|
@ -85,7 +85,6 @@
|
|||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_IRQ
|
||||
#define CONFIG_CMD_PCI
|
||||
|
@ -205,36 +204,6 @@
|
|||
|
||||
#define CONFIG_BOOTCOMMAND "run mtcb_start"
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1
|
||||
#define CONFIG_SYS_I2C_MODULE 1
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
*/
|
||||
#if defined(CONFIG_DIGSY_REV5)
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x56
|
||||
#define CONFIG_RTC_RV3029
|
||||
/* Enable 5k Ohm trickle charge resistor */
|
||||
#define CONFIG_SYS_RV3029_TCR 0x20
|
||||
#else
|
||||
#define CONFIG_RTC_DS1337
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
|
||||
#define CONFIG_SYS_DS1339_TCR_VAL 0xAB /* diode + 4k resistor */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Flash configuration
|
||||
*/
|
||||
|
|
|
@ -165,7 +165,6 @@
|
|||
#define CONFIG_TSEC2
|
||||
#define CONFIG_TSEC_ENET
|
||||
#define CONFIG_HARD_SPI
|
||||
#define CONFIG_HARD_I2C
|
||||
|
||||
/*
|
||||
* NOR FLASH setup
|
||||
|
|
|
@ -150,29 +150,6 @@
|
|||
#define OF_SOC "soc5200@f0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
*/
|
||||
#define CONFIG_RTC_PCF8563
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE 0xFC000000
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x01000000
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
|
||||
|
|
|
@ -127,25 +127,6 @@
|
|||
#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Flash configuration
|
||||
*/
|
||||
|
|
|
@ -16,7 +16,6 @@
|
|||
/* U-Boot Commands */
|
||||
#define CONFIG_FAT_WRITE
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_NAND_TRIMFFS
|
||||
|
||||
|
@ -63,11 +62,6 @@
|
|||
#define CONFIG_FEC_MXC
|
||||
#endif
|
||||
|
||||
/* EEPROM */
|
||||
#ifdef CONFIG_CMD_EEPROM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#endif
|
||||
|
||||
/* RTC */
|
||||
#ifdef CONFIG_CMD_DATE
|
||||
/* Use the internal RTC in the MXS chip */
|
||||
|
|
176
include/configs/manroland/mpc5200-common.h
Normal file
176
include/configs/manroland/mpc5200-common.h
Normal file
|
@ -0,0 +1,176 @@
|
|||
/*
|
||||
* (C) Copyright 2009
|
||||
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __MANROLAND_MPC52XX__COMMON_H
|
||||
#define __MANROLAND_MPC52XX__COMMON_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
#define CONFIG_MPC5200 1 /* MPC5200 CPU */
|
||||
|
||||
/* ... running at 33.000000MHz */
|
||||
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
|
||||
|
||||
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
|
||||
|
||||
/*
|
||||
* Serial console configuration
|
||||
*/
|
||||
#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,\
|
||||
230400 }
|
||||
|
||||
#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */
|
||||
# define CONFIG_SYS_LOWBOOT 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IPB Bus clocking configuration.
|
||||
*/
|
||||
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
|
||||
|
||||
/*
|
||||
* Flash configuration
|
||||
*/
|
||||
#define CONFIG_SYS_FLASH_BASE 0xFF800000
|
||||
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
|
||||
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
|
||||
(= chip selects) */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout [ms]*/
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout [ms]*/
|
||||
|
||||
#define CONFIG_FLASH_CFI_DRIVER
|
||||
#define CONFIG_SYS_FLASH_CFI
|
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO
|
||||
#define CONFIG_SYS_FLASH_CFI_AMD_RESET
|
||||
|
||||
/*
|
||||
* Environment settings
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_SIZE 0x4000
|
||||
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
|
||||
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
|
||||
|
||||
/*
|
||||
* Memory map
|
||||
*/
|
||||
#define CONFIG_SYS_MBAR 0xF0000000
|
||||
#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
|
||||
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE -\
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x00000000
|
||||
#define CONFIG_SYS_SRAM_BASE 0x80100000 /* CS 1 */
|
||||
#define CONFIG_SYS_DISPLAY_BASE 0x80600000 /* CS 3 */
|
||||
|
||||
/* Settings for XLB = 132 MHz */
|
||||
#define SDRAM_DDR 1
|
||||
#define SDRAM_MODE 0x018D0000
|
||||
#define SDRAM_EMODE 0x40090000
|
||||
#define SDRAM_CONTROL 0x714f0f00
|
||||
#define SDRAM_CONFIG1 0x73722930
|
||||
#define SDRAM_CONFIG2 0x47770000
|
||||
#define SDRAM_TAPDELAY 0x10000000
|
||||
|
||||
/* Use ON-Chip SRAM until RAM will be available */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
|
||||
#ifdef CONFIG_POST
|
||||
/* preserve space for the post_word at end of on-chip SRAM */
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
|
||||
#else
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
|
||||
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
|
||||
# define CONFIG_SYS_RAMBOOT 1
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
|
||||
#define CONFIG_SYS_MALLOC_LEN (512 << 10)
|
||||
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
|
||||
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*/
|
||||
#define CONFIG_MPC5xxx_FEC 1
|
||||
#define CONFIG_MPC5xxx_FEC_MII100
|
||||
#define CONFIG_PHY_ADDR 0x00
|
||||
#define CONFIG_MII 1
|
||||
|
||||
/*use Hardware WDT */
|
||||
#define CONFIG_HW_WATCHDOG
|
||||
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Various low-level settings
|
||||
*/
|
||||
#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
|
||||
#define CONFIG_SYS_HID0_FINAL HID0_ICE
|
||||
|
||||
#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
|
||||
#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
|
||||
#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
|
||||
#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
|
||||
|
||||
/* 8Mbit SRAM @0x80100000 */
|
||||
#define CONFIG_SYS_CS1_START CONFIG_SYS_SRAM_BASE
|
||||
|
||||
#define CONFIG_SYS_CS_BURST 0x00000000
|
||||
#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* IDE/ATA stuff Supports IDE harddisk
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
|
||||
|
||||
#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
|
||||
#undef CONFIG_IDE_LED /* LED for ide not supported */
|
||||
|
||||
#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
|
||||
|
||||
#define CONFIG_IDE_PREINIT 1
|
||||
|
||||
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
|
||||
|
||||
#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
|
||||
|
||||
/* Offset for data I/O */
|
||||
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
|
||||
|
||||
/* Offset for normal register accesses */
|
||||
#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
|
||||
|
||||
/* Offset for alternate registers */
|
||||
#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
|
||||
|
||||
/* Interval between registers */
|
||||
#define CONFIG_SYS_ATA_STRIDE 4
|
||||
|
||||
#define CONFIG_ATAPI 1
|
||||
|
||||
#define OF_CPU "PowerPC,5200@0"
|
||||
#define OF_SOC "soc5200@f0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
|
||||
#define CONFIG_OF_IDE_FIXUP
|
||||
|
||||
#endif /* __MANROLAND_MPC52XX__COMMON_H */
|
|
@ -241,26 +241,11 @@
|
|||
|
||||
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */
|
||||
|
||||
/*
|
||||
* IIM - IC Identification Module
|
||||
*/
|
||||
#undef CONFIG_FSL_IIM
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
|
||||
#define CONFIG_SYS_EEPROM_WREN /* Use EEPROM write protect */
|
||||
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*/
|
||||
|
@ -280,7 +265,7 @@
|
|||
/*
|
||||
* Environment
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_EEPROM /* Store env in I2C EEPROM */
|
||||
#define CONFIG_ENV_IS_NOWHERE /* Store env in I2C EEPROM */
|
||||
#define CONFIG_ENV_SIZE 0x1000
|
||||
#define CONFIG_ENV_OFFSET 0x0000 /* environment starts here */
|
||||
|
||||
|
@ -288,7 +273,6 @@
|
|||
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
|
||||
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#undef CONFIG_CMD_FUSE
|
||||
#undef CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_JFFS2
|
||||
|
|
|
@ -34,7 +34,6 @@
|
|||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_DTT
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_IMMAP
|
||||
#define CONFIG_CMD_JFFS2
|
||||
|
@ -255,21 +254,6 @@
|
|||
#define CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_DATA_OFFSET
|
||||
#define CONFIG_SYS_ATA_STRIDE 4
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* select I2C module #2 */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
*/
|
||||
|
@ -283,12 +267,6 @@
|
|||
#define ENABLE_GPIO_OUT 0x00000024
|
||||
#define LED_ON 0x00000010
|
||||
|
||||
/*
|
||||
* Temperature sensor
|
||||
*/
|
||||
#define CONFIG_DTT_LM75 1
|
||||
#define CONFIG_DTT_SENSORS { 0x49 }
|
||||
|
||||
/*
|
||||
* Environment settings
|
||||
*/
|
||||
|
|
|
@ -327,28 +327,11 @@
|
|||
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#if 0
|
||||
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IIM - IC Identification Module
|
||||
*/
|
||||
#undef CONFIG_FSL_IIM
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
|
||||
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*/
|
||||
|
@ -396,7 +379,6 @@
|
|||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#define CONFIG_CMD_REGINFO
|
||||
|
|
|
@ -126,16 +126,6 @@
|
|||
#endif
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#ifdef CONFIG_CMD_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_MXS
|
||||
#define CONFIG_HARD_I2C
|
||||
#ifndef CONFIG_SYS_I2C_SPEED
|
||||
#define CONFIG_SYS_I2C_SPEED 400000
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* LCD */
|
||||
#ifdef CONFIG_VIDEO
|
||||
#define CONFIG_VIDEO_MXS
|
||||
|
|
|
@ -68,7 +68,6 @@
|
|||
/*
|
||||
* Supported commands
|
||||
*/
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#ifdef CONFIG_PCI
|
||||
#define CONFIG_CMD_PCI
|
||||
#endif
|
||||
|
@ -172,27 +171,6 @@
|
|||
#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 or #2 */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration:
|
||||
*
|
||||
* O2DNT board is equiped with Ramtron FRAM device FM24CL16
|
||||
* 16 Kib Ferroelectric Nonvolatile serial RAM memory
|
||||
* organized as 2048 x 8 bits and addressable as eight I2C devices
|
||||
* 0x50 ... 0x57 each 256 bytes in size
|
||||
*
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_FRAM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
|
||||
/*
|
||||
* There is no write delay with FRAM, write operations are performed at bus
|
||||
* speed. Thus, no status polling or write delay is needed.
|
||||
|
|
|
@ -49,7 +49,6 @@ Serial console configuration
|
|||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#define CONFIG_CMD_PCI
|
||||
|
||||
|
@ -120,31 +119,6 @@ IPB Bus clocking configuration.
|
|||
#define CONFIG_PCI_IO_SIZE 0x01000000
|
||||
#define CONFIG_SYS_XLB_PIPELINING 1
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
I2C configuration
|
||||
---------------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
EEPROM CAT24WC32 configuration
|
||||
---------------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010100x */
|
||||
#define CONFIG_SYS_I2C_FACT_ADDR 0x52 /* EEPROM CAT24WC32 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
|
||||
#define CONFIG_SYS_EEPROM_SIZE 2048
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 15
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
RTC configuration
|
||||
---------------------------------------------------------------------------*/
|
||||
#define RTC
|
||||
#define CONFIG_RTC_PCF8563 1
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
Flash configuration
|
||||
---------------------------------------------------------------------------*/
|
||||
|
@ -172,11 +146,10 @@ RTC configuration
|
|||
Environment settings
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
/* pcm030 ships with environment is EEPROM by default */
|
||||
#define CONFIG_ENV_IS_IN_EEPROM 1
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */
|
||||
/*beginning of the EEPROM */
|
||||
#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE
|
||||
#define CONFIG_ENV_SIZE 2048
|
||||
|
||||
#define CONFIG_ENV_OVERWRITE 1
|
||||
|
||||
|
|
|
@ -301,34 +301,11 @@
|
|||
#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY 5000
|
||||
#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE 38400
|
||||
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_I2C_CMD_TREE
|
||||
/* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* IIM - IC Identification Module
|
||||
*/
|
||||
#undef CONFIG_FSL_IIM
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM addr */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* ST AT24C01 */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-Byte Write Mode */
|
||||
|
||||
/*
|
||||
* MAC addr in EEPROM
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_BUS_NUM 0
|
||||
#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 0x10
|
||||
/*
|
||||
* Enabled only to delete "ethaddr" before testing
|
||||
* "ethaddr" setting from EEPROM
|
||||
|
@ -344,12 +321,6 @@
|
|||
#define CONFIG_FEC_AN_TIMEOUT 1
|
||||
#define CONFIG_HAS_ETH0
|
||||
|
||||
/*
|
||||
* Configure on-board RTC
|
||||
*/
|
||||
#define CONFIG_RTC_M41T62 /* use M41T00 rtc via i2c */
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
|
||||
|
||||
/*
|
||||
* Environment
|
||||
*/
|
||||
|
@ -367,7 +338,6 @@
|
|||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_REGINFO
|
||||
|
||||
#undef CONFIG_CMD_FUSE
|
||||
|
|
|
@ -40,20 +40,6 @@
|
|||
# define CONFIG_SMC911X_BASE (0x84000000)
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_SH_SH7734_I2C 1
|
||||
#define CONFIG_HARD_I2C 1
|
||||
#define CONFIG_I2C_MULTI_BUS 1
|
||||
#define CONFIG_SYS_MAX_I2C_BUS 2
|
||||
#define CONFIG_SYS_I2C_MODULE 0
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x50
|
||||
#define CONFIG_SH_I2C_DATA_HIGH 4
|
||||
#define CONFIG_SH_I2C_DATA_LOW 5
|
||||
#define CONFIG_SH_I2C_CLOCK 500000000
|
||||
#define CONFIG_SH_I2C_BASE0 0xFFC70000
|
||||
#define CONFIG_SH_I2C_BASE1 0xFFC7100
|
||||
|
||||
/* undef to save memory */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
/* Monitor Command Prompt */
|
||||
|
|
|
@ -97,16 +97,6 @@
|
|||
#define CONFIG_PHY_MICREL
|
||||
#endif
|
||||
|
||||
#if 0 /* Disable until the I2C driver will be updated */
|
||||
|
||||
/* I2C Configs */
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_HARD_I2C
|
||||
#define CONFIG_I2C_MXC
|
||||
#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#endif
|
||||
|
||||
#if 0 /* Disable until the FLASH will be implemented */
|
||||
#define CONFIG_SYS_USE_NAND
|
||||
#endif
|
||||
|
|
|
@ -134,27 +134,6 @@
|
|||
*/
|
||||
#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
|
||||
|
||||
/*
|
||||
* I2C configuration
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
|
||||
|
||||
/*
|
||||
* Flash configuration - use CFI driver
|
||||
*/
|
||||
|
|
Loading…
Reference in a new issue