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https://github.com/AsahiLinux/u-boot
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powerpc: T2080QDS: Remove macro T2080QDS
Use TARGET_T2080QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
f4f6694060
commit
80d261881f
6 changed files with 13 additions and 15 deletions
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@ -29,7 +29,7 @@
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defined(CONFIG_TARGET_B4420QDS) || \
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defined(CONFIG_TARGET_T4160QDS) || \
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defined(CONFIG_TARGET_T4240QDS) || \
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defined(CONFIG_T2080QDS) || \
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defined(CONFIG_TARGET_T2080QDS) || \
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defined(CONFIG_T2080RDB) || \
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defined(CONFIG_TARGET_T1040QDS) || \
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defined(CONFIG_T104xD4QDS) || \
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@ -7,7 +7,7 @@
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ifdef CONFIG_SPL_BUILD
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obj-y += spl.o
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else
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obj-$(CONFIG_T2080QDS) += t208xqds.o eth_t208xqds.o
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obj-$(CONFIG_TARGET_T2080QDS) += t208xqds.o eth_t208xqds.o
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obj-$(CONFIG_T2081QDS) += t208xqds.o eth_t208xqds.o
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obj-$(CONFIG_PCI) += pci.o
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endif
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@ -32,7 +32,7 @@
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#define EMI1_RGMII1 0
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#define EMI1_RGMII2 1
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#define EMI1_SLOT1 2
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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#define EMI1_SLOT2 6
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#define EMI1_SLOT3 3
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#define EMI1_SLOT4 4
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@ -59,7 +59,7 @@
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static int mdio_mux[NUM_FM_PORTS];
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static const char * const mdio_names[] = {
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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"T2080QDS_MDIO_RGMII1",
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"T2080QDS_MDIO_RGMII2",
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"T2080QDS_MDIO_SLOT1",
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@ -82,7 +82,7 @@ static const char * const mdio_names[] = {
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};
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/* Map SerDes1 8 lanes to default slot, will be initialized dynamically */
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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static u8 lane_to_slot[] = {3, 3, 3, 3, 1, 1, 1, 1};
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#elif defined(CONFIG_T2081QDS)
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static u8 lane_to_slot[] = {2, 2, 2, 2, 1, 1, 1, 1};
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@ -204,7 +204,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
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int off;
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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#ifdef CONFIG_T2080QDS
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#ifdef CONFIG_TARGET_T2080QDS
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serdes_corenet_t *srds_regs =
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(void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
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u32 srds1_pccr1 = in_be32(&srds_regs->srdspccr1);
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@ -217,7 +217,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
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if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) {
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phy = fm_info_get_phy_address(port);
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switch (port) {
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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case FM1_DTSEC1:
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if (hwconfig_sub("fsl_1gkx", "fm1_1g1")) {
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media_type = 1;
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@ -454,7 +454,7 @@ static void initialize_lane_to_slot(void)
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srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
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switch (srds_s1) {
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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case 0x51:
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case 0x5f:
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case 0x65:
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@ -552,7 +552,7 @@ int board_eth_init(bd_t *bis)
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t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT1);
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t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT2);
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t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT3);
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4);
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#endif
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t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT5);
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@ -663,7 +663,7 @@ int board_eth_init(bd_t *bis)
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fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
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fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
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break;
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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case 0xd9:
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case 0xd3:
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case 0xcb:
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@ -99,7 +99,7 @@ int brd_mux_lane_to_slot(void)
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srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &
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FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
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srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
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FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
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srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
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@ -109,7 +109,7 @@ int brd_mux_lane_to_slot(void)
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case 0:
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/* SerDes1 is not enabled */
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break;
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#if defined(CONFIG_T2080QDS)
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#if defined(CONFIG_TARGET_T2080QDS)
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case 0x1b:
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case 0x1c:
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case 0xa2:
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@ -268,7 +268,7 @@ int brd_mux_lane_to_slot(void)
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return -1;
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}
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#ifdef CONFIG_T2080QDS
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#ifdef CONFIG_TARGET_T2080QDS
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switch (srds_prtcl_s2) {
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case 0:
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/* SerDes2 is not enabled */
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@ -14,7 +14,6 @@
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#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
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#define CONFIG_USB_EHCI
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#if defined(CONFIG_ARCH_T2080)
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#define CONFIG_T2080QDS
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#define CONFIG_FSL_SATA_V2
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#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */
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#define CONFIG_SRIO1 /* SRIO port 1 */
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@ -7792,7 +7792,6 @@ CONFIG_SYS_XWAY_EBU_BOOTCFG
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CONFIG_SYS_ZYNQ_QSPI_WAIT
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CONFIG_SYS_ZYNQ_SPI_WAIT
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CONFIG_SYS_i2C_FSL
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CONFIG_T2080QDS
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CONFIG_T2080RDB
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CONFIG_T2081QDS
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CONFIG_TAM3517_SETTINGS
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