Commit graph

128 commits

Author SHA1 Message Date
Ye.Li
60b1e39586 imx: mx6sl: Add IOMUX setting for USDHC1-3
Set the USDHC1-3 IOMUX settings which are used for mx6slevk board.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-03 11:21:49 +01:00
Ye.Li
0561b8edf0 imx: mx6sl: Add perclk_clk_sel bit define in CCM
The MX6SL has the perclk_clk_sel to select the perclk source. Add
its define in CCM

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-03 11:21:48 +01:00
Soeren Moch
4bfa2db8e1 arm: arch-mx6: typo fixes in crm_regs.h
fix typos in video pll related register names and bit defines

Signed-off-by: Soeren Moch <smoch@web.de>
2014-10-30 11:58:18 +01:00
Anatolij Gustschin
9c56936eb5 arm: imx6: fix typos in CCM_ANALOG_PLL_VIDEO_DENOM register name
Fix name for Video PLL denominator register.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2014-10-30 10:51:24 +01:00
Nitin Garg
13bc86037e imx6sx: Fix i.MX6SX HAB api function table offset
i.MX6SX ROM implements unified table sections.
The HAB function table is at offset 0x100. Update
the HAB function pointers accordingly.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-10-01 09:10:28 +02:00
Ye.Li
5546ad0734 usb: ehci-mx6: Rename the USB register base address
The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "USBOH3", which causes the driver
failed to build for mx6sl/mx6sx.

This patch uniform the address name to "USB_BASE_ADDR" for all
mx6 series.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-29 10:33:27 +02:00
Nitin Garg
36c1ca4d46 imx: Support i.MX6 High Assurance Boot authentication
When CONFIG_SECURE_BOOT is enabled, the signed images
like kernel and dtb can be authenticated using iMX6 CAAM.
The added command hab_auth_img can be used for HAB
authentication of images. The command takes the image
DDR location, IVT (Image Vector Table) offset inside
image as parameters. Detailed info about signing images
can be found in Freescale AppNote AN4581.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-09-22 16:21:04 +02:00
Fabio Estevam
1b8ad74a6f pcie_imx: Add mx6solox support
Let PCI on mx6solox also be supported.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-09-09 17:24:49 +02:00
Fabio Estevam
ac17dcf653 mx6: imx-regs: Provide a structure for GPC registers
Introduce a structure for accessing the General Power Controller block (GPC)
registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-09-09 17:24:49 +02:00
Nikita Kiryanov
ea818ae748 arm: mx6: add get_cpu_type()
Define get_cpu_type(). Reuse it in is_cpu_type().

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-09-09 15:35:00 +02:00
Nikita Kiryanov
224beb833e mx6: add clock enabling functions
Add functions to enable/disable clocks for UART, SPI, ENET, and MMC.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-09-09 15:32:32 +02:00
Fabio Estevam
d145878d59 mx6sxsabresd: Add Ethernet support
mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031.

Add support for one FEC port initially.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-20 13:15:23 +02:00
Gabriel Huau
a76df70908 mx6: add support of multi-processor command
This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-08-20 11:52:54 +02:00
Fabio Estevam
9cd744ff11 mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED
According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of
register CCM_CIMR corresponds to bit 19 so fix its definition accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08 10:29:40 +02:00
Fabio Estevam
326454a88d mx6: crm_regs: Fix MXC_CCM_CLPCR_WB_PER_AT_LPM definition
According to the Reference Manual the 'wb_per_at_lpm' field of register
CCM_CLPCR corresponds to bit 16 so fix its definition accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08 10:29:40 +02:00
Fabio Estevam
338c9da605 mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offset
According to the Reference Manual the 'spdif0_clk_podf' field of register
CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset
definitions accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-08 10:29:40 +02:00
Fabio Estevam
2834490245 mx6: imx-regs: Remove unused 'omux' field from iomux struct
'omux' field is not used anywhere and such layout is not valid for mx6solox.

Instead of adding more ifdef's into the structure, let's simply remove this
unused 'omux' field.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-08-08 10:29:39 +02:00
Heiko Schocher
a0ae0091d7 i.MX6: add enable_spi_clk()
add enable_spi_clk(), so board code can enable spi clocks.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
2014-07-23 12:25:42 +02:00
Heiko Schocher
aafe4020c1 i.MX6: define struct pwm_regs and PWMCR_* defines
add defines for pwm modul found on imx6.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-07-23 12:25:41 +02:00
Heiko Schocher
4a4d3a7db7 imx6: add gpr2 usb_otg_id iomux select control define
add IOMUXC_GPR1_USB_OTG_ID_OFFSET and IOMUXC_GPR1_USB_OTG_ID_SEL_MASK
define for the USB_OTG_ID_SEL bit.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-07-23 12:25:41 +02:00
Fabio Estevam
aeadf0655c mx6: Adjust the GPR offset for mx6solox
On mx6solox there is an additional 0x4000 offset for the GPR registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-07-23 12:25:41 +02:00
Fabio Estevam
0a11d6f29c mx6: Remove duplication of iomuxc structure
There is no need to keep iomuxc_base_regs structure as it serves the exact same
purpose of the iomuxc structure, which is to provide access to the GPR
registers.

The additional fields of iomuxc_base_regs are not used. Other advantage of
'iomuxc' is that it has a shorter name and the variable declarations can fit
into a single line.

So remove iomuxc_base_regs structure and use iomuxc instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-07-23 12:25:41 +02:00
Fabio Estevam
f586040451 mx6sx: Add pin definitions
Add the pin definitions for mx6sx.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10 15:29:16 +02:00
Fabio Estevam
05d54b827f mx6: Add support for the mx6solox variant
mx6solox is the newest member of the mx6 family.

Some of the new features on this variants are:
- Cortex M4 microcontroller (besides the CortexA9)
- Dual Gigabit Ethernet

Add the initial support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10 15:29:16 +02:00
Eric Nelson
e153333eeb i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10
The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.

These settings now match the i.MX6 Dual and Quad core versions.

Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2014-07-10 15:23:56 +02:00
Stefano Babic
f2f07e8553 imx: correct HAB status for new chip TO
According to:

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0

ENGR00287268 mx6: fix the secure boot issue on the new tapout chip
commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b

newer i.MX6 silicon revisions have an updated ROM and HAB API table.
Please see also:

i.MX Applications Processors Documentation
Engineering Bulletins
EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison

With this change the secure boot status is correctly displayed

Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-06-17 17:45:09 +02:00
Fabio Estevam
bad40e089f mx6: Fix definition of IOMUXC_GPR12_DEVICE_TYPE_RC
mx6 reference manual incorrectly states that the DEVICE_TYPE field of
IOMUXC_GPR12 register should be configured as '0010' for setting the PCI
controller in RC mode. The correct value should be '0100' instead.

This also aligns with the same value used in the mx6 pci kernel driver.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-06-17 16:27:51 +02:00
Tim Harvey
fe0f7f7842 mx6: add mmdc configuration for MX6Q/MX6DL
- add function for configuring iomux based on board-specific regs
- add function for configuring mmdc based on board-specific and
  chip-specific data

Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2014-06-06 10:07:26 +02:00
Tim Harvey
8d05b161fc mx6: add structs for mmdc and ddr iomux registers
Add memory-mapped structures for MMDC iomux and configuration. Note that whi
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux
registers differ. This requires two sets of structures.

Add structures to describe DDR3 device information, system information
(memory layout, etc), and MMDC calibration registers that can be used to
configure the MMDC dynamically.

We define these structures for SPL builds instead of including mx6q-ddr.h an
mx6dl-ddr.h which use the same namespace and are only useful for imximage cf
files.

Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-06-06 10:07:25 +02:00
Fabio Estevam
694c3bc107 mx6slevk: Add SPI NOR flash support
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-04-28 14:00:16 +02:00
Tom Rini
4c89a369c7 Merge branch 'master' of git://git.denx.de/u-boot-spi 2014-02-21 08:00:22 -05:00
Andy Ng
da781c60e5 imx6 SION bit has to be on for the pins that are used as ENET_REF_CLK
Signed-off-by: Andy Ng <andreas2025@gmail.com>
2014-02-19 10:57:25 +01:00
Markus Niebel
060aaada06 spi: mxc_spi: i.MX6 DL/S have only 4 eCSPI controller
The dual lite and solo variant have only 4 SPI controller.
respect this in the MXC_SPI_BASE_ADRESSES macro

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-02-18 22:29:26 +05:30
Markus Niebel
d7cbcc762e spi: spi-mxc: add defines for clk inactive state for ECSPI
Provide define for the SCLK_CTL field of the config reg of ECSPI.
While at it, oder the defines to improve readability and make
adding more defines easier.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-02-18 22:29:26 +05:30
Fabio Estevam
6d73c23410 mx6: Enable L2 cache support
Add L2 cache support and enable it by default.

Configure the L2 cache in the same way as done by FSL kernel:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-02-11 11:24:12 +01:00
Fabio Estevam
6a99f03d69 imx: Introduce a header for the imx cpu versions
Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header
files, introduce a common header to centralize such definitions.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-02-11 11:24:11 +01:00
Marek Vasut
e9be4292e4 ARM: mx6: Add PCI express driver
Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the
PCIe block in RC mode only, the EP mode is NOT supported. The driver is
tested with the Intel e1000 NIC driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2014-01-26 12:41:20 +01:00
Marek Vasut
7981449280 ARM: mx6: Add PCI express clock configuration
Split the SATA clock enabling function and add PCI express clock
enabling function. The SATA clock enabling function starts up the
100MHz SATA reference PLL in ENET_PLL register, but the code can
be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull
this code into separate function. Moreover, add the PCIe clock
enabling code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-01-26 12:41:20 +01:00
Fabio Estevam
be2a3bb39a mx6: Revert "mx6: soc: Disable VDDPU regulator"
Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang
for people using FSL kernel 3.0.35 and 3.10, so revert it for now.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Reported-by: Pierre Aubert <p.aubert@staubli.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-17 10:16:48 +01:00
Fabio Estevam
3a21773129 mx6: Add initial support for the Hummingboard solo
SolidRun has designed the Hummingboard board based on mx6q/dl/solo.

Add the initial support for the mx6 solo variant.

More information about this hardware can be found at:
http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware

(Carrier-One was the previous name of Hummingboard).

Based on the work from Jon Nettleton <jon.nettleton@gmail.com>.

Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-15 10:33:25 +01:00
Fabio Estevam
5f98d0b5d3 mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.

No changes are made to mx6slevk, which uses the default 50MHz fec clock.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-01-15 10:33:25 +01:00
Fabio Estevam
0222982780 mx6: soc: Disable VDDPU regulator
As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator
in order to save power.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02 17:16:51 +01:00
Fabio Estevam
fc740648bd mx6: soc: Staticize set_vddsoc()
set_vddsoc() is not used anywhere else, so make it static.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-02 17:16:50 +01:00
Eric Nelson
b47abc36aa i.MX6 (DQ/DLS): use macros for mux and pad declarations
This allows the use of either or both declarations from
the files mx6q_pins.h and mx6dl_pins.h.

All board files should include <asm/arch/mx6-pins.h>
with one of the following defined in boards.cfg
    MX6Q   - for boards targeting i.MX6Q or i.MX6D
    MX6DL  - for boards targeting i.MX6DL
    MX6S   - for boards targeting i.MX6S
    MX6QDL - for boards that support any of the above with
             run-time detection

Pad declarations will be MX6_PAD_x for single-variant boards
and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both
processor classes.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-12-17 17:12:34 +01:00
Eric Nelson
a31d3efae1 i.MX6DQ/DLS: whitespace: Align IOMUX_PAD column in declarations
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-11-13 10:19:51 +01:00
Eric Nelson
38d8219801 i.MX6DQ/DLS: remove unused pad declarations
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-11-13 10:19:51 +01:00
Eric Nelson
6001c11abc i.MX6DQ: Add Pinmux settings that are present in mainline and Dual-Lite/Solo
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-11-13 10:19:51 +01:00
Eric Nelson
066b2d68a0 i.MX6DQ/DLS: remove useless mux/pad declarations
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-11-13 10:19:50 +01:00
Eric Nelson
10fda48779 i.MX6DQ/DLS: replace pad names with their Linux kernel equivalents
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-11-13 10:19:50 +01:00
Albert ARIBAUD
85b8c5c4bf Merge branch 'iu-boot/master' into 'u-boot-arm/master'
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	board/compulab/cm_t35/Makefile
	board/corscience/tricorder/Makefile
	board/ppcag/bg0900/Makefile
	drivers/bootcount/Makefile
	include/configs/omap4_common.h
	include/configs/pdnb3.h

Makefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:

	board/compulab/common/Makefile
	board/udoo/Makefile

include/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.

include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.

Note: 'git show' will also list two files just because
they are new:

	include/configs/am335x_igep0033.h
	include/configs/omap3_igep00x0.h
2013-11-09 22:59:47 +01:00