imx: correct HAB status for new chip TO

According to:

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0

ENGR00287268 mx6: fix the secure boot issue on the new tapout chip
commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b

newer i.MX6 silicon revisions have an updated ROM and HAB API table.
Please see also:

i.MX Applications Processors Documentation
Engineering Bulletins
EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison

With this change the secure boot status is correctly displayed

Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Stefano Babic 2014-06-10 10:26:22 +02:00
parent a81c90f4c8
commit f2f07e8553
4 changed files with 82 additions and 14 deletions

View file

@ -7,15 +7,69 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hab.h>
#include <asm/arch/sys_proto.h>
/* -------- start of HAB API updates ------------*/
#define hab_rvt_report_event ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)
#define hab_rvt_report_status ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)
#define hab_rvt_authenticate_image \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)
#define hab_rvt_entry ((hab_rvt_entry_t *)HAB_RVT_ENTRY)
#define hab_rvt_exit ((hab_rvt_exit_t *)HAB_RVT_EXIT)
#define hab_rvt_clock_init HAB_RVT_CLOCK_INIT
#define hab_rvt_report_event_p \
( \
((is_cpu_type(MXC_CPU_MX6Q) || \
is_cpu_type(MXC_CPU_MX6D)) && \
(soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
(is_cpu_type(MXC_CPU_MX6DL) && \
(soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
)
#define hab_rvt_report_status_p \
( \
((is_cpu_type(MXC_CPU_MX6Q) || \
is_cpu_type(MXC_CPU_MX6D)) && \
(soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
(is_cpu_type(MXC_CPU_MX6DL) && \
(soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
)
#define hab_rvt_authenticate_image_p \
( \
((is_cpu_type(MXC_CPU_MX6Q) || \
is_cpu_type(MXC_CPU_MX6D)) && \
(soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
(is_cpu_type(MXC_CPU_MX6DL) && \
(soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
)
#define hab_rvt_entry_p \
( \
((is_cpu_type(MXC_CPU_MX6Q) || \
is_cpu_type(MXC_CPU_MX6D)) && \
(soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
(is_cpu_type(MXC_CPU_MX6DL) && \
(soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
)
#define hab_rvt_exit_p \
( \
((is_cpu_type(MXC_CPU_MX6Q) || \
is_cpu_type(MXC_CPU_MX6D)) && \
(soc_rev() >= CHIP_REV_1_5)) ? \
((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
(is_cpu_type(MXC_CPU_MX6DL) && \
(soc_rev() >= CHIP_REV_1_2)) ? \
((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
((hab_rvt_exit_t *)HAB_RVT_EXIT) \
)
bool is_hab_enabled(void)
{
@ -52,6 +106,11 @@ int get_hab_status(void)
size_t bytes = sizeof(event_data); /* Event size in bytes */
enum hab_config config = 0;
enum hab_state state = 0;
hab_rvt_report_event_t *hab_rvt_report_event;
hab_rvt_report_status_t *hab_rvt_report_status;
hab_rvt_report_event = hab_rvt_report_event_p;
hab_rvt_report_status = hab_rvt_report_status_p;
if (is_hab_enabled())
puts("\nSecure boot enabled\n");

View file

@ -53,12 +53,17 @@ typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,
void **, size_t *, hab_loader_callback_f_t);
typedef void hapi_clock_init_t(void);
#define HAB_RVT_REPORT_EVENT (*(uint32_t *)0x000000B4)
#define HAB_RVT_REPORT_STATUS (*(uint32_t *)0x000000B8)
#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *)0x000000A4)
#define HAB_RVT_ENTRY (*(uint32_t *)0x00000098)
#define HAB_RVT_EXIT (*(uint32_t *)0x0000009C)
#define HAB_RVT_CLOCK_INIT ((hapi_clock_init_t *)0x0000024D)
#define HAB_RVT_REPORT_EVENT (*(uint32_t *)0x000000B4)
#define HAB_RVT_REPORT_STATUS (*(uint32_t *)0x000000B8)
#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *)0x000000A4)
#define HAB_RVT_ENTRY (*(uint32_t *)0x00000098)
#define HAB_RVT_EXIT (*(uint32_t *)0x0000009C)
#define HAB_RVT_REPORT_EVENT_NEW (*(uint32_t *)0x000000B8)
#define HAB_RVT_REPORT_STATUS_NEW (*(uint32_t *)0x000000BC)
#define HAB_RVT_AUTHENTICATE_IMAGE_NEW (*(uint32_t *)0x000000A8)
#define HAB_RVT_ENTRY_NEW (*(uint32_t *)0x0000009C)
#define HAB_RVT_EXIT_NEW (*(uint32_t *)0x000000A0)
#define HAB_CID_ROM 0 /**< ROM Caller ID */
#define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/

View file

@ -217,6 +217,8 @@
#define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
#define CHIP_REV_1_0 0x10
#define CHIP_REV_1_2 0x12
#define CHIP_REV_1_5 0x15
#define IRAM_SIZE 0x00040000
#define FEC_QUIRK_ENET_MAC

View file

@ -11,7 +11,9 @@
#include <asm/imx-common/regs-common.h>
#include "../arch-imx/cpu.h"
#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
#define soc_rev() (get_cpu_rev() & 0xFF)
#define is_soc_rev(rev) (soc_rev() - rev)
u32 get_cpu_rev(void);
/* returns MXC_CPU_ value */