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imx: correct HAB status for new chip TO
According to: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0 ENGR00287268 mx6: fix the secure boot issue on the new tapout chip commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b newer i.MX6 silicon revisions have an updated ROM and HAB API table. Please see also: i.MX Applications Processors Documentation Engineering Bulletins EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison With this change the secure boot status is correctly displayed Signed-off-by: Stefano Babic <sbabic@denx.de>
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4 changed files with 82 additions and 14 deletions
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@ -7,15 +7,69 @@
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/hab.h>
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#include <asm/arch/sys_proto.h>
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/* -------- start of HAB API updates ------------*/
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#define hab_rvt_report_event ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)
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#define hab_rvt_report_status ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)
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#define hab_rvt_authenticate_image \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)
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#define hab_rvt_entry ((hab_rvt_entry_t *)HAB_RVT_ENTRY)
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#define hab_rvt_exit ((hab_rvt_exit_t *)HAB_RVT_EXIT)
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#define hab_rvt_clock_init HAB_RVT_CLOCK_INIT
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#define hab_rvt_report_event_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
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((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
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)
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#define hab_rvt_report_status_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
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((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
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)
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#define hab_rvt_authenticate_image_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
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((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
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)
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#define hab_rvt_entry_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
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((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
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)
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#define hab_rvt_exit_p \
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( \
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((is_cpu_type(MXC_CPU_MX6Q) || \
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is_cpu_type(MXC_CPU_MX6D)) && \
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(soc_rev() >= CHIP_REV_1_5)) ? \
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((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
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(is_cpu_type(MXC_CPU_MX6DL) && \
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(soc_rev() >= CHIP_REV_1_2)) ? \
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((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
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((hab_rvt_exit_t *)HAB_RVT_EXIT) \
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)
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bool is_hab_enabled(void)
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{
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@ -52,6 +106,11 @@ int get_hab_status(void)
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size_t bytes = sizeof(event_data); /* Event size in bytes */
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enum hab_config config = 0;
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enum hab_state state = 0;
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hab_rvt_report_event_t *hab_rvt_report_event;
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hab_rvt_report_status_t *hab_rvt_report_status;
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hab_rvt_report_event = hab_rvt_report_event_p;
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hab_rvt_report_status = hab_rvt_report_status_p;
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if (is_hab_enabled())
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puts("\nSecure boot enabled\n");
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@ -53,12 +53,17 @@ typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,
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void **, size_t *, hab_loader_callback_f_t);
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typedef void hapi_clock_init_t(void);
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#define HAB_RVT_REPORT_EVENT (*(uint32_t *)0x000000B4)
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#define HAB_RVT_REPORT_STATUS (*(uint32_t *)0x000000B8)
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#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *)0x000000A4)
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#define HAB_RVT_ENTRY (*(uint32_t *)0x00000098)
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#define HAB_RVT_EXIT (*(uint32_t *)0x0000009C)
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#define HAB_RVT_CLOCK_INIT ((hapi_clock_init_t *)0x0000024D)
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#define HAB_RVT_REPORT_EVENT (*(uint32_t *)0x000000B4)
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#define HAB_RVT_REPORT_STATUS (*(uint32_t *)0x000000B8)
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#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *)0x000000A4)
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#define HAB_RVT_ENTRY (*(uint32_t *)0x00000098)
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#define HAB_RVT_EXIT (*(uint32_t *)0x0000009C)
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#define HAB_RVT_REPORT_EVENT_NEW (*(uint32_t *)0x000000B8)
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#define HAB_RVT_REPORT_STATUS_NEW (*(uint32_t *)0x000000BC)
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#define HAB_RVT_AUTHENTICATE_IMAGE_NEW (*(uint32_t *)0x000000A8)
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#define HAB_RVT_ENTRY_NEW (*(uint32_t *)0x0000009C)
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#define HAB_RVT_EXIT_NEW (*(uint32_t *)0x000000A0)
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#define HAB_CID_ROM 0 /**< ROM Caller ID */
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#define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
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@ -217,6 +217,8 @@
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#define IP2APB_USBPHY2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
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#define CHIP_REV_1_0 0x10
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#define CHIP_REV_1_2 0x12
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#define CHIP_REV_1_5 0x15
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#define IRAM_SIZE 0x00040000
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#define FEC_QUIRK_ENET_MAC
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@ -11,7 +11,9 @@
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#include <asm/imx-common/regs-common.h>
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#include "../arch-imx/cpu.h"
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#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
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#define soc_rev() (get_cpu_rev() & 0xFF)
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#define is_soc_rev(rev) (soc_rev() - rev)
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u32 get_cpu_rev(void);
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/* returns MXC_CPU_ value */
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