Commit graph

271 commits

Author SHA1 Message Date
Stefan Roese
738815c0cc ppc4xx: Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-02 11:44:46 +02:00
Grzegorz Bernacki
2db6478406 Program EPLD to force full duplex mode for PHY.
EPLD forces modes of PHY operation. By default full duplex is turned off.
This fix turns it on.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-10-02 11:30:37 +02:00
Grzegorz Bernacki
7f19139389 [PPC440SPe] Improve PCIe configuration space access
- correct configuration space mapping
- correct bus numbering
- better access to config space

Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 18:20:23 +02:00
Grzegorz Bernacki
15ee4734e4 [PPC440SPe] Convert machine check exceptions handling
Convert using fixup mechanism to suppressing MCK for the duration of config
read/write transaction: while fixups work fine with the case of a precise
exception, we identified a major drawback with this approach when there's
an imprecise case. In this scenario there is the following race condition:
the fixup is (by design) set to catch the instruction following the one
actually causing the exception; if an interrupt (e.g. decrementer) happens
between those two instructions, the ISR code is executed before the fixup
handler the machine check is no longer protected by the fixup handler as it
appears as within the ISR code. In consequence the fixup approach is being
phased out and replaced with explicit suppressing of MCK during a PCIe
config read/write cycle.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 17:46:18 +02:00
Kim Phillips
79f240f7ec lib_ppc: make board_add_ram_info weak
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.

this consequently eliminates CONFIG_ADD_RAM_INFO.

Thanks to Stefan for the hint.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-18 21:39:46 +02:00
Stefan Roese
3b3bff4cbf Merge with git://www.denx.de/git/u-boot.git 2007-08-14 16:36:29 +02:00
Stefan Roese
429d9571f6 Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 15:03:17 +02:00
Stefan Roese
34886bbea2 Merge with /home/stefan/git/u-boot/zeus 2007-08-14 15:00:42 +02:00
Stefan Roese
779e975117 ppc4xx: Add initial Zeus (PPC405EP) board support
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 14:44:41 +02:00
Stefan Roese
273db7e1bd ppc4xx: Fix problem in PLL clock calculation
This patch was originall provided by David Mitchell <dmitchell@amcc.com>
and fixes a bug in the PLL clock calculation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-13 09:05:33 +02:00
Markus Klotzbuecher
78549bbf44 Merge with git://www.denx.de/git/u-boot.git 2007-08-07 22:30:29 +02:00
Wolfgang Denk
f2c2a937d8 Merge with /home/wd/git/u-boot/custodian/u-boot-testing 2007-08-06 01:11:08 +02:00
Wolfgang Denk
5728be389e Coding style cleanup. Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-06 01:01:49 +02:00
Andy Fleming
6bf6f114dc Merge branch 'testing' into working
Conflicts:

	CHANGELOG
	fs/fat/fat.c
	include/configs/MPC8560ADS.h
	include/configs/pcs440ep.h
	net/eth.c
2007-08-03 02:23:23 -05:00
Stefan Roese
9ca8d79de0 ppc4xx: Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-02 08:33:56 +02:00
Grzegorz Bernacki
c924098122 [ppc440SPe] Graceful recovery from machine check during PCIe configuration
During config transactions on the PCIe bus an attempt to scan for a
non-existent device can lead to a machine check exception with certain
peripheral devices. In order to avoid crashing in such scenarios the
instrumented versions of the config cycle read routines are introduced, so
the exceptions fixups framework can gracefully recover.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02 08:25:27 +02:00
Rafal Jaworowski
dec99558b9 [ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A
This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0a
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02 08:25:18 +02:00
Eugene OBrien
d2f6800662 ppc4xx: Update AMCC Bamboo 440EP support
Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)

Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)

Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map

Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 10:24:56 +02:00
Stefan Roese
27a528fb41 ppc4xx: Only print ECC related info when the error bis are set
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-30 11:04:57 +02:00
John Otken
d4024bb72d ppc4xx: Add support for AMCC 405EP Taihu board
Signed-off-by: John Otken <john@softadvances.com>
2007-07-26 17:49:11 +02:00
Stefan Roese
a71d96eac8 ppc4xx: Fix bug with default GPIO output value
As spotted by Matthias Fuchs, the default output values for all GPIO1
outputs were not setup correctly. This patch fixes this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-20 15:03:44 +02:00
Stefan Roese
8f085e324a Merge with git://www.denx.de/git/u-boot.git 2007-07-16 13:28:47 +02:00
Stefan Roese
8848ec858f ppc4xx: Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:02:12 +02:00
Stefan Roese
6ed14addf9 ppc4xx: Add new weak functions to support boardspecific DDR2 configuration
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
support non default, boardspecific DDR(2) controller configuration.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 09:57:00 +02:00
Stefan Roese
5743a9207a ppc4xx: Add remove_tlb() function to remove a mem area from TLB setup
The new function remove_tlb() can be used to remove the TLB's used to
map a specific memory region. This is especially useful for the DDR(2)
setup routines which configure the SDRAM area temporarily as a cached
area (for speedup on auto-calibration and ECC generation) and later
need this area uncached for normal usage.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 08:53:51 +02:00
Stefan Roese
a2e1c7098c ppc4xx: Change receive buffer handling in the 4xx emac driver
This change fixes a bug in the receive buffer handling, that
could lead to problems upon high network traffic (broadcasts...).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-12 16:32:08 +02:00
Wolfgang Denk
239f05ee4d Update CHANGELOG, minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-12 01:45:34 +02:00
Jon Loeliger
068b60a0eb cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-10 10:27:39 -05:00
Jon Loeliger
3a1ed1e1f9 cpu/[7a-ln-z]*: Remove obsolete references to CONFIG_COMMANDS
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-09 18:57:22 -05:00
Wolfgang Denk
4ef218f6fd Coding style cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-10 00:01:28 +02:00
Wolfgang Denk
bf6a9ca9b2 Merge with /home/hs/Atronic/u-boot 2007-07-09 23:41:45 +02:00
Stefan Roese
6b0a174a1e Fix problem with get/setdcr commands introduced by cfg patches
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-06 10:37:56 +02:00
Sergei Poselenov
b44896215a Merged POST framework with the current TOT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2007-07-05 08:17:37 +02:00
Wolfgang Denk
52b8704d02 Fix a few file permission problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-04 00:43:53 +02:00
Jon Loeliger
737184114e cpu/ non-mpc*: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.

All transformations are of the form:
Before:
    #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
    #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-04 00:34:13 +02:00
Stefan Roese
e4feb7638c Merge with git://www.denx.de/git/u-boot.git 2007-06-25 20:20:30 +02:00
Heiko Schocher
a5d71e290f [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-06-25 19:11:37 +02:00
Niklaus Giger
a1bd6200ec ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt
This patch prints the DDR status registers upon machine check
interrupt on the 440EPx/GRx. This can be useful especially when
ECC support is enabled.

I added some small changes to the original patch from Niklaus to
make it compile clean.

Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 17:03:13 +02:00
Niklaus Giger
807018fb7f ppc4xx: Fix O=buildir builds
This patch fixes the problem to assemble cpu/ppc4xx/start.S
experienced last week where building failed having specified
O=../build.sequoia.

Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
2007-06-25 16:50:55 +02:00
Matthias Fuchs
5a1c9ff0c4 ppc4xx: Add pci_pre_init() for 405 boards
This patch adds support for calling a plattform dependant
pci_pre_init() function for 405 boards. This can be used to
move the current pci_405gp_fixup_irq() function into the
board code.

This patch also makes the CFG_PCI_PRE_INIT define obsolete.
A default function with 'weak' attribute is used when
a board specific pci_pre_init() is not implemented.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-06-25 11:57:50 +02:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Igor Lisitsin
a11e06965e Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:21:01 +02:00
Heiko Schocher
566a494f59 [PCS440EP] upgrade the PCS440EP board:
- Show on the Status LEDs, some States of the board.
                - Get the MAC addresses from the EEProm
                - use PREBOOT
                - use the CF on the board.
                - check the U-Boot image in the Flash with a SHA1
                  checksum.
                - use dynamic TLB entries generation for the SDRAM

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-06-22 19:11:54 +02:00
Stefan Roese
3a1f5c81b0 ppc4xx: Fix problem with extended program_tlb() funtion
The recently extended program_tlb() function had a problem when
multiple TLB's had to be setup (for example with 512MB of SDRAM). The
virtual address was not incremented. This patch fixes this issue
and is tested on Katmai with 512MB SDRAM.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-22 16:58:40 +02:00
Rafal Jaworowski
02032e8f14 [ppc] Fix build breakage for all non-4xx PowerPC variants.
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup
2007-06-22 14:58:04 +02:00
Wolfgang Denk
83b4cfa3d6 Coding style cleanup. Refresh CHANGELOG. 2007-06-20 18:14:24 +02:00
Stefan Roese
6b44466cde Merge with git://www.denx.de/git/u-boot.git 2007-06-20 08:23:42 +02:00
Stefan Roese
df8a24cdd3 [ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL
image in the OCM and the init-data area (incl. cache). This patch
fixes this problem.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-19 16:42:31 +02:00
Stefan Roese
b7c3e93105 Merge with /home/stefan/git/u-boot/denx-440-exceptions 2007-06-15 11:20:13 +02:00
Grzegorz Bernacki
efa35cf12d ppc4xx: Clean up 440 exceptions handling
- Introduced dedicated switches for building 440 and 405 images required
  for 440-specific machine instructions like 'rfmci' etc.

- Exception vectors moved to the proper location (_start moved away from
  the critical exception handler space, which it occupied)

- CriticalInput now serviced (with default handler)

- MachineCheck properly serviced (added a dedicated handler and return
  subroutine)

- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
  unhandled and those not relevant for 4xx were eliminated)

- Eliminated Linux leftovers, removed dead code

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 11:19:28 +02:00