This driver can be used for kirkwood SoCs by enabling CONFIG_RTC_MV. Tested on
Global Scale Technologies Dreamplug.
Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
The CONFIG_AT91RM9200_USART is an remnant of
18ed5e9550 which deleted the
at91rm9200_usart driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of
at91rm9200 arch code in arm920t.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.
VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
SPL framework
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
payload size and load address from this header. If the
header is not detected assume u-boot.bin as payload
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Provide alternate implementations of board_init_f()
board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
it to board config header from config.mk
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
vector
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.
This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.
Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.
For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails
This work draws upon previous work done for x-loader by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
to SoC directory). Will help in having single SPL for all
boards.
- Non-essential part(the pins not essential for u-boot to function)
need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The basic hardware init of OMAP4(s_init()) can happen in 4
different contexts:
1. SPL running from SRAM
2. U-Boot running from FLASH
3. Non-XIP U-Boot loaded to SDRAM by SPL
4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
Configuration Header feature
What level of hw initialization gets done depends on this
context. Add a utility function to find this context.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The function davinci_emac_mii_mode_sel() is defined in
board/davinci/common/misc.c for any DA8xx CPU which has
CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being
declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board.
This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC
is enabled.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned
on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface
specified in <asm/gpio.h> . The driver has support for both manipulating
GPIO pins as well as automatically configuring the pin multiplexor
registers to set the pin function to GPIO.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
In preparation for a generic GPIO driver for the DA8xx processors,
rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files
which include it.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().
Enclose definition of this array in #ifdef...#endif for
the same.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Clean up some duplicated prototype declarations.
Get rid of now useless AVR32 initcalls.h file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Graeme Russ <graeme.russ@gmail.com>
Also remove bogus comment.
Signed-off-by: Zhong hongbo <bocui107@gmail.com>
Changed commit message
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
This patch removes the architecture specific implementation of
version_string where possible. Some architectures use a special place
and therefore we provide U_BOOT_VERSION_STRING definition and a common
weak symbol version_string.
Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Peter Pan <pppeterpppan@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
* 'master' of git://git.denx.de/u-boot-mmc:
mmc: rescan fails on empty slot
AT91:mmc:fix multiple read/write error
mmc: Access mode validation for eMMC cards > 2 GiB
mmc: sh_mmcif: add support for Renesas MMCIF
mmc: fix the condition for MMC version 4
MMC: add marvell sdhci driver
MMC: add sdhci generic framework
MMC: add erase function to both mmc and sd
MMC: unify mmc read and write operation
mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.
Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
On i.MX27, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
On i.MX5, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an
optional NAND flash.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Adding support for USB host on imx25 using the internal PHY. Changing the name
of base address define for imx31 to get some unification.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
mx27_uart_init_pins does the IOMUX setting for UART1 port.
Change the function name to make the UART port number explicit.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on
but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI
on in this case.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
* Fix compiler error for cpu at91sam9, if lowlevel init is enabled
* use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC
Signed-off-by: Jens Scharsig
This is a copy of arm926ejs/at91 api for perpherial initialisation.
At the moment we just need the usart part of the api.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch enables the new clock features from arm920t/at91/clock.c. This
is an required step to get at91rm9200_usart replaced by atmel_usart driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Jens Scharsig <js_at_ng@scharsoft.de>
Cc: Eric Bénard <eric@eukrea.com>
This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The
arm926ejs specialities are removed from arm920t version and vice versa.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch sets the ATMEL_PMX_AA_TXD2 to the correct value.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Jens Scharsig <js_at_ng@scharsoft.de>
CC: eric@eukrea.com
Acked-by: Eric Bénard <eric@eukrea.com>
As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff. This value is not only wrong but
illegal according to the reference manual.
One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command. The sleep will hang
forever.
The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.
Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
PL310 is the L2$ controller from ARM used in many SoCs
including the Cortex-A9 based OMAP4430
Add support for some of the key PL310 operations
- Invalidate all
- Invalidate range
- Flush(clean & invalidate) all
- Flush range
Signed-off-by: Aneesh V <aneesh@ti.com>
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
than a range flush on the entire memory(flush_cache())
Provide a default implementation for flush_dcache_all()
for backward compatibility and to avoid build issues.
Signed-off-by: Aneesh V <aneesh@ti.com>
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
- Make changes according to the new framework
Signed-off-by: Aneesh V <aneesh@ti.com>
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:
CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF
Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
* Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
* Changed all three flags to the final names suggested as above
and accordingly changed the commit message
- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU
- Add generic ARMv7 cache maintenance operations that affect all
caches known to ARMv7 CPUs. For instance in Cortex-A8 these
opertions will affect both L1 and L2 caches. In Cortex-A9
these will affect only L1 cache
- D-cache operations supported:
- Invalidate entire D-cache
- Invalidate D-cache range
- Flush(clean & invalidate) entire D-cache
- Flush D-cache range
- I-cache operations supported:
- Invalidate entire I-cache
- Add maintenance functions for TLB, branch predictor array etc.
- Enable -march=armv7-a so that armv7 assembly instructions can be
used
Signed-off-by: Aneesh V <aneesh@ti.com>
* 'master' of git://git.denx.de/u-boot-arm:
run arm_pci_init after relocation
IXP42x PCI rewrite
update/fix PDNB3 board
update/fix IXDP425 / IXDPG425 boards
add dvlhost (dLAN 200 AV Wireless G) board
IXP NPE: add support for fixed-speed MII ports
update/fix AcTux4 board
update/fix AcTux3 board
update/fix AcTux2 board
update/fix AcTux1 board
use -ffunction-sections / --gc-sections on IXP42x
support CONFIG_SYS_LDSCRIPT on ARM
fix "depend" target in npe directory
Fix IXP code to work after relocation was added
trigger hardware watchdog in IXP42x serial driver
add support for IXP42x Rev. B1 and newer
add XScale sub architecture (IXP/PXA) to maintainer list
Conflicts:
arch/arm/lib/board.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead. Move board-specific PCI
setup code (clock/reset) to board directory.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
- jump to real flash location after reset before turning off flash mirror
- fix timer system to use HZ == 1000, remove broken interrupt-based code
Signed-off-by: Michael Schwingen <michael@schwingen.org>
The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it. Drop it.
This includes support for VFD displays which have always been used by
this board only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
* Fix: timer.c compile error io.h not found with arm/at91rm9200
* update arm920t/at91 to ATMEL_xxx name scheme
* update arm920t/at91 soc lib
* update at91_emac driver
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
