Commit graph

1319 commits

Author SHA1 Message Date
Andre Przywara
1ef923851a ARM: add C function to switch to non-secure state
The core specific part of the work is done in the assembly routine
in nonsec_virt.S, introduced with the previous patch, but for the full
glory we need to setup the GIC distributor interface once for the
whole system, which is done in C here.
The routine is placed in arch/arm/cpu/armv7 to allow easy access from
other ARMv7 boards.

We check the availability of the security extensions first.

Since we need a safe way to access the GIC, we use the PERIPHBASE
registers on Cortex-A15 and A7 CPUs and do some sanity checks.
Boards not implementing the CBAR can override this value via a
configuration file variable.

Then we actually do the GIC enablement:
a) enable the GIC distributor, both for non-secure and secure state
   (GICD_CTLR[1:0] = 11b)
b) allow all interrupts to be handled from non-secure state
   (GICD_IGROUPRn = 0xFFFFFFFF)

The core specific GIC setup is then done in the assembly routine.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-10-03 21:28:43 +02:00
Andre Przywara
16212b594f ARM: add assembly routine to switch to non-secure state
While actually switching to non-secure state is one thing, another
part of this process is to make sure that we still have full access
to the interrupt controller (GIC).
The GIC is fully aware of secure vs. non-secure state, some
registers are banked, others may be configured to be accessible from
secure state only.
To be as generic as possible, we get the GIC memory mapped address
based on the PERIPHBASE value in the CBAR register. Since this
register is not architecturally defined, we check the MIDR before to
be from an A15 or A7.
For CPUs not having the CBAR or boards with wrong information herein
we allow providing the base address as a configuration variable.

Now that we know the GIC address, we:
a) allow private interrupts to be delivered to the core
   (GICD_IGROUPR0 = 0xFFFFFFFF)
b) enable the CPU interface (GICC_CTLR[0] = 1)
c) set the priority filter to allow non-secure interrupts
   (GICC_PMR = 0xFF)

Also we allow access to all coprocessor interfaces from non-secure
state by writing the appropriate bits in the NSACR register.

The generic timer base frequency register is only accessible from
secure state, so we have to program it now. Actually this should be
done from primary firmware before, but some boards seems to omit
this, so if needed we do this here with a board specific value.
The Versatile Express board does not need this, so we remove the
frequency from the configuration file here.

After having switched to non-secure state, we also enable the
non-secure GIC CPU interface, since this register is banked.

Since we need to call this routine also directly from the smp_pen
later (where we don't have any stack), we can only use caller saved
registers r0-r3 and r12 to not mess with the compiler.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-10-03 21:28:25 +02:00
Andre Przywara
d75ba503a9 ARM: prepare armv7.h to be included from assembly source
armv7.h contains some useful constants, but also C prototypes.
To include it also in assembly files, protect the non-assembly
part appropriately.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-10-03 08:25:58 +02:00
Tom Rini
6297872cd5 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-10-02 11:45:22 -04:00
Albert ARIBAUD
f04c537629 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-10-02 14:53:27 +02:00
Albert ARIBAUD
5c8d5b6fc1 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-10-02 08:10:36 +02:00
Eric Nelson
ce7a7f5e6b i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID
This patch adds the pad to i.MX6DQ and changes the i.MX6DLS
declaration to match the Linux kernel declaration.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2013-09-27 13:53:35 +02:00
Bo Shen
3668ce3c80 ARM: atmel: add RNDIS gadget support
Add RNDIS gadget support to test atmel usba udc driver

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-09-24 17:51:35 +02:00
Bo Shen
ee7e9a3e72 ARM: atmel: correct UDPHS name
Correct the UDPHS name from UDHPS

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Marek Vasut <marex@denx.de>
2013-09-24 17:51:35 +02:00
Bo Shen
9e40493fd8 USB: gadget: add atmel usba udc driver
Add atmel usba udc driver support, porting from Linux kernel

The original code in Linux Kernel information is as following

commit e01ee9f509a927158f670408b41127d4166db1c7
Author: Jingoo Han <jg1.han@samsung.com>
Date:   Tue Jul 30 17:00:51 2013 +0900

    usb: gadget: use dev_get_platdata()

    Use the wrapper function for retrieving the platform data instead of
    accessing dev->platform_data directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-09-24 17:51:35 +02:00
Dani Krishna Mohan
5fb5b15541 Sound: I2S: Replacing I2S1 with I2S0 channel.
This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
2013-09-24 09:10:33 -04:00
Dani Krishna Mohan
3dd22a37aa ARM: Added I2S0 clocks for audio
This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
2013-09-24 09:10:33 -04:00
Jeroen Hofstee
fe1378a961 ARM: use r9 for gd
To be more EABI compliant and as a preparation for building
with clang, use the platform-specific r9 register for gd
instead of r8.

note: The FIQ is not updated since it is not used in u-boot,
and under discussion for the time being.

The following checkpatch warning is ignored:
WARNING: Use of volatile is usually wrong: see
Documentation/volatile-considered-harmful.txt

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-09-23 18:00:02 +02:00
Lokesh Vutla
e22cc0cf13 ARM: OMAP5: Avoid writing into LDO SRAM bits
Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten as they are loaded from EFUSE. So avoid
writing into these registers.

Boot tested on OMAP5432 ES2.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-09-20 16:57:40 -04:00
Steve Kipisz
52f7d8442e am335x:Handle worst case scenario for Errata 1.0.24
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.

Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Adapt to current framework]
Signed-off-by: Tom Rini <trini@ti.com>
2013-09-20 16:57:40 -04:00
Tom Rini
9721027aae am335x_evm: am33xx_spl_board_init function and scale core frequency
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on.  In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed.  In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later than rev A1, and then we can ramp up to the PG1.0 maximum
of 720Mhz.  In the case of Beaglebone Black, we are either on PG2.0 that
supports 1GHz or PG2.1.  As PG2.0 may or may not have efuse_sma set, we
cannot rely on this probe.  In the case of the GP EVM, EVM SK and IDK we
need to rely on the efuse_sma if we are on PG2.1, and the defaults for
PG1.0/2.0.

Signed-off-by: Tom Rini <trini@ti.com>
2013-09-20 16:57:35 -04:00
Eric Nelson
e654ddf7b3 i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10
This patch fixes a regression introduced by commit 87d720e0.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2013-09-20 17:55:37 +02:00
Fabio Estevam
31f07964c8 mx6slevk: Add Ethernet support
mx6slevk has a SMSC8720 connected in RMII mode.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-09-20 17:55:37 +02:00
Markus Niebel
b4c927b33d ARM: arch-mx6: fix PLL2_PFD2_FREQ
according to the manual frequency of PLL2 PFD2 is 396.000.000
instead of 400.000.000

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-09-20 17:55:35 +02:00
Tom Rini
5287946c06 am33xx: Add the efuse_sma CONTROL_MODULE register
Starting with PG2.1 we have a register in the CONTROL_MODULE that is set
with the package type and maximum supported frequency.  Add this, and
the relevant mask/values.

Signed-off-by: Tom Rini <trini@ti.com>
2013-09-20 11:01:26 -04:00
Tom Rini
6a0d803c7c am33xx: Add am33xx_spl_board_init function, call
We need to allow for a further call-out in spl_board_init.  Call this
am33xx_spl_board_init and add a __weak version.  This function may be
used to scale the MPU frequency up, depending on board needs.

Signed-off-by: Tom Rini <trini@ti.com>
2013-09-20 11:01:26 -04:00
Nobuhiro Iwamatsu
9346d54366 arm: omap5: echi: Add GPL-2.0+ SPDX-License-Identifier
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2013-09-20 10:30:54 -04:00
Masahiro Yamada
aeef2b090d ARM: s3c44b0: remove remainders of dead board
Because commit 5dc5f36 removed B2 board support,
arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/*
are not necessary anymore.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
2013-09-19 08:59:49 +02:00
Kuo-Jung Su
771f74c3d3 arm: dma_alloc_coherent: malloc() -> memalign()
Even though the MMU/D-cache is off, some DMA engines still
expect strict address alignment.

For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet
controllers expect the tx/rx descriptors should always be aligned
to 16-bytes boundary.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-09-14 12:08:00 +02:00
Stefano Babic
c4a7ece020 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	MAINTAINERS
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-09-13 12:10:07 +02:00
Albert ARIBAUD
5480ac3217 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
	tools/Makefile
2013-09-11 09:59:27 +02:00
Przemyslaw Marczak
7324907082 arm:mmc:goni/exynos: Fix wrong mmc base register devices offset.
On s5pc1xx mmc devices offset is multiply of 0x100000,
wrong value was 0x10000. Register offset always points
to mmc 0 before this change.

Add macro definition of mmc dev register offset to s5pc1xx and
exynos mmc.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung at samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-09-11 10:52:10 +09:00
trem
e24278aff2 mx27: add missing constant for mx27
Add some missing constant (chip select, ...)

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-09-10 19:12:55 +02:00
Marek Vasut
7b8657e2bd ARM: mxs: Receive r0 and r1 passed from BootROM
Make sure value in register r0 and r1 is preserved and passed to
the board_init_ll() and mxs_common_spl_init() where it can be
processed further. The value in r0 can be configured during the
BootStream generation to arbitary value, r1 contains pointer to
return value from CALL'd function.

This patch also clears the value in r0 before returning to BootROM
to make sure the BootROM is not confused by this value.

Finally, this patch cleans up some comments in the start.S file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-09-10 19:12:54 +02:00
Chin Liang See
68e1747f9c socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c. Also
separating reset configuration for virtual target and
real hardware Cyclone V development kit

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-09-06 12:09:06 +02:00
Albert ARIBAUD
19d829fa60 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
	drivers/serial/serial.c

The conflict above was a trivial case of adding one init
function in each branch, and manually resolved in merge.
2013-09-05 11:15:26 +02:00
Albert ARIBAUD
e62d5fb0da Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-09-04 14:06:56 +02:00
Albert ARIBAUD
4eef93da26 Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master' 2013-09-04 11:50:25 +02:00
Albert ARIBAUD
6d4511b2c6 Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'
Conflicts:
	arch/arm/include/asm/arch-zynq/hardware.h

The conflict above was trivial and solved during merge.
2013-09-03 14:01:02 +02:00
Eric Nelson
3fc4176dc4 i.MX6: Correct ANATOP_PFD (Phase Fractional Divider) register declarations
Some _CLKGATE_MASK and _FRAC_MASK macros were wrong for PFD_480
and the PFD_528 macros were missing.

Fortunately, the incorrect macros weren't being used.

Since both the PFD_480 and PFD_528 registers have the same
structure, and the fields are identical for [0..3] in bytes
[0..3], so a single set of macros will suffice.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-08-31 18:05:49 +02:00
Eric Nelson
1ca244ded5 i.MX6: Add convenience macros cpu_type(rev) and is_cpu_type(cpu)
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-08-31 18:03:55 +02:00
Stefano Babic
b83c709e8d imx: add status reporting for HAB status
Add functions to report the HAB (High Assurance Boot) status
of e.g. i.MX6 CPUs.

This is taken from

git://git.freescale.com/imx/uboot-imx.git branch imx_v2009.08_3.0.35_4.0.0
cpu/arm_cortexa8/mx6/generic.c
include/asm-arm/arch-mx6/mx6_secure.h

Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-08-31 15:06:29 +02:00
Heiko Schocher
988ea35501 arm, am335x: add watchdog support
Add TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-08-28 11:44:59 -04:00
Heiko Schocher
14c0158b18 arm, am335x: add some missing registers and defines for lcd and epwm support
- add missing register defines in struct cm_perpl
  epwmss0clkctrl
  epwmss2clkctrl
  lcdcclkstctrl
- add missing register defines in struct cm_dpll
  clklcdcpixelclk
- add struct pwmss_regs
- add struct pwmss_ecap_regs
- add LCD Controller base LCD_CNTL_BASE
- add PWM0 controller base PWMSS0_BASE

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2013-08-28 11:44:59 -04:00
Heiko Schocher
dafd4db33a arm, am33xx: add defines for gmii_sel_register bits
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-08-28 11:44:59 -04:00
Tom Rini
c3799fceda omap5: Expand CONFIG_SPL_MAX_SIZE and comment upon SRAM_SCRATCH_SPACE_ADDR
After examining both TRMs and doing some experimentation, we can rely on
using the start of the download area for CONFIG_SPL_TEXT_BASE and then
move SRAM_SCRATCH_SPACE_ADDR up, just like am335x.  This is required for
peripheral boot modes such as UART.

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-28 11:44:58 -04:00
Tom Rini
c27efde68d am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZE
We had been allowing the max size to be larger than actually allowed by
the ROM.  Expand the commentary here to explain why we set these
locations.

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-28 11:44:58 -04:00
Albert ARIBAUD
8d20836615 arm: omap3: fix SRAM copy and execution sequence
Fix size calculation in copy of go_to_speed into SRAM.
Use SRAM_CLK_CODE in call to SRAM-based go_to_speed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-08-28 11:44:58 -04:00
Taras Kondratiuk
40aadf9201 ARM: OMAP4470: Add voltage and dpll data
OMAP4470 reference design uses TWL6032 PMIC
with a following connection scheme:
  VDD_CORE = TWL6032 SMPS2
  VDD_MPU  = TWL6032 SMPS1
  VDD_IVA  = TWL6032 SMPS5

Set voltage and frequency values according to
OMAP4470 Data Manual Operating Condition Addendum v0.7

Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Taras Kondratiuk
696f81f9a9 ARM: OMAP4470: Add OMAP4470 identification
Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Fabio Estevam
76b6b19614 usb: ehci-mx5: Use 'bool' instead of 'unsigned char'
The 'enable' argument can be better expressed as boolean.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2013-08-26 21:56:34 +02:00
Dan Murphy
d3d037ae18 ARM: OMAP5: USB: Add OMAP5 common USB EHCI information
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host revision

Signed-off-by: Dan Murphy <dmurphy@ti.com>
2013-08-26 21:55:46 +02:00
Piotr Wilczek
0abb0aeeea arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12
This patch fix wrong value returned by 's5p_gpio_part_max' function
for Exynos4412.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-08-23 10:25:57 +09:00
Bo Shen
1f7b06ee5f arm: sama5d3: fix smc cs related registers offset
the smc cs related registers start at 0x600 and loop with 5 registers
so the reserved register should be in at91_smc structure while no in
at91_cs structure. So fix it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:58 +02:00
Wu, Josh
be3dbef502 ARM: at91: sama5d3: remove unused definition about PMECC alpha table offset
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:21 +02:00
Wu, Josh
b2d96dc28f ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size
Define the galois index table offset in chip head file. So user do not need
to set by himself. Driver will set it correctly according to sector_size.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
[rebased on master]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:16 +02:00
Bo Shen
e08d6f3aaf arm: atmel: add gmac support for sama5d3xek board
add gmac support for sama5d3xek board, the gmac embedded in:
  - sama5d33, sama5d34, sama5d35

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:49:54 +02:00
Andreas Wass
661edaafd4 ARM: mxs: Added application UART driver
The driver makes it possible to use an application UART as
the U-Boot output console for Freescale i.MX23/i.MX28 devices.

Signed-off-by: Andreas Wass <andreas.wass@dalelven.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2013-08-21 19:20:28 +02:00
Wolfgang Denk
bcd4d4eb2b SPDX-License-Identifier: fixing some problematic GPL-2.0 files
Unlike the other patches in this series so far, this commit fixes a
ambiguity in the license terms for some OMAP files:  the code was
originally derived from the Linux kernel sources, where it was clearly
marked as GPL-2.0 (i. e. without the "or later" part), but the U-Boot
version had a GPL-2.0+ file header added, apparently without
permission / relicensing from the original authors of the code.

Insert a GPL-2.0 SPDX-License-Identifier to fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
2013-08-19 15:34:13 -04:00
Tom Rini
e20cc2ca15 Merge branch 'master' of git://88.191.163.10/u-boot-arm
Fixup an easy conflict over adding the clk_get prototype and USB_OTG
defines for am33xx having moved.

Conflicts:
	arch/arm/include/asm/arch-am33xx/hardware.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-18 14:14:34 -04:00
Albert ARIBAUD
9ed887caec Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-08-17 18:24:13 +02:00
TENART Antoine
dcf846d5da Add TI816X support
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Fix warnings about vtp things in emif4.c, adapt AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 18:38:37 -04:00
TENART Antoine
9ed6e41239 Prepare for TI816X : reuse existing code from TI814X
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX

Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 18:38:37 -04:00
Heiko Schocher
78056717e3 arm/davinci/da850: add uart0_pins_rtscts and RMII_MHz_50_CLK in emac_pins_rmii pinmux
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2013-08-15 18:38:36 -04:00
Naumann Andreas
a704a6d615 ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx according to errata sprz318e.
In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup.
So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only.
Also, the FSEL registers exist no longer, so removed them from init.

Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel.

Signed-off-by: Andreas Naumann <anaumann@ultratronik.de>
[trini: Add extern to <asm/arch-omap3/clock.h>
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-15 09:09:29 -04:00
Lokesh Vutla
c06e498a16 ARM: AM43xx: Add header files
Adding the following data:
-> Prcm structure
-> Base addresses
-> Pin mux structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Heiko Schocher
0660481a59 ARM: AM33xx: Move s_init to a common place
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
95cb69faeb ARM: AM33xx: Cleanup clocks layer
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
94d77fb656 ARM: AM33xx: Cleanup dplls data
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.

This is derived from OMAP4 boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-08-15 08:51:10 -04:00
Tom Rini
c15438eaea Merge branch 'master' of git://www.denx.de/git/u-boot-video 2013-08-12 18:06:30 -04:00
Donghwa Lee
9c17a32591 exynos: video: change mipi dsi write function parameters correctly
This patch have changed mipi dsi write functions' parameters correctly
so that type cast operations were removed. And mipi dsi payload is
composed with array of panel commands to improve readability.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
2013-08-12 22:39:07 +02:00
Michal Simek
148ba55cc6 zynq: Add new ddrc driver for ECC support
The first 1MB is not initialized by first stage bootloader.
Check if memory is setup to 16bit mode and ECC is enabled.
If it is, clear the first 1MB.
Also u-boot should report only the half size of memory.

Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-08-12 08:59:55 +02:00
Heiko Schocher
b424aae4be arm, am33xx: add clk_get prototype
the clk_get() function is needed for the da8xx-fb video driver,
which is used on the am3xx based siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
2013-08-10 10:38:06 +02:00
Heiko Schocher
0017f9ee06 video, da8xx: move da8xx-fb.h to drivers/video
the da8xx-fb driver works also on am335x boards. So move
the da8xx-fb.h file from arch/arm/include/asm/arch-davinci
to drivers/video, so this driver can used from am335x
based boards. Also add WVGA panel_type.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
2013-08-10 10:37:48 +02:00
Marek Vasut
69f7345c95 dma: apbh: Add special circular mode for LCD
Add special function that executes a specially crafted circular
DMA descriptor. The function doesn't wait for the descriptor to
finish the transfer, since the descritor never finishes. This is
useful when operating a SmartLCD through the LCDIF interface, as
the LCDIF does not give us any means to have continuous refresh
of the SmartLCD. Instead, the RUN bit in the LCDIF CTRL register
must be triggered manually. This can be worked around by starting
an DMA transfer which continuously sets the RUN bit. This function
allows starting exactly such transfer.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-08-09 21:48:34 +02:00
Jagannadha Sutradharudu Teki
1465d055f9 spi: Add zynq spi controller driver
Zynq spi controller driver supports 2 buses and
3 chipselects on each bus.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-08-07 01:09:47 +05:30
Stefano Babic
326ea986ac Merge git://git.denx.de/u-boot-arm
Conflicts:
	board/freescale/mx6qsabrelite/Makefile
	board/freescale/mx6qsabrelite/mx6qsabrelite.c
	include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-07-31 11:30:38 +02:00
Steve Kipisz
cd8845d7a4 am335x_evm: Add support for the NOR module on the memory cape
This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Clean up config changes slightly]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:41 -04:00
Robert Winkler
10f779da54 imx: nitrogen6x: mx6qsabrelite: Add support for DVI monitors
A little background is probably appropriate for this patch.

Since "the beginning" of usage of the SABRE Lite and Nitrogen6x
boards, DVI detection has been somewhat broken.

Some (most) DVI monitors don't produce the "HPD" bit in
the PHY_STAT0 register, but do show proper toggling of the
RX_SENSE0..3 bits.

Creating a new the bit-mask to include all five bits and
modifying the 'hdmidet' command and internal detection
routines allows these monitors to function properly in U-Boot.

A related patch to our kernels allows things to work under
Linux:
        7d8752905c

Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-07-27 10:52:42 +02:00
Pardeep Kumar Singla
5ea7f0e328 mx6: Factor out common HDMI setup code
Instead of duplicating HDMI setup code for every mx6 board, factor out the common code

Signed-off-by: Pardeep Kumar Singla <b45784@freescale.com>
Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
2013-07-27 10:49:36 +02:00
Mugunthan V N
b1e26e3bfb ARM: DRA7xx: Add CPSW support to DRA7xx EVM
Adding support for CPSW Ethernet support found in DRA7xx EVM

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
f986d97208 ARM: DRA7xx: Enable GMAC clock control
Enabling CPSW module by enabling GMAC clock control

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Lokesh Vutla
65e9d56fb9 ARM: DRA7xx: Lock DPLL_GMAC
Locking DPLL_GMAC

[mugunthanvnm@ti.com:Configure only if CPSW is selected]

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Albert ARIBAUD
8b485ba12b Merge branch 'u-boot/master' into u-boot-arm/master 2013-07-25 17:57:46 +02:00
Rob Herring
714d1f5da5 ARM: highbank: set timer prescaler to 256
The 150MHz clock rate gives u-boot time functions problems and there's no
benefit to a fast clock, so lower the rate.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:33 +02:00
Tom Rini
c2120fbfbc Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.

Conflicts:
	board/sandburst/common/ppc440gx_i2c.c
	board/sandburst/common/ppc440gx_i2c.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:24 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Alison Wang
1221b3d74a vf610: Add I2C support for Vybrid VF610 platform
This patch adds I2C support for Vybrid VF610 platform and adds
I2C0 support to VF610TWR board.

Signed-off-by: Alison Wang <b18965@freescale.com>
2013-07-23 08:34:57 +02:00
Heiko Schocher
ea818dbbcd i2c, soft-i2c: switch to new multibus/multiadapter support
- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
2013-07-23 05:54:29 +02:00
Tom Rini
fbbbc86e8e Merge branch 'master' of git://git.denx.de/u-boot-arm
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-12 10:36:48 -04:00
Jim Lin
7e44d9320e ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114
Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11 14:15:15 -07:00
Albert ARIBAUD
630aacb085 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-07-10 20:40:47 +02:00
Rajeshwari Shinde
643be9c07e EXYNOS: Move files from board/samsung to arch/arm
This patch performs the following:

1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock init codes from board/samsung to arch/arm
3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
   the common lowlevel_init from assembly to C-code
4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already
   done in _main.
6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.

TEST: Tested SD-MMC boot on SMDK5250 and Origen.
      Tested USB and SPI boot on SMDK5250
      Compile tested for SMDKV310.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05 17:06:55 +09:00
Rajeshwari Shinde
dc20fdd76a EXYNOS: Add API for power reset and exit wakeup
This patch adds APIs to get power reset status and exit the wakeup condition for
both exynos5 and exynos4

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05 17:06:54 +09:00
Axel Lin
87bd05d78f ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have different gpio count but currently omap_gpio driver uses hard
coded 192 which is wrong.

This patch fixes this issue by:
1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h.
2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5.

Thanks for Lubomir Popov to provide valuable comments to fix this issue.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
Acked-by: Heiko Schocher <hs@denx.de>
2013-07-02 09:21:16 -04:00
Ilya Ledvich
58c86c7d1d am33xx: fix the ddr_cmdtctrl structure
Fix the wrong mapping between the DDR I/O control registers on AM33XX
SoCs and the software representation in the SPL code.
The most recent public TRM defines the following DDR I/O control registers
offsets:
 * ddr_cmd0_ioctrl : offset 0x44E11404
 * ddr_cmd1_ioctrl : offset 0x44E11408
 * ddr_cmd2_ioctrl : offset 0x44E1140C
 * ddr_data0_ioctrl: offset 0x44E11440
 * ddr_data1_ioctrl: offset 0x44E11444

While the struct ddr_cmdtctrl has also some reserved bits in the beginning.
The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points
to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc.
Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because
of this mapping mismatch.

Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-02 09:21:16 -04:00
Albert ARIBAUD
e6c7f86f03 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-06-28 17:51:13 +02:00
Rajeshwari Shinde
493c073ff4 SMDK5250: Remove reduntant code
enum boot_mode is defined twice once in spl.h and also in
spl_boot.c, hence removing the same from spl_boot.c and including
the header file.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-28 09:19:38 +09:00
trem
79713f0ad8 mx27: add i2c clock
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
2013-06-26 17:34:21 +02:00
Pierre Aubert
87d720e0c2 imx: Complete the pin definitions for the i.MX6DL / i.MX6Solo
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
2013-06-26 16:47:30 +02:00
Pierre Aubert
7aa1e8bb1b imx6: fix GPR2 wrong definition
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
2013-06-26 16:28:54 +02:00
Simon Glass
ca35a0cdf2 exynos: Avoid function instrumentation for microsecond timer
For tracing to work it has to be able to access the microsecond timer
without causing a recursive call to the function entry/exit handlers.
Add attributes to the relevant functions to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-26 10:18:56 -04:00
Tom Rini
348e47f766 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-06-22 07:38:12 -04:00
Albert ARIBAUD
c2543a21df Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-06-19 23:58:01 +02:00
Albert ARIBAUD
69f14dc2fd Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
	spl/Makefile
2013-06-19 12:53:59 +02:00