Commit graph

1567 commits

Author SHA1 Message Date
Tom Rini
285226785e Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
In some cases this is absolutely required, so select this for some secure
features.  This also requires migration of RSA_FREESCALE_EXP

Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09 11:37:24 -05:00
Tom Rini
c83a824e62 Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/ls1046aqds_defconfig
	configs/ls1046aqds_nand_defconfig
	configs/ls1046aqds_qspi_defconfig
	configs/ls1046aqds_sdcard_ifc_defconfig
	configs/ls1046aqds_sdcard_qspi_defconfig
	configs/ls1046ardb_emmc_defconfig
	configs/ls1046ardb_qspi_defconfig
	configs/ls1046ardb_sdcard_defconfig
2017-02-03 20:33:42 -05:00
Prabhakar Kushwaha
add63f94a9 arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.

Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:45 -08:00
Prabhakar Kushwaha
068789773d arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Enable ELBC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:25 -08:00
Prabhakar Kushwaha
1c40707e3f arch: powerpc: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.

Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:11 -08:00
Prabhakar Kushwaha
d98b98d62e arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03 14:31:02 -08:00
Mark Marshall
de8c9317a8 powerpc: mpc5200: Correct return value of memcpy function
The memcpy() function returns a pointer to trg.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-01 08:14:39 -08:00
Mark Marshall
2ec70961e7 powerpc: mpc85xx: Use symbolic names for cache control bits
We should use the symbolic names for the cache control bits.

Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 17:51:34 -08:00
mario.six@gdsys.cc
dbcb2c0e2b powerpc: mpc83xx: Enable pre-relocation malloc
To enable DM on MPC83xx, we need pre-relocation malloc, which is
implemented in this patch.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
[York S: Fixed compiling warning for unused variable 'i']
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 17:50:35 -08:00
mario.six@gdsys.cc
e80311a5f0 powerpc: mpc83xx: Minimize r1 modification
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31 09:35:06 -08:00
Tom Rini
79a34b71c9 Merge git://git.denx.de/u-boot-mpc85xx 2017-01-25 17:38:45 -05:00
Simon Glass
a009f36cfe Drop prt_mpc5xxx_clks() in favour of print_cpuinfo()
Rather than having an arch-specific function, use the existing generic
one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:44 -05:00
Simon Glass
8f3086aaac powerpc: Drop CONFIG_SYS_ALLOC_DPRAM
This is not defined anywhere in U-Boot. Drop this dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:42 -05:00
Simon Glass
cbcbf71bf2 powerpc: Drop probecpu() in favour of arch_cpu_init()
To avoid an unnecessary arch-specific call in board_init_f(), rename this
function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:41 -05:00
Simon Glass
a5d67547dd Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_EARLY_INIT_F

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 17:38:32 -05:00
Tony O'Brien
76866600f5 powerpc: Enable flush and invalidate dcache by range for MPC85xx
Commit ac337168a unified functions to flush and invalidate dcache by
range. These two functions were no-ops for SoCs other than 4xx and
MPC86xx. Adding these functions seemed to be correct but introduced
issues in some drivers when the dcache was flushed. While the root
cause was under investigation, these functions were disabled in
Commit cb1629f91a for affected SoCs, including the MPC85xx, to make
the various drivers work.

On the T208x USB stopped working after v2016.07 was pulled.  After
re-enabling the dcache functions for the MPC85xx it started working
again.  The USB and DPPA Ethernet drivers have been seen as
operational after this change but other drivers cannot be tested.

Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
Cc: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun>
2017-01-24 13:28:31 -08:00
Tony O'Brien
09bfd962bd mpc85xx: pcie: Implement workaround for Erratum A007815
The read-only-write-enable bit is set by default and must be cleared
to prevent overwriting read-only registers.  This should be done
immediately after resetting the PCI Express controller.

Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
[York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 13:28:31 -08:00
Darwin Dingel
06ad970b53 powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907
Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.

Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Cc: York Sun <york.sun@nxp.com>
[York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 13:28:02 -08:00
Tom Rini
e5ec48152a Kconfig: Migrate BOARD_LATE_INIT to a select
This option should not really be user selectable.  Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
2017-01-24 10:35:54 -05:00
Tom Rini
88077715d8 NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST
Introduce board/freescale/common/Kconfig so that we have a single place
for CONFIG options that are shared between ARM and PowerPC NXP platforms.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-24 10:33:59 -05:00
Uri Mashiach
2d8d190c83 status_led: Kconfig migration
Move all of the status LED feature to drivers/led/Kconfig.
The LED status definitions were moved from the board configuration
files to the defconfig files.

TBD: Move all of the definitions in the include/status_led.h to the
relevant board's defconfig files.

Tested boards: CL-SOM-AM57x, CM-T335

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2017-01-21 15:12:33 -05:00
Jagan Teki
3788b451e3 config: Move CONFIG_BOARD_LATE_INIT to defconfigs
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-21 15:12:33 -05:00
York Sun
4851278e30 powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig
Use Kconfig option SYS_PPC64 instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:56 -05:00
York Sun
7371774ab9 powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to Kconfig
Use Kconfig option to select chassis version.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:55 -05:00
York Sun
9ec10107e1 powerpc: E6500: Move macro CONFIG_E6500 to Kconfig
Use Kconfig option E6500 and clean up existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:54 -05:00
York Sun
f43417ec97 powerpc: mpc85xx: Remove unused ifdef in config header
After most config options are moved to Kconfig, the unused ifdef
or elif can be removed.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:53 -05:00
York Sun
22120f11e2 ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to Kconfig
Use Kconfig to select DDR version instead of using config header.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:53 -05:00
York Sun
51370d5618 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:52 -05:00
York Sun
66e399b68d ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig
Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
config header and board header files.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:49 -05:00
York Sun
63659ff317 powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
Use Kconfig to select errata workaround.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:46 -05:00
York Sun
c01e4a1a6f mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig
Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04 19:40:44 -05:00
York Sun
d26e34c4c4 fsl_ddr: Move DDR config options to driver Kconfig
Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04 19:40:41 -05:00
York Sun
a105503851 powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDS
Remove this macro. It was added by e622d9ed but actually wasn't used.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:29 -05:00
York Sun
86e0a31321 powerpc: T2080RDB: Remove macro CONFIG_T2080RDB
Use TARGET_T2080RDB from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:27 -05:00
York Sun
80d261881f powerpc: T2080QDS: Remove macro T2080QDS
Use TARGET_T2080QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:26 -05:00
York Sun
f4f6694060 powerpc: T1040QDS: Remove macro CONFIG_T1040QDS
Use TARGET_T1040QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:24 -05:00
York Sun
08a37fd13b powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014
Remove these SoCs from Kconfig because they don't have individual
configuration. Clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:20 -05:00
York Sun
90b80386ff crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to Kconfig
Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:19 -05:00
York Sun
2c2e2c9e14 crypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:17 -05:00
York Sun
53c953841b powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to Kconfig
Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate 8572]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04 19:40:14 -05:00
York Sun
26e79b6547 powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to Kconfig
Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:13 -05:00
York Sun
f8dee36034 powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to Kconfig
Use Kconfig option for E500 and E500MC macros.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04 19:40:12 -05:00
Chris Packham
01b25d42c1 powerpc: Retain compatible property for L2 cache
When setting the compatible property for the L2 cache ensure that we
follow the documented binding by setting both
"<chip>-l2-cache-controller" and "cache" as values.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-20 09:13:19 -08:00
Shengzhou Liu
473f1fc280 fsl/ddr: Enable erratum-a009942 workaround for B/T-series
Enable ERRATUM_A009942 workaround for B-series and T-series platforms.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-15 11:56:17 -08:00
Shengzhou Liu
02fb276157 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
- add additional function erratum_a009942_check_cpo to check if the
  board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
  fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05 08:31:45 -08:00
Tom Rini
194eded14c Merge git://git.denx.de/u-boot-mpc85xx 2016-12-04 13:55:15 -05:00
York Sun
54db3c20bd powerpc: mpc86xx: Convert CONFIG_SYS_FSL_NUM_LAWS to Kconfig option
Use Kconfig instead of defining this macro in header file.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-04 08:59:11 -08:00
Masahiro Yamada
63c0941726 libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY
Commit e2f88dfd2d ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.

This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt().  It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for x86:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-12-02 20:54:34 -07:00
York Sun
8303acbce8 powerpc: mpc85xx: Convert CONFIG_SYS_FSL_NUM_LAWS to Kconfig option
Move the macro to Kconfig SYS_FSL_NUM_LAWS.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02 12:38:42 -08:00
York Sun
f4325b47a8 powerpc: mpc86xx: Move CONFIG_FSL_LAW to Kconfig
Clean up existing definitions and drop from white list.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-12-02 12:38:42 -08:00