powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014

Remove these SoCs from Kconfig because they don't have individual
configuration. Clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-12-28 08:43:32 -08:00 committed by Tom Rini
parent 90b80386ff
commit 08a37fd13b
5 changed files with 5 additions and 25 deletions

View file

@ -656,8 +656,6 @@ config MAX_CPUS
ARCH_P1025 || \
ARCH_P2020 || \
ARCH_P5020 || \
ARCH_T1020 || \
ARCH_T1022 || \
ARCH_T1023 || \
ARCH_T1024
default 1
@ -699,10 +697,6 @@ config SYS_CCSRBAR_DEFAULT
ARCH_P4080 || \
ARCH_P5020 || \
ARCH_P5040 || \
ARCH_T1013 || \
ARCH_T1014 || \
ARCH_T1020 || \
ARCH_T1022 || \
ARCH_T1023 || \
ARCH_T1024 || \
ARCH_T1040 || \
@ -732,11 +726,7 @@ config SYS_FSL_NUM_LAWS
ARCH_T2081 || \
ARCH_T4160 || \
ARCH_T4240
default 16 if ARCH_T1013 || \
ARCH_T1014 || \
ARCH_T1020 || \
ARCH_T1022 || \
ARCH_T1023 || \
default 16 if ARCH_T1023 || \
ARCH_T1024 || \
ARCH_T1040 || \
ARCH_T1042

View file

@ -50,8 +50,6 @@ obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
obj-$(CONFIG_ARCH_T1040) += t1040_ids.o
obj-$(CONFIG_ARCH_T1042) += t1040_ids.o
obj-$(CONFIG_PPC_T1020) += t1040_ids.o
obj-$(CONFIG_PPC_T1022) += t1040_ids.o
obj-$(CONFIG_ARCH_T1023) += t1024_ids.o
obj-$(CONFIG_ARCH_T1024) += t1024_ids.o
obj-$(CONFIG_ARCH_T2080) += t2080_ids.o
@ -92,8 +90,6 @@ obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
obj-$(CONFIG_ARCH_T1040) += t1040_serdes.o
obj-$(CONFIG_ARCH_T1042) += t1040_serdes.o
obj-$(CONFIG_PPC_T1020) += t1040_serdes.o
obj-$(CONFIG_PPC_T1022) += t1040_serdes.o
obj-$(CONFIG_ARCH_T1023) += t1024_serdes.o
obj-$(CONFIG_ARCH_T1024) += t1024_serdes.o
obj-$(CONFIG_ARCH_T2080) += t2080_serdes.o

View file

@ -538,8 +538,7 @@
#define CONFIG_NUM_DDR_CONTROLLERS 1
#endif
#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
#define CONFIG_E5500
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
@ -582,8 +581,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#define CONFIG_SYS_FSL_ERRATUM_A009663
#define CONFIG_SYS_FSL_ERRATUM_A009942
#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) ||\
defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
#define CONFIG_E5500
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */

View file

@ -1775,8 +1775,7 @@ typedef struct ccsr_gur {
#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00ff0000
#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT 16
#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000
#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff000000
#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 24
#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00fe0000
@ -1796,8 +1795,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#define PXCKEN_MASK 0x80000000
#define PXCK_MASK 0x00FF0000
#define PXCK_BITS_START 16
#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) || \
defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff800000
#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 23
#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000

View file

@ -26,8 +26,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020.o
obj-$(CONFIG_ARCH_P5040) += p5040.o
obj-$(CONFIG_ARCH_T1040) += t1040.o
obj-$(CONFIG_ARCH_T1042) += t1040.o
obj-$(CONFIG_PPC_T1020) += t1040.o
obj-$(CONFIG_PPC_T1022) += t1040.o
obj-$(CONFIG_ARCH_T1023) += t1024.o
obj-$(CONFIG_ARCH_T1024) += t1024.o
obj-$(CONFIG_ARCH_T2080) += t2080.o