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powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014
Remove these SoCs from Kconfig because they don't have individual configuration. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
90b80386ff
commit
08a37fd13b
5 changed files with 5 additions and 25 deletions
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@ -656,8 +656,6 @@ config MAX_CPUS
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ARCH_P1025 || \
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ARCH_P2020 || \
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ARCH_P5020 || \
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ARCH_T1020 || \
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ARCH_T1022 || \
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ARCH_T1023 || \
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ARCH_T1024
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default 1
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@ -699,10 +697,6 @@ config SYS_CCSRBAR_DEFAULT
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ARCH_P4080 || \
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ARCH_P5020 || \
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ARCH_P5040 || \
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ARCH_T1013 || \
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ARCH_T1014 || \
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ARCH_T1020 || \
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ARCH_T1022 || \
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ARCH_T1023 || \
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ARCH_T1024 || \
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ARCH_T1040 || \
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@ -732,11 +726,7 @@ config SYS_FSL_NUM_LAWS
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ARCH_T2081 || \
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ARCH_T4160 || \
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ARCH_T4240
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default 16 if ARCH_T1013 || \
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ARCH_T1014 || \
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ARCH_T1020 || \
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ARCH_T1022 || \
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ARCH_T1023 || \
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default 16 if ARCH_T1023 || \
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ARCH_T1024 || \
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ARCH_T1040 || \
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ARCH_T1042
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@ -50,8 +50,6 @@ obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
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obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
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obj-$(CONFIG_ARCH_T1040) += t1040_ids.o
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obj-$(CONFIG_ARCH_T1042) += t1040_ids.o
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obj-$(CONFIG_PPC_T1020) += t1040_ids.o
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obj-$(CONFIG_PPC_T1022) += t1040_ids.o
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obj-$(CONFIG_ARCH_T1023) += t1024_ids.o
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obj-$(CONFIG_ARCH_T1024) += t1024_ids.o
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obj-$(CONFIG_ARCH_T2080) += t2080_ids.o
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@ -92,8 +90,6 @@ obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
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obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
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obj-$(CONFIG_ARCH_T1040) += t1040_serdes.o
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obj-$(CONFIG_ARCH_T1042) += t1040_serdes.o
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obj-$(CONFIG_PPC_T1020) += t1040_serdes.o
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obj-$(CONFIG_PPC_T1022) += t1040_serdes.o
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obj-$(CONFIG_ARCH_T1023) += t1024_serdes.o
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obj-$(CONFIG_ARCH_T1024) += t1024_serdes.o
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obj-$(CONFIG_ARCH_T2080) += t2080_serdes.o
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@ -538,8 +538,7 @@
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#define CONFIG_NUM_DDR_CONTROLLERS 1
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#endif
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#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
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defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
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#define CONFIG_E5500
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#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
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#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
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@ -582,8 +581,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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#define CONFIG_SYS_FSL_ERRATUM_A009663
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#define CONFIG_SYS_FSL_ERRATUM_A009942
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) ||\
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defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#define CONFIG_E5500
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#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
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#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
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@ -1775,8 +1775,7 @@ typedef struct ccsr_gur {
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#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00ff0000
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#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT 16
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#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000
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#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
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defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff000000
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 24
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#define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00fe0000
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@ -1796,8 +1795,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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#define PXCKEN_MASK 0x80000000
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#define PXCK_MASK 0x00FF0000
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#define PXCK_BITS_START 16
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) || \
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defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff800000
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 23
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#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000
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@ -26,8 +26,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020.o
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obj-$(CONFIG_ARCH_P5040) += p5040.o
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obj-$(CONFIG_ARCH_T1040) += t1040.o
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obj-$(CONFIG_ARCH_T1042) += t1040.o
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obj-$(CONFIG_PPC_T1020) += t1040.o
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obj-$(CONFIG_PPC_T1022) += t1040.o
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obj-$(CONFIG_ARCH_T1023) += t1024.o
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obj-$(CONFIG_ARCH_T1024) += t1024.o
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obj-$(CONFIG_ARCH_T2080) += t2080.o
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