Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-29 16:10:58 +00:00
Code Issues Projects Releases Packages Wiki Activity

powerpc: mpc83xx: Minimize r1 modification

Browse source 
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
mario.six@gdsys.cc 2017-01-17 08:33:47 +01:00 committed by York Sun
parent cf4128e53c
commit e80311a5f0
1 changed files with 8 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

13
arch/powerpc/cpu/mpc83xx/start.S
View file

@ -258,14 +258,17 @@ in_flash:
#endif
/* set up the stack pointer in our newly created
* cache-ram (r1) */
lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
* cache-ram; use r3 to keep the new SP for now to
* avoid overiding the SP it uselessly */
lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r1) /* clear final stack frame so that */
stwu r0, -4(r1) /* stack backtraces terminate cleanly */
stwu r0, -4(r3) /* clear final stack frame so that */
stwu r0, -4(r3) /* stack backtraces terminate cleanly */
/* Finally, actually set SP */
mr r1, r3
/* let the C-code set up the rest */
/* */