Commit graph

369 commits

Author SHA1 Message Date
Tom Rini
eeb72e6761 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	arch/arm/cpu/armv7/config.mk
	board/ti/am43xx/mux.c
	include/configs/am43xx_evm.h

Signed-off-by: Tom Rini <trini@ti.com>
2014-02-26 16:49:58 -05:00
Darwin Rambo
4bded3a367 i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
2014-02-22 19:30:39 +01:00
Tom Rini
6853e6aa77 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-20 12:18:59 -05:00
Alexey Brodkin
3d93f6959b designware_i2c: remove inclusion of <asm/arch/hardware.h>
As soon as all boards have their CONFIG_SYS_I2C_BASE defined in
configuration files instead of "asm/arch/hardware.h" it's safe to remove
the inclusion in question and make driver platform-independent.

Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Armando Visconti <armando.visconti@st.com>

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2014-02-20 06:49:09 +01:00
Hannes Petermaier
d5243359e1 OMAP24xx I2C: Add support for set-speed
Adds support for set-speed on the OMAP24xx I2C Adapter.

Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
Otherwise on a subsequent call the transfer of last byte from the
predecessor is aborted and therefore lost. For exmaple when
i2c_write(...) is followed by a i2c_setspeed(...) (which has to
deactivate and activate master for changing psc,...).

Minor cosmetical changes.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: Heiko Schocher <hs@denx.de>
2014-02-20 06:48:23 +01:00
Marek Vasut
d22643e7e8 i2c: i2c-mxs: Wait for I2C to empty queue
Make sure the I2C write queue is empty before leaving the mxs_i2c_write().
If we start and I2C write and only wait for ACK, the MXS I2C IP block may
enter next operation while still processing the write aftermath internally.
This will in turn disrupt one or more subsequent transfer(s).

A testcase for this issue is as such. This testcase is also interesting because
the first I2C_WRITE which becomes disruptive happens in the 'i2c read' command.
The 'i2c read' command first uses I2C_WRITE to send I2C address of the chip and
then uses I2C_READ to read data from the chip. After this command completes, the
'i2c probe' will use sequence of I2C_WRITE commands to probe the I2C bus. The
problem is that the first I2C_WRITE disrupted the I2C IP block operation and
this sideeffect propagates all the way to this next I2C_WRITE used by the 'i2c
probe' call. The result is the 'i2c probe' receives an ACK on I2C address 0x00,
even if this ACK was owned by the previous I2C_WRITE operation. Note that the
'i2c read' command must read from a valid I2C chip address.

Wrong:
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 00 50 51

With this patch
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 50 51

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
2014-02-20 06:46:57 +01:00
Chin Liang See
070cbaf821 designware_i2c: Enhance DesignWare I2C driver address support
Enhance the DesignWare I2C driver to support address length more
than 1 byte. This enhancement is required as some I2C slave
device such as EEPROM chip might have 16 bit address byte.

Signed-off-by: Chin Liang See <clsee@altera.com>
Acked-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
2014-02-20 06:46:56 +01:00
Scott Jiang
16c550274c blackfin: make i2c driver blackfin independant
The ADI twi peripheral is not binding to Blackfin processor only.
Access i2c registers by standard io functions.
Fix coding style.

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-20 06:46:56 +01:00
Sonic Zhang
86bdd70a09 blackfin: rename bfin-twi_i2c driver to adi_i2c
The ADI twi peripheral is not binding to Blackfin processor only.
Change to a generic name.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-20 06:46:56 +01:00
Sonic Zhang
d6a320d5bb blackfin: add spi and i2c specific get clock functions
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-20 06:46:56 +01:00
Sonic Zhang
bb0fad0ea0 blackfin: the sclk MHz in i2c driver should be divided by 1000 other than 1024
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-20 06:46:55 +01:00
Michael Burr
18948632a9 i2c: zynq: Add support for the second i2c controller
Initialize the second i2c controller.

Signed-off-by: Michael Burr <michael.burr@logicpd.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-20 06:46:55 +01:00
Michael Burr
9e90107155 i2c: zynq: Support for 0-length register address
Fixed bug with alen == 0 in 'i2c_write', 'i2c_read'
Further minor corrections:
- Write 'address' register before 'data' register.
- Write 'transfer_size' register before 'address' register.

Signed-off-by: Michael Burr <michael.burr@logicpd.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-20 06:46:55 +01:00
Marek Vasut
c8d4b2f826 ARM: IXP: Remove the IXP architecture support
The architecture is unmaintained and dead, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
2014-02-06 02:51:52 +01:00
Kuo-Jung Su
dccacbe019 i2c: fti2c010: fix compiler warning on paddr[]
This fixes the following compiler warnings:

fti2c010.c: In function 'fti2c010_read':
fti2c010.c:204:8: warning: 'paddr' may be used uninitialized in this function [-Wuninitialized]
fti2c010.c: In function 'fti2c010_write':
fti2c010.c:266:8: warning: 'paddr' may be used uninitialized in this function [-Wuninitialized]

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
2014-01-13 08:18:38 +01:00
Alexey Brodkin
32d041e218 drivers/designware_i2c - add suppor of CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
Since we agreed on legacy implementation of "eeprom_{read|write}"
(http://patchwork.ozlabs.org/patch/295825/) I had to fix/make it work
again DesignWare I2C driver for cases when 1 EEPROM IC fake I2C with
anumber of "built-in" ICs with different chip addresses.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin KUMAR <vipin.kumar@st.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
2014-01-13 08:18:13 +01:00
Darwin Rambo
7cc1b02f8f i2c: Fix i2c speed command
This corrects i2c core to interpret the value returned by
i2c_set_bus_speed as a success indicator rather than the
actual speed that was set. When i2c_set_bus_speed returns
a failure code, the speed is unknown so the adapter speed
is set to zero.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Steve Rae <srae@broadcom.com>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-01-13 08:17:51 +01:00
Nobuhiro Iwamatsu
da1ed0d20e rcar_i2c: Clear status before start master receive
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2014-01-13 08:16:48 +01:00
Hisashi Nakamura
ad5e14ecdd rcar_i2c: Fix receiving wait condition
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2014-01-13 08:16:22 +01:00
Alban Bedel
ac2ff538cd i2c: tegra: Add the fifth bus on SoC with more than 4 buses
Create the i2c adapter object for the fifth bus on SoC with more than
4 buses. This allow using all the bus available on T30.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-12-18 10:19:49 -07:00
Tom Rini
4b210ad342 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	board/samsung/trats2/trats2.c
	include/configs/exynos5250-dt.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-12-10 17:15:18 -05:00
Albert ARIBAUD
f15ea6e1d6 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	arch/arm/cpu/armv7/rmobile/Makefile
	doc/README.scrapyard

Needed manual fix:
	arch/arm/cpu/armv7/omap-common/Makefile
	board/compulab/cm_t335/u-boot.lds
2013-12-10 22:23:59 +01:00
Naveen Krishna Ch
e717fc6d1a i2c: samsung: register i2c busses for Exynso5420 and Exynos5250
This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
on Exynos5420 and Exynos5250 and also adds support for init function
for hsi2c channels

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
2013-12-06 07:46:23 +01:00
Nikita Kiryanov
92c23c9226 arm: omap: i2c: don't zero cnt in i2c_write
Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to the following advisory which
apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as
OMAP4430 TRM:

Advisory:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow 0-byte data
transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause
undefined behavior.
Workaround(s):
No workaround. Do not use 0-byte data requests.

The writes in question are unnecessary from a functional point of view.
Most of them are done after I/O has finished, and the only one that preceds
I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before
actual data transmission takes place.

Therefore, remove all writes that zero the cnt register.

Cc: Heiko Schocher <hs@denx.de>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lubomir Popov <lpopov@mm-sol.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
2013-12-05 12:25:02 +01:00
Kuo-Jung Su
c727618d2c i2c: fti2c010: serial out r/w address in MSB order
For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B),
the r/w address should be serial out in MSB order.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
2013-12-05 12:25:01 +01:00
Kuo-Jung Su
49f4c762e4 i2c: fti2c010: migrate to new i2c model
Replace the legacy i2c model with the new one.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
2013-12-05 12:25:01 +01:00
Kuo-Jung Su
e6d3ab8909 i2c: fti2c010: cosmetic: coding style cleanup
Coding style cleanup

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
2013-12-05 12:25:00 +01:00
Piotr Wilczek
a6756bbdac driver:i2c:s3c24x0: fix clock init for hsi2c
Fix clock value initialisation for Exynos other than Exynos5 for hsi2c.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
2013-12-05 07:39:38 +01:00
Piotr Wilczek
2d8f1e2769 driver:i2c:s3c24x0: adapt driver to new i2c
This patch adapts the s3c24x0 driver to the new i2c framework.
Config file is modified for all the boards that use the driver.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Heiko Schocher <hs@denx.de>
CC: Inderpal Singh <inderpal.singh@linaro.org>
CC: David Müller <d.mueller@elsoft.ch>
CC: Chander Kashyap <k.chander@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
2013-12-05 07:39:38 +01:00
Andreas Bießmann
cb96a0a4c9 i2c: switch from AT91 legacy to ATMEL legacy
Since the required API is gpio which is enclosed with CONFIG_ATMEL_LEGACY use
that switch here.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Heiko Schocher <hs@denx.de>
2013-11-13 22:13:22 +01:00
Alexey Brodkin
f9de54e9b0 designware_i2c: remove 10msec delay in i2c_xfer_finish
This delay applies to any data transfer on I2C bus.

For example 1kB data read with per-byte access (which happens if
environment is stored in I2C EEPROM) takes more than 10 seconds.

Moreover data bus driver has to care about bus state and data transfer,
but not about internal states of attached devices.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin KUMAR <vipin.kumar@st.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
2013-11-13 06:22:41 +01:00
Alexey Brodkin
8b7c872539 designware_i2c: disable i2c controller during target address setup
As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4)
register succeed only when IC_ENABLE[0] is set to 0.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin KUMAR <vipin.kumar@st.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
2013-11-13 06:22:06 +01:00
Heiko Schocher
85bb251b39 i2c, omap1510: remove i2c driver
remove omap1510 i2c driver, as there is no board which uses it

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Jian Zhang <jzhang@ti.com>
2013-11-13 06:18:31 +01:00
Heiko Schocher
0bdffe71fd i2c, zynq: convert zynq i2c driver to new multibus/multiadapter framework
- add zync i2c driver to new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2013-11-13 06:18:27 +01:00
Heiko Schocher
6789e84eca i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework
- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver

Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S  <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-11-13 06:18:17 +01:00
Marek Vasut
124913556c i2c: mxs_i2c: Squash endless loop
The endless waiting for a bit to be set can cause a hang, add a timeout
so we prevent such situation. A testcase for such a hang is below. The
testcase assumes a device to be present at address 0x50 and a device to
NOT be present at address 0x42 . Also note that the "sleep 1" induced
delays are imperative for this bug to manifest .

i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \
i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \
i2c read 0x42 0x0.2 0x10 0x42000000

The expected result of the above command is:

Error reading the chip.
Error reading the chip.

While without this patch, we observe a hang in the last read from 0x42
precisely when waiting for this bit to be set.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-11-13 06:08:31 +01:00
Nobuhiro Iwamatsu
2035d77d79 i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework
This updates to new I2C framwwork on sh_i2c.
And this also updates boards(kzm9g and ecovec) that using sh_i2c.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2013-11-13 06:08:26 +01:00
Masahiro Yamada
710f1d3d5f drivers: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-31 13:26:01 -04:00
Masahiro Yamada
9a2a73d29f i2c: eliminate warnings in i2c_reloc_fixup function
The prototype of handlers had changed.
This commit uses cast with (void *) rather than
the handler-specific prototype.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-17 07:24:41 +02:00
Naveen Krishna Ch
296a461dca i2c: s3c24xx: add hsi2c controller support
Add support for hsi2c controller available on exynos5420.

Note: driver currently supports only fast speed mode 100kbps

Change-Id: I02555b1dc8f4ac21c50aa5158179768563c92f43
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: R. Chandrasekar <rc.sekar@samsung.com>
2013-10-17 07:20:26 +02:00
Simon Glass
940dd16242 exynos: i2c: Change FDT bus setup code to enumerate ports correctly
At present the i2c ports are enumerated in a strange way - the
fdtdec_find_aliases_for_id() function is used, but then the ID returned
is ignored and the ports are renumbered. The effect is the same provided
that the device tree has the ports in the same order, or uses aliases,
and has no gaps, but it is not correct.

Adjust the code to use the function as intended. This will allows device
tree aliases to change the device order if required.

As a result, the i2c_busses variable is dropped. We can't be sure that
there are no 'holes' in the list of buses, so must check the whole
array.

Note: it seems that non-FDT operation is now broken in this drive and
will need to be reinstated for upstream.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59369
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
2013-10-17 07:20:26 +02:00
Naveen Krishna Ch
e4e2402071 exynos: i2c: Fix i2c driver to handle NACKs properly
The Exynos5 i2c driver does not handle NACKs properly. This change:

- fixes the NACK processing problem (do not continue transaction if
  address cycle was NACKed)

- eliminates a fair amount of duplicate code

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Simon Glass <sjg@google.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
2013-10-17 07:20:26 +02:00
Jens Scharsig (BuS Elektronik)
83d271b5ff Fix: nommu I2C adapter relocation error
NoMMU systems have a access violation problem with i2c_reloc_fixup.
Blame for it is a double relocation of the adapter itself. The
i2c_adap_p is already relocated, if i2c_reloc_fixup is called.
This patch removes the relocation of i2c_adap_p from i2c_reloc_fixup
to fix this.

Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2013-10-17 07:20:25 +02:00
Nobuhiro Iwamatsu
b55b8eef35 i2c: sh_i2c: Avoid using I2C prior to relocation
If user uses the I2C in before the relocation, board of sh and rmobile
will not start. This will solve this problem.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2013-10-17 07:20:25 +02:00
Heiko Schocher
13c2433ccb i2c, core: optimze i2c_set_bus_num()
check first, if we are on the bus, we want to enable. If so,
return immediately, do not calc max adapter number, nor check
other things.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2013-10-17 07:20:25 +02:00
Nobuhiro Iwamatsu
1086bfa9f4 i2c: Add support for Renesas rcar
This supports i2c controller for Renesas rcar.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2013-10-17 07:20:25 +02:00
Michael Burr
e66587495d i2c: Zynq: Support for TI PCA9548 bus multiplexer
(Interface is not quite the same as Phillips PCA9547.)

Signed-off-by: Michael Burr <michael.burr@logicpd.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
2013-10-17 07:20:25 +02:00
trem
fac9640895 i2c: mxc: move to new subsystem
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
2013-10-17 07:20:24 +02:00
Masahiro Yamada
a341f649d7 drivers: s3c44b0_i2c: delete an unused driver
Since commit 5dc5f36 removed B2 board support,
there are no boards enabling s3c44b0_i2c.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
Acked-by: Heiko Schocher <hs@denx.de>
2013-09-19 09:51:52 +02:00
Chunhe Lan
9c3f77eb3b fsl_i2c: add workaround for the erratum I2C A004447
This workaround is for the erratum I2C A004447. Device reference
manual provides a scheme that allows the I2C master controller
to generate nine SCL pulses, which enable an I2C slave device
that held SDA low to release SDA. However, due to this erratum,
this scheme no longer works. In addition, when I2C is used as
a source of the PBL, the state machine is not able to recover.

At the same time, delete the reduplicative definition of SVR_VER
and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16
bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro
instead of hard-code value 0x10, 0x11 and 0x20.

The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one
version of platform has this I2C errata. So enable this errata
by IS_SVR_REV(svr, maj, min) function.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
2013-08-20 11:15:31 +02:00
Chunhe Lan
b8ce3343b6 fsl_i2c: generate nine pulses on SCL if the I2C bus is hung
When the code detected that the bus is hung (e.g. SDA stuck low),
send 9 pulses on SCL to try to fixup the bus.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
2013-08-20 11:15:31 +02:00
Simon Glass
cdce889959 tegra: Avoid using I2C prior to relocation
Tegra recently moved to the new I2C framework, which sets up I2C prior to
relocation, and prior to calling i2c_init_board(). This causes a crash on
Tegra boards.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-08-13 17:11:25 -04:00
Marek Vasut
90f002a90f i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED
In case only the CONFIG_SYS_I2C_SPEED is set in configuration file,
the CONFIG_SYS_I2C_SOFT_SPEED is defined as CONFIG_SYS_I2C_SPEED.
The CONFIG_SYS_I2C_SOFT_SPEED is then used throughout the driver.

Unfortunatelly, due to a typo in the driver, instead of defining
CONFIG_SYS_I2C_SOFT_SPEED, an CONFIG_SYS_SOFT_I2C_SPEED was defined
and therefore the driver failed to compile. The same applies for
CONFIG_SYS_I2C_SOFT_SLAVE , where the swap happens as well.

This patch fixes the issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2013-08-03 06:01:18 +02:00
Tom Rini
8dde4ca90e drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiers
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25 08:51:42 -04:00
Tom Rini
c2120fbfbc Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.

Conflicts:
	board/sandburst/common/ppc440gx_i2c.c
	board/sandburst/common/ppc440gx_i2c.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:24 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Kuo-Jung Su
3cff842bca i2c: add Faraday FTI2C010 I2C controller support
Faraday FTI2C010 is a multi-function I2C controller
which supports both master and slave mode.
This patch simplily implements the master mode only.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Heiko Schocher <hs@denx.de>
2013-07-23 08:34:58 +02:00
Alison Wang
30ea41a489 I2C: mxc_i2c: Add support for Vybrid VF610 platform
This patch adds support for Vybrid VF610 platform.

There are some differences between i.MX6 and Vybrid for I2C controller.
(1) The registers' offset are different.
(2) The I2C clock divider values are different.
(3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6.
(4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid.
For i.MX6, this bit is cleared by writing "0".
(5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid.
For i.MX6, this bit is cleared by writing "0".

Signed-off-by: Alison Wang <b18965@freescale.com>
2013-07-23 08:34:57 +02:00
Dirk Eibach
880540decf i2c, ppc4xx_i2c: switch to new multibus/multiadapter support
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2013-07-23 08:34:56 +02:00
Simon Glass
1f2ba722ac tegra: i2c: Enable new CONFIG_SYS_I2C framework
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
2013-07-23 08:34:55 +02:00
Simon Glass
d84eb856c4 tegra: i2c: Add function to know about current bus
Rather than using a variable in various places, add a single function,
tegra_i2c_get_bus(), which returns a pointer to information about a
bus.

This will make it easier to move to the new i2c framework.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-07-23 08:34:54 +02:00
Heiko Schocher
00f792e0df i2c, fsl_i2c: switch to new multibus/multiadapter support
- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
2013-07-23 08:34:53 +02:00
Heiko Schocher
ea818dbbcd i2c, soft-i2c: switch to new multibus/multiadapter support
- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
2013-07-23 05:54:29 +02:00
Heiko Schocher
385c9ef5a7 i2c: add i2c_core and prepare for new multibus support
This Patch introduce the new i2c_core file, which holds
the I2C core functions, for the rework of the multibus/
multiadapter support.
Also adds changes in i2c.h for the new I2C multibus/multiadapter
support. This new support can be activated with the
CONFIG_SYS_I2C define.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
2013-07-23 05:54:28 +02:00
Reinhard Pfau
b778c1b5de i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0
if alen is 0: no longer start a write cycle before reading data.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-07-16 17:44:30 -05:00
Amar
1ae76d438b EXYNOS: Resolve the i2c compilation error
This patch resolves the below mentioned compilation error of i2c driver
for non-FDT case

Compilation error:
s3c24x0_i2c.c: In function 'board_i2c_init':
s3c24x0_i2c.c:544:18: error: 'CONFIG_MAX_I2C_NUM' undeclared (first use
in this function) s3c24x0_i2c.c:544:18: note: each undeclared
identifier is reported only once for each function it appears in
s3c24x0_i2c.c:545:3: warning: implicit declaration of function

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-10 14:20:26 +09:00
Amar
2c07bb9b53 EXYNOS5: I2C: Add FDT and non-FDT support for I2C
This patch updates the function board_i2c_init() to add support for both
FDT and non-FDT for I2C, and initialise the I2C channels.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-24 11:25:19 +09:00
Lubomir Popov
960187ffa1 ARM: OMAP: I2C: New read, write and probe functions
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4
(4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older
OMAPs and derivatives as well. The only anticipated exception would
be the OMAP2420, which shall require driver modification.
- Rewritten i2c_read to operate correctly with all types of chips
  (old function could not read consistent data from some I2C slaves).
- Optimised i2c_write.
- New i2c_probe, performs write access vs read. The old probe could
  hang the system under certain conditions (e.g. unconfigured pads).
- The read/write/probe functions try to identify unconfigured bus.
- Status functions now read irqstatus_raw as per TRM guidelines
  (except for OMAP243X and OMAP34XX).
- Driver now supports up to I2C5 (OMAP5).

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Tested-by: Heiko Schocher <hs@denx.de>
2013-06-10 08:43:26 -04:00
Michal Simek
8934f78465 i2c: zynq: Add support for Xilinx Zynq
Support Xilinx Zynq i2c controller.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
2013-04-30 11:39:28 +02:00
Tom Rini
0ce033d258 Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end.  We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.

Conflicts:
	arch/arm/cpu/ixp/u-boot.lds
	arch/arm/cpu/u-boot.lds
	arch/arm/lib/Makefile
	board/actux1/u-boot.lds
	board/actux2/u-boot.lds
	board/actux3/u-boot.lds
	board/dvlhost/u-boot.lds
	board/freescale/mx31ads/u-boot.lds
	doc/README.scrapyard
	include/configs/tegra-common.h

Build tested for all of ARM and run-time tested on am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>
2013-03-18 14:37:18 -04:00
Tom Warren
e32624ef82 Tegra: I2C: Add T114 clock support to tegra_i2c driver
T114 has a slightly different I2C clock, with a new (extra) divisor
in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C
clock is 100KHz +/- 3Hz on my Saleae Logic analyzer.

Added a new entry in compat_names for T114 I2C since it differs
from the previous Tegra SoCs. A flag is set when T114 I2C HW is
found so new features like the extra clock divisor can be used.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2013-03-14 11:06:41 -07:00
Rajeshwari Shinde
cb466c056a I2C: S3C24X0: Bug fixes in i2c_transfer
This patch corrects the following issues

1) Write the correct M/T Stop value to I2CSTAT after i2c write.
   According to the spec, after finish the data transmission, we should
   write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of
   a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA).
2) Not split the write to I2CSTAT into 2 steps in i2c read.
   According to the spec, we should write the combined M/R Start value to
   I2CSTAT after setting the slave address to I2CDS
3) Fix the mistake of making an equality check to an assignment.
   In the case of I2C write with the zero-length address, while tranfering the
   data, it should be an equality check (==) instead of an assignment (=).

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2013-03-12 19:33:11 +01:00
Rajeshwari Shinde
cecf3c006f I2C: S3C24X0: Remove the dead code
This revomes the code under #if 0 in the s3c24x0_i2c driver.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-03-12 19:32:41 +01:00
Simon Glass
609e6ec3f6 ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data
Move these fields into arch_global_data and tidy up. This is needed for
both ppc and m68k since they share the i2c driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:42 -05:00
Marek Vasut
49c28b564b i2c: mxs: Staticize the functions in the driver
The local functions in the mxs i2c driver are not marked static, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2013-01-29 06:39:52 +01:00
Albert ARIBAUD
1199c377cf Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-01-14 15:21:00 +01:00
Rajeshwari Shinde
d04df3c6ad I2C: S3C24X0: Resolve build error for VCMA9
This patch resolves the following build errors for I2C driver in
VCMA9:

In file included from s3c24x0_i2c.c:40:0:
s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type
s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not
in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but
not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning:
'i2c_busses' defined but not used [-Wunused-variable]

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-14 14:45:30 +09:00
Albert ARIBAUD
79f3877794 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
2013-01-08 13:15:45 +01:00
Rajeshwari Shinde
a9d2ae7014 I2C: Driver changes for FDT support
Functions added to get the I2C bus number and reset I2C bus using
FDT node.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-08 10:54:33 +09:00
Armando Visconti
d40d914c06 designware_i2c.h: Define IC_CLK only if not already defined in config file
Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
ea31b7a7be designware_i2c.h: Fixed the correct values for SCL low/high time
Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
5b8439bbde designware_i2c: Fixed the setting of the i2c bus speed
There are three couple (hcnt/lcnt) of registers for each
speed (SS/FS/HS). The driver needs to set the proper couple
of regs according to what speed we are setting.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
491739bb74 designware_i2c: Added s/w generation of stop bit
In the newer versions of designware i2c IP there is the possibility
of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically
requires the s/w to generate the stop bit condition directly, as
the h/w will not automatically generate it when TX_FIFO is empty.

To avoid generation of an extra 0x0 byte sent as data, the
IC_STOP command must be sent along with the last IC_CMD.

This patch always writes bit[9] of ic_data_cmd even in the
older versions, assuming that it is a noop there.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:32 -07:00
Armando Visconti
ac6e2fe6e4 designware_i2c.c: Added the support for MULTI_BUS
This patch adds the capability to switch between 10
different I2C busses (from 0 to 9).

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2012-12-11 13:17:31 -07:00
Piotr Wilczek
c86d9ed382 drivers:i2c: Modify I2C driver for Exynos4
This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
2012-12-11 13:17:31 -07:00
Vincent Stehlé
66839773a8 omap24xx_i2c: Handle OMAP5 like OMAP2,3,4
OMAP5 has 8b i2c data register field, like OMAP2, 3 and 4. Handle in the same
way. This fixes the following error on OMAP5:

  OMAP5430 EVM # mmc rescan
  timed out in wait_for_bb: I2C_STAT=1410
  twl6035: could not turn on LDO9.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
2012-12-11 13:17:31 -07:00
Marek Vasut
fa5e2845a8 mxs: i2c: Implement algorithm to set up arbitrary i2c speed
This algorithm computes the values of TIMING{0,1,2} registers for the
MX28 I2C block. This algorithm was derived by using a scope, but the
result seems correct.

The resulting values programmed into the registers do not correlate
with the contents in datasheet. When using the values from the datasheet,
the I2C clock were completely wrong.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2012-12-11 13:17:30 -07:00
Marek Vasut
1e2fc0d19b mxs: i2c: Restore speed setting after block reset
The I2C block reset configures the I2C bus speed to strange value.
Read the I2C speed from the block before reseting the block and
restore it afterwards, so the I2C operates correctly. This issue
can be replicated by doing unsuccessful I2C transfer, after such
transfer finishes, the I2C block clock speed is misconfigured.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
aff36ea92e i2c: mxs: Fix TIMING2 register value
According to FSL, the value in the TIMING2 register shall be 0x00300030
instead of what's written in the datasheet. This new value correlates
with older STMP36xx datasheet. Issues were detected in Linux when this
register was misconfigured, so write this correct value.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
a157e0d5f6 i2c: mxs: Use i2c_set_bus_speed() in i2c_init()
Use i2c_set_bus_speed() in i2c_init() within the mxs i2c driver
to avoid duplication of code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
a06f590f7f i2c: mxs: Implement i2c_get/set_bus_speed()
This patch implements the setup and retrieval functions for the I2C
bus speed on the MXS I2C IP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
f32a470ed3 i2c: mxs: Abstract out the MXS I2C speed setup
This patch pulls out the I2C speed setup from the i2c_init() call
and implements the bus configuration lookup table with register
values that needs to be programmed into the I2C IP to run at
particular speed.

This patch is a first step towards implementing run-time I2C bus
speed configuration for the MXS I2C IP.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-12-11 13:17:30 -07:00
Marek Vasut
7f86bd576f i2c: Staticize local functions in mxc i2c driver
Some functions in the MXC i2c driver were not static, fix this by
making them so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2012-12-11 13:17:29 -07:00
Andreas Bießmann
eabd5d8d70 soft_i2c: add necessary includes for AVR32
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2012-12-11 13:17:29 -07:00
Vincent Stehlé
febc4cd48a omap24xx_i2c: Handle wait_for_bb error
We add a return code to wait_for_bb() to be able to report errors to the
callers properly. We in turn handle this new error code in i2c_read, i2c_write
and i2c_probe.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
2012-12-10 12:45:35 -07:00
Tom Rini
5bb3505fa8 Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-10-26 15:44:31 -07:00
Marek Vasut
6f62f42071 arm: Remove support for lpc2292
This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2012-10-26 22:35:20 +02:00
Kim Phillips
62f730fffd drivers/i2c/fsl_i2c.c: sparse fix
fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static?

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-10-25 12:06:21 -07:00
Tetsuyuki Kobayashi
f539094f48 i2c: sh_i2c: use setbits/clrbits macro
Use setbits/clrbits macro when read-modify-write register.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2012-10-16 05:47:21 +02:00
Tetsuyuki Kobayashi
0e5fb33cf7 i2c: sh_i2c.c: check error in i2c_read and i2c_write
Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero when error.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
d042d7121b i2c: sh_i2c: enable i2c_probe
Before this patch i2c_probe() always returned 0 and "i2c probe" command did not work properly.

Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call this function.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
020ec727a6 i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
3ce2703d8f i2c: sh_i2c.c: adjust for SH73A0
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:20 +02:00
Tetsuyuki Kobayashi
57d7c80472 i2c: sh_i2c.c: correct BUSY bit define in ICSR
Correct BUSY bit define in ICSR from (1<<3) to (1<<4).

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:19 +02:00
Tetsuyuki Kobayashi
b1af67fe5e i2c: sh_i2c.c: support iccl and icch extension
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch.
This patch add support for the extentin bits.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2012-10-16 05:47:19 +02:00
Matthias Weisser
e7bed5c2b3 imx: Use MXC_I2C_CLK in imx i2c driver
i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using
MXC_I2C_CLK on all imx systems using i2c.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:10 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Nobuhiro Iwamatsu
96d1e0933f i2c: sh: Remove irq_wait function
irq_wait function is not referred to from anywhere.

Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2012-10-03 08:47:17 +02:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Tom Warren
29f3e3f248 Tegra: Change Tegra20 to Tegra in common code, prep for T30
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-10 13:01:24 -07:00
Koen Kooi
a532278074 omap4 i2c: add support for i2c bus 4
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
2012-09-06 06:01:09 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Allen Martin
00a2749d7b tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Ilya Yanok
55faa58976 omap24xx_i2c: add 2-byte address support
Various devices like EEPROMs require 2-byte address support to
be properly accessed. This patch adds this support for OMAP2/3/4
I2C controller driver.
I've tested it with EEPROM (16 bit address) and TPS65217 chip
(8 bit address) on TI Beaglebone board.

Unfortunately I don't have access to any compatible hardware
with 16bit data register so I can't test if those #ifdef
clauses really work.

CC: Tom Rini <trini@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01 14:58:08 +02:00
Rajeshwari Shinde
178239de19 I2C: Add support for Multi channel
This adds multiple i2c channel support for I2C.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:03:03 +02:00
Rajeshwari Shinde
ab7e52bb24 I2C: Modify the I2C driver for EXYNOS5
This patch modifies the S3C I2C driver to suppport EXYNOS5.
The cahnges made to driver are as follows:
        - I2C base address is passed as a parameter to many
        functions to avoid multiple #ifdef
        - Channel initialisation is moved to a commom funation
        as it is required by i2c_init.
        - Hardcoding for I2CCON_ACKGEN removed.
        - Replaced printf with debug.
        - Checkpatch issues resolved.
        - Pinmux setting will be done in board/samsung/smdk5250/smdk5250.c
        to avoid repeated setting of gpio lines, as it have multi bus support.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:02:51 +02:00
Rajeshwari Shinde
91dffb16ff I2C: Move struct s3c24x0_i2c to a common place.
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31 08:02:41 +02:00
Troy Kisky
9815326d04 mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:59:41 +02:00
Troy Kisky
96c19bd3ef mxc_i2c: add bus recovery support
Add support for calling a function that will toggle the
SCL line to return the bus to idle condition.

The actual toggling function is added in a later patch.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:59:26 +02:00
Troy Kisky
e4ff525f91 mxc_i2c: prep work for multiple busses support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:57:04 +02:00
Troy Kisky
27a5da02c0 mxc_i2c: add i2c_regs argument to i2c_imx_stop
This is prep work for CONFIG_I2C_MULTI_BUS.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:55:13 +02:00
Troy Kisky
a7f1a00510 mxc_i2c: add retries
Retry unexpected hardware errors. This
will not retry a received NAK.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:53:36 +02:00
Troy Kisky
d5383a63cd mxc_i2c: check for arbitration lost
No need to continue waiting if arbitration lost.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:53:24 +02:00
Troy Kisky
ca741da106 mxc_i2c: change slave addr if conflicts with destination.
The i2c controller cannot be both master and slave in the
same transaction.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:52:53 +02:00
Troy Kisky
90a5b70f59 mxc_i2c: don't disable controller after every transaction
This helps in a multiple bus master environment which
is why I also added a wait for bus idle.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:51:22 +02:00
Troy Kisky
83a1a19038 mxc_i2c: place i2c_reset code inline
imx_reset is only referenced once so
move to that location.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:49:48 +02:00
Troy Kisky
71e9f3cbeb mxc_i2c: place imx_start code inline
imx_start is only referenced once so
move to that location.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:46:06 +02:00
Troy Kisky
d45e75b10c mxc_i2c: remove redundant read
wait_for_sr_state returns i2sr on success
so no need to read again.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:45:00 +02:00
Troy Kisky
7aa57a01c0 mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state
Not using udelay gives a more accurate timeout. The current implementation of udelay
in imx-common does not seem to wait at all for a udelay(1).

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>

----
V2: Added WATCHDOG_RESET as suggested by Marek Vasut
add error message when stop fails

mxc_i2c: code i2c_probe as a 0 length i2c_write

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-31 07:44:25 +02:00
Troy Kisky
cfbb88d338 mxc_i2c.c: code i2c_probe as a 0 length i2c_write
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-31 07:43:51 +02:00
Troy Kisky
c4330d283c mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 07:43:25 +02:00
Troy Kisky
b230ddc267 mxc_i2c: create i2c_init_transfer
Initial code of i2c_read and i2c_write
is identical, move to subroutine.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-31 07:42:58 +02:00
Troy Kisky
ea572d853e mxc_i2c: clear i2sr before waiting for bit
Let's clear the sr register before waiting for
bit to be set, instead of clearing it after
hardware sets it. No real operational difference here,
but allows combining of i2c_imx_trx_complete and
i2c_imx_bus_busy in later patches.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:42:20 +02:00
Troy Kisky
cea60b0c6c mxc_i2c: create tx_byte function
Use tx_byte function instead of having 3 copies
of the code.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:41:51 +02:00
Troy Kisky
24cd738bc4 mxc_i2c: remove ifdef of CONFIG_HARD_I2C
This is always selected when CONFIG_I2C_MXC is
selected, so it adds no value.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-31 07:41:23 +02:00
Troy Kisky
1c076dba27 mxc_i2c: fix i2c_imx_stop
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-31 07:40:59 +02:00
Torsten Fleischer
fa86d1c0bf mxs-i2c: Fix internal address byte order
Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory.
These devices require that the high byte of the internal address has to be
written first.
The mxs_i2c driver currently writes the address' low byte first.

The following patch fixes the byte order of the internal address that should
be written to the I2C device.

Signed-off-by: Torsten Fleischer <to-fleischer@t-online.de>

CC: Marek Vasut <marex@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:53 +02:00
Troy Kisky
9ca37d78a3 mxc_i2c: remove setting speed at each start
Other then being very weird, this code was also wrong.
For example, say I set speed to 100K. I'll read back the speed
as 85937. But the speed is really 85937.5, so we I reset
the speed to 85937, I'll get 73660.7. After a couple of transactions
my speed is now exactly 68750 so it will remain there.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:52 +02:00
Troy Kisky
de6f604de2 mxc_i2c: specify i2c base address in config file
The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
and mx53loco.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:29 +02:00
Stefan Roese
496ba48f5e i2c: designware_i2c.c: Add support for the "i2c probe" command
i2c_probe() is changed to reinit the i2c bus upon read failure.
This is naturally the case upon i2c bus probing.

Also, some printf messages upon read failure are removed. As they
would interfere with the "i2c probe" command.

Additionally, i2c_set_bus_speed() now returns 0, so that the
"i2c speed" command can be used.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
2012-07-07 14:07:43 +02:00
Tom Rini
402d17fc4c omap24xx_i2c: Add AM33XX support
The same places that check for CONFIG_OMAP44XX need to check for
CONFIG_AM33XX as we share the same i2c block.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:23 +02:00
Tom Rini
168a5acb81 Revert "I2C: OMAP: detect more devices when probing an i2c bus"
This reverts commit 0e57968a21.

The short version of the original commit is that some i2c devices cannot
be probed via read as they NAK the first cycle, so try and probe via a
write that we abort before it writes to the device.  This however is not
allowed by the TRM for any of these parts.  The section on I2C_CON
(table 17-35 I2C_CON for am/dm37x for example) says you must not change
the register while STT has been set.  On these parts, the unpredictable
behavior that the chip exhibits is not problematic.  On OMAP4 however it
results in the chip being in a bad state:
Panda # i2c probe
Valid chip addresses: 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A
2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42
43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A
5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72
73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
Panda # i2c md 50 0
timed out in wait_for_pin: I2C_STAT=0
I2C read: I/O error
Error reading the chip.

We must revert the original behavior to bring probe back into line with
the TRM.

Cc: Nick Thompson <nick.thompson@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
Simon Glass
e31c1e50ac tegra: i2c: Add function to find DVC bus
Add tegra_i2c_get_dvc_bus_num() to obtain the I2C bus number of DVC bus.
This allows us to talk to the PMU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Armando Visconti
5e3e8dda51 i2c:designware Turn off the ctrl when setting the speed
The designware i2c controller must be turned off before
setting the speed in IC_CON register, as stated in the
section 6.3.1 of the dw_apb_i2c_db.pdf.

Signed-off-by: Michel Sanches <michel.sanches@st.com>
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
2012-04-24 09:57:00 +02:00
Vipin KUMAR
031ed2fa74 i2c: Add support for designware i2c controller
Earlier, a driver exists in the u-boot source for designware i2c interface. That
driver was specific to spear platforms. This patch implements the i2c controller
as a generic driver which can be used by multiple platforms

The driver files are now renamed to designware_i2c.c and designware_i2c.h and
these are moved into drivers/i2c folder for reusability by other
platforms

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
2012-04-24 09:56:37 +02:00
Nobuhiro Iwamatsu
2d344a2ab2 sh: i2c: Add support I2C controller of SH7734
Renesas SH7734 has two I2C interfaceis.
This supports these I2C.

V5: - include i2c.h.
    - Add check of icsr bit polling logic.
	- Implement i2c_probe.
V4: - Remove sh_i2c_dump_reg function.
    - Use puts() when there's no format.
    - Chnage check for I2C bus number.
    - Remove space before the semi-colon.
V3: - Fix error for whitespace.
V2: - Changed bit control to use the clr|set|clrsetbits_* functions.
    - Fix wrong comment style.
    - Add new line before for loop in i2c_read.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-04-24 09:40:04 +02:00
Yen Lin
96a78ac0c4 tegra: i2c: Add I2C driver
Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver requires CONFIG_OF_CONTROL to obtain its configuration
from the device tree.

(Simon Glass: sjg@chromium.org modified for upstream)

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:50 +02:00
Tom Rini
cec487a435 Revert "ARM: I2C: I2C Multi byte address support"
This reverts commits 2faa76196a as
this has introduced some large problems on all other platforms and have
more changes in them than the commit message implies.

Cc: Heiko Schocher <hs@denx.de>
Cc: Patil, Rachna <rachna@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-02-21 07:28:47 +01:00
Tom Rini
c2459a405b Revert "ARM: AM33XX: Add AM33XX I2C driver support"
This reverts commit 498cbdfe62 as we need
to revert the i2c changes that add the support for the platform.

Cc: Heiko Schocher <hs@denx.de>
Cc: Patil, Rachna <rachna@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-02-21 07:28:29 +01:00