mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
mxc_i2c: clear i2sr before waiting for bit
Let's clear the sr register before waiting for bit to be set, instead of clearing it after hardware sets it. No real operational difference here, but allows combining of i2c_imx_trx_complete and i2c_imx_bus_busy in later patches. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
parent
cea60b0c6c
commit
ea572d853e
1 changed files with 5 additions and 4 deletions
|
@ -200,10 +200,8 @@ int i2c_imx_trx_complete(void)
|
|||
int timeout = I2C_MAX_TIMEOUT;
|
||||
|
||||
while (timeout--) {
|
||||
if (readb(&i2c_regs->i2sr) & I2SR_IIF) {
|
||||
writeb(0, &i2c_regs->i2sr);
|
||||
if (readb(&i2c_regs->i2sr) & I2SR_IIF)
|
||||
return 0;
|
||||
}
|
||||
|
||||
udelay(1);
|
||||
}
|
||||
|
@ -215,6 +213,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
|
|||
{
|
||||
int ret;
|
||||
|
||||
writeb(0, &i2c_regs->i2sr);
|
||||
writeb(byte, &i2c_regs->i2dr);
|
||||
ret = i2c_imx_trx_complete();
|
||||
if (ret < 0)
|
||||
|
@ -346,7 +345,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
|
|||
if (len == 1)
|
||||
temp |= I2CR_TX_NO_AK;
|
||||
writeb(temp, &i2c_regs->i2cr);
|
||||
readb(&i2c_regs->i2dr);
|
||||
writeb(0, &i2c_regs->i2sr);
|
||||
readb(&i2c_regs->i2dr); /* dummy read to clear ICF */
|
||||
|
||||
/* read data */
|
||||
for (i = 0; i < len; i++) {
|
||||
|
@ -369,6 +369,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
|
|||
writeb(temp, &i2c_regs->i2cr);
|
||||
}
|
||||
|
||||
writeb(0, &i2c_regs->i2sr);
|
||||
buf[i] = readb(&i2c_regs->i2dr);
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in a new issue