Commit graph

15344 commits

Author SHA1 Message Date
Tom Rini
5cc1d9214a Convert CONFIG_HAS_FSL_DR_USB to Kconfig
This converts the following to Kconfig:
   CONFIG_HAS_FSL_DR_USB

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Fabio Estevam
b5023254b8 kontron-sl-mx8mm: Add CAAM support
Add CAAM support, which is required when enabling HAB secure boot.

Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could
build successfully, if selected.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-28 15:24:31 +02:00
Francesco Dolcini
66af2c3e95 board: apalis_imx6: DDR init using mx6_dram_cfg()
Do DDR initialization using the procedural mx6_dram_cfg() instead of
programming the MMDC using a raw list of register/value pairs, this
solves some rare boot failures on specific "bad" modules.

Calibration values, DDR geometry are unchanged, memory timings are
updated according to the relevant memory datasheet, no changes on
the power consumption.

For IT temperature range SKUs CL is decreased from 8 to 7 and tFAW
value is increased, for commercial temperature range SKUs some
changes on ODT parameters.

This change was validated over a range of different apalis-imx6 SoM, on
the whole working temperature range with weeks of continuous testing.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-28 15:24:31 +02:00
Francesco Dolcini
d4cd19ded8 toradex: apalis/colibri_imx6: Fix CLKO1/CLKO2 output
Set CLK01 and CLK02 to 24MHz and enable it in CCM_CCOSR register.

This clock is used by both the audio codec (CLKO1) and by the CSI camera
(CLKO2) and is expected to be 24MHz.

Despite the wrong 16.5MHz there was no real issue because of the wrong
frequency since Linux reconfigures the clocks afterward, however this
was triggering an issue with noise coming from the SGTL5000 audio codec.

The problem is that the SGTL5000 does not have a reset pin and after it
is configured if the input MCLK clock is disabled it produces a constant
noise on its output, this was happening on software reboot.

Forcing the clock to be enabled in U-Boot prevent the problem by making
sure that the clock is always available, without this change as soon as
Linux was changing the clock tree (setting clk_out_sel=1 without setting
clko2_en=1) the noise would start till the actual clock was enabled
(clko2_en=1) during the SGTL5000 driver probe.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-28 15:24:31 +02:00
Marek Vasut
b70c34224e ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver
Replace the ad-hoc I2C register programming scripted in board
environment with U-Boot DM driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-28 15:24:31 +02:00
Eugen Hristev
3820020299 board: atmel: remove calls to debug_uart_init
Since 0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S

It's no longer required to call it from the board file.

With the current code, the banned <debug_uart> is printed twice:

<debug_uart>

<debug_uart>

U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)

Remove all calls from board_early_init_f .

Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-06-28 10:10:06 +03:00
Tom Rini
c316ee674f Xilinx changes for v2022.10
cpu:
 - Add driver for microblaze cpu
 
 net:
 - Add support for DM_ETH_PHY to AXI emac and emaclite
 
 xilinx:
 - Switch platforms to DM_ETH_PHY
 - DT chagnes in ZynqMP and Zynq
 - Enable support for SquashFS
 
 zynqmp:
 - Add support for KR260 boards
 - Move BSS from address 0
 - Move platform identification from board code to soc driver
 - Improve zynqmp_psu_init_minimize
 
 versal:
 - Enable loading app at EL1
 
 serial:
 - Setup default address and clock rates for DEBUG uarts
 
 pinctrl:
 - Add support for tri state and output enable properties
 
 relocate-rela:
 - Clean relocate-rela implementation for ARM64
 - Add support for Microblaze
 
 microblaze:
 - Add support for runtime relocation
 - Rework cache handling (wiring, Kconfig) based on cpuinfo
 - Remove interrupt support
 
 timer:
 - Extract axi timer driver from Microblaze to generic location
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Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location
2022-06-27 10:15:50 -04:00
Samuel Holland
e008e5132f sunxi: fix initial environment loading without MMC
Commit e42dad4168 ("sunxi: use boot source for determining environment
location") changed our implementation of env_get_location() and enabled
it for every board, even those without MMC support (like the C.H.I.P.
boards). However the default fallback location of ENVL_FAT requires MMC
support compiled in, so the board hangs when trying to initially load
the environment.

Change the algorithm to only return configured environment locations,
and improve the fallback algorithm on the way.

The env_init() routine calling this function here does not behave well
if the return value is ENVL_UNKNOWN on the very first call: it will make
U-Boot proper silently hang very early.
Work around this issue by making sure we return some configured (dummy)
environment location when prio is 0. This for instance happens when
booting via FEL.

This fixes U-Boot loading on the C.H.I.P. boards.

Fixes: e42dad4168 ("sunxi: use boot source for determining environment location")
Reported-by: Chris Morgan <macroalpha82@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix FEL boot case by not returning ENVL_UNKNOWN when prio==0]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-06-26 11:22:54 +01:00
Stefan Herbrechtsmeier
036ef47b32 arm64: zynqmp: Move helper functions below header includes
Move helper functions in psu_init files below header includes to avoid
forward declarations.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-15-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
f93c1c8f3f xilinx: zynqmp: make spi flash support optional
The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define
to set the dfu_alt_info environment variable for qspi boot mode. Guard
the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support
optional.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
86ceedd84e xilinx: common: Separate display cpu info function
Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own
source file to support reuse by other board vendors.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
381ede9e38 xilinx: cpuinfo: Print soc machine
Print the soc machine in the print_cpuinfo function.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
a1e618a1b9 soc: xilinx: zynqmp: Add machine identification support
Add machine identification support based on the
zynqmp_get_silicon_idcode_name function and use the soc_get_machine
function of the soc uclass to get silicon idcode name for the fpga init.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
d43d78ef03 xilinx: zynqmp: Merge device lists
Merge the svd / xck devices into to the common zynqmp device list.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-6-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
71278c0e59 xilinx: zynqmp: Reuse shift macros to define masks
Reuse the shift macros to define the masks.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-5-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
9bc5a24dea xilinx: zynqmp: Add macro for device type mask
Add a macro for the device type mask of the id code.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-4-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
bcf6f71bd7 xilinx: zynqmp: Replace strncat with strlcat
Replace strncat with strlcat to always produce a valid null-terminated
string.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-3-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Ovidiu Panait
9df16c5937 microblaze: add support for handling PVR data
Add helper code for PVR (Processor Version Register) data handling. It
will be used by the UCLASS_CPU driver to populate cpuinfo fields at
runtime.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
064057fdbe microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option
Provide a static Kconfig value for the target FPGA archtitecture, as it is
done in Linux. The cpu-uclass driver will cross-check it with the value
read from PVR10 register.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
84488fc693 microblaze: cache: introduce Kconfig options for icache/dcache sizes
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for
instruction and data caches sizes, respectively:
CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE
CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE

Also, get rid of the hardcoded value in icache_disable().

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
2022-06-24 14:16:00 +02:00
Ovidiu Panait
8daf89678e microblaze: cache: improve icache Kconfig options
Replace CONFIG_ICACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports
the "wic" (Write to Instruction Cache) instruction. It will be used to
guard "wic" invocations in microblaze cache code.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ovidiu Panait
ef0a592ae8 microblaze: cache: improve dcache Kconfig options
Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
the "wdc" (Write to Data Cache) instruction. It will be used to guard
"wdc" invocations in microblaze cache code.

Also, drop all ifdefs around flush_cache() calls and only keep one
CONFIG_IS_ENABLED() guard within flush_cache() itself.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:16:00 +02:00
Ashok Reddy Soma
2eeceb4842 arm64: versal: Add support to load an app at EL1
Add support to switch to EL1 and load an EL1 app from U-Boot which is
executing at EL2 or EL3 in aarch64 mode.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220506055345.1921-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:11:05 +02:00
Andrew Scull
99e2fbcb69 linker_lists: Rename sections to remove . prefix
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.

Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Tom Rini
929e581a62 corstone1000: Convert to text file environment
Convert this platform to using the text file environment rather than
defining CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-22 21:30:05 -04:00
Tom Rini
781a144a7a gxp: Convert to text file environment
Convert this platform to using the text file environment rather than
defining CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-22 21:30:05 -04:00
Nick Hawkins
e7ea0a2ba3 board: hpe: gxp: add HPE GXP soc support
Add basic support for the HPE GXP SoC. Reset the EHCI controller at
boot.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
2022-06-22 21:30:05 -04:00
Rui Miguel Silva
f98457d70a arm: add support to corstone1000 platform
Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].

This code adds the support for the Cortex-A35 implementation
at host side, it contains also the necessary bits to support
the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
FPGA MPS3 board implementation of this platform. [2]

0: https://developer.arm.com/documentation/102360/0000
1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
2: https://developer.arm.com/documentation/dai0550/c/

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-22 12:35:15 -04:00
Tom Rini
52af0101be Merge branch 'master' into next
Merge in v2022.07-rc5.
2022-06-20 14:40:59 -04:00
Tom Rini
2f7821a927 - Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
 - Activate livetree for stm32mp15 DHSOM boards
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Merge tag 'u-boot-stm32-20220620' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards
2022-06-20 08:09:24 -04:00
Michael Walle
1029249b00 board: sl28: support 8 GiB memory
The board supports up to 8 GiB memory. The memory is soldered on the
board but the configuration is equivalent to a dual chip select, dual
rank DIMM module.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Michael Walle
7fd5ca1501 board: sl28: remove unneeded ddr config parameter
config_2 doesn't need to be set to zero because that is already the
default value.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Michael Walle
6bdda4b200 board: sl28: set CPO value
With a 8GiB memory board, it seems that the "very unlikely event" of a
DDR initialization with non-optimal values are not really that unlikely.
It happens in about every other reboot. As described in erratum
A-009942, preset the DEBUG_28 register with an optimal value. The value
iself depends on the memory configuration of the board, but the used
value seems to work well for all variants.

Signed-off-by: Michael Walle <michael@walle.cc>
2022-06-20 15:52:45 +08:00
Alison Wang
d494806376 ls1028a: hdp: Add config support for HDP firmware loading
This patch adds config support for HDP firmware loading on LS1028A.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2022-06-20 09:18:26 +08:00
Pali Rohár
20fb58fc5a board: freescale: p1_p2_rdb_pc: Implement board_reset()
Do board reset via CPLD's system reset register.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Pali Rohár
ae0e7ee886 board: freescale: p1_p2_rdb_pc: Enable TDM function only for P1010
TDM function is supported only on P1010. P2020 does not have PMUXCR_TDM_ENA
register, so do not enable it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-20 09:18:26 +08:00
Tom Rini
aad77c215c - Fix the stm32prog command for stm32mp platform
- Add stm32mp15x DHCOR based DRC Compact board
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Merge tag 'u-boot-stm32-20220617' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Fix the stm32prog command for stm32mp platform
- Add stm32mp15x DHCOR based DRC Compact board
2022-06-17 09:41:11 -04:00
Patrick Delaunay
7171d99296 stm32mp: stpmic1: remove the debug unit request by debugger
Depending on backup register value, U-Boot SPL maintains the debug unit
powered-on for debugging purpose; only BUCK1 is required for powering
the debug unit, so revert the setting for all the other power lanes,
except BUCK3 that has to be always on.

To be functional this patch requires a modification in the debugger
,openocd for example, to update the STM32MP15 backup register when it is
required to debug SPL after reset. After deeper analysis this behavior
will be never supported in tools so the associated code, will be never
used and the associated code can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
5a605b7c86 board: dhelectronics: stm32mp1: convert to livetree
Replace call to fdt_*() functions and access to gd->fdt_blob
with call to ofnode_*() functions to support a live tree.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
655100d706 board: engicam: stm32mp1: convert to livetree
Replace gd->fdt_blob access with fdt_getprop() function to the
function ofnode_get_property() to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
6350633ed9 board: stm32mp1: convert to livetree
Replace gd->fdt_blob access with fdt_getprop() function to the
function ofnode_get_property() to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:26 +02:00
Patrick Delaunay
11517ccc8c configs: add stm32mp13 defconfig
Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk
device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
ae3e2c2bf7 board: stm32pm1: add stm32mp13 board support
Add stm32mp15x prefix to all STM32MP15x board specific functions,
this patch is a preliminary step for STM32MP13x support.

This patch also adds the RCC probe to avoid circular access with
usbphyc probe as clk provider.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 10:41:16 +02:00
Patrick Delaunay
960debbe3c arm: stm32mp: add support of STM32MP13x
Introduce the code in mach-stm32mp and the configuration file
stm32mp13_defconfig for the new STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Patrick Delaunay
a82abb15a8 ARM: dts: stm32: add STM32MP13 SoCs support
Add initial support of STM32MP13 family based on v5.18-rc2

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 09:58:21 +02:00
Marek Vasut
4f71c80b0d ARM: dts: stm32: Add DHCOR based DRC Compact board
Add DT for DH DRC Compact unit, which is a universal controller device.
The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD
card slot, eMMC and SDIO Wi-Fi.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:31:19 +02:00
Corentin LABBE
2f51f946e3 board: ti: am335x: eth_cpsw should depend on CONFIG_NET
The origin of this patch is the breaking of am335x-hs boot
due to commit e41651fffd ("dm: Support parent devices with of-platdata")
HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit.
This commit added 10 driver binding pass and am335x boot only if one pass is done.
SPL try to do more than one pass due to eth_cpsw failing.
Since HS SPL does not need network (and NET is already disabled in config),
the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled.

Signed-off-by: Corentin LABBE <clabbe@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew Davis <afd@ti.com>
2022-06-16 15:22:55 -04:00
Christophe Leroy
48f44de8b4 Update email address and company name
This patch updates my email address and company name.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2022-06-16 15:22:54 -04:00
Peng Fan
e8780d2380 imx: phycore_imx8mm/p: clean up board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
2022-06-14 21:33:14 +02:00
Peng Fan
4152ea24f2 imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-14 21:33:14 +02:00
Peng Fan
722e2b9a2b imx: imx8mp_rsb7320a1: enable wdog driver model in SPL
Mark wdog1/pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
ae75489c48 imx: imx8mn_var_som: clean up board watchdog code
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-06-14 21:33:14 +02:00
Peng Fan
cbda080ae9 imx: imx8mn-beacon: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
6692cd967d imx: imx8mm/n/p-venice: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
333a6fa12f imx: engicam-imx8mm: drop unused macro
Drop unused WDOG macro

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-06-14 21:33:14 +02:00
Peng Fan
2d7f40cad5 imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:14 +02:00
Peng Fan
ee106eda7e imx: imx8mm_beacon: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-14 21:33:13 +02:00
Peng Fan
0a16da8079 imx: kontron-sl-mx8mm: enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-06-14 21:33:13 +02:00
Peng Fan
bb9e14cfd0 imx: imx8mn_var_som: enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
64d118b27f imx: imx8m[m/p]_phycore: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
4ebb9a5898 imx: imx8mm_icore: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
37750505b9 imx: imx8mm-cl-iot-gate: Enable DM_SERIAL
Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:33:13 +02:00
Peng Fan
d35130fef8 imx: imx8m[m/n]_beacon: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mn_beacon
2022-06-14 21:33:13 +02:00
Gaurav Jain
66e54716cf secure boot: enable ARCH_MISC_INIT config.
add ARCH_MISC_INIT to initilaize caam jr driver.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-14 21:25:26 +02:00
Josua Mayer
741ce3084e mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS
SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300
at address 1. Because early SoMs had a hardware flaw, the ar8035 can
also appear at address 4 - making it a total of 3 phy nodes in the DTB.

To avoid confusing Linux with probe errors, fixup the dtb to only enable
the phy node that is detected at runtime.

Signed-off-by: Josua Mayer <josua@solid-run.com>
2022-06-14 21:25:26 +02:00
Philippe Schenker
0da8dde634 board: apalis-imx8: add new 8gb product variant
Add the new Apalis iMX8 product variant

0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT

the only difference to the product

0037 Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT

is the 8gb of RAM. Toradex strategy to choose the correct RAM timing in
SCFW is by fuses in the user area telling which RAM timing to load.

This commit makes use of this information to set the correct size of
the RAM and therefore distinguish between the new 0067 and 0037 product

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-14 21:25:26 +02:00
Philippe Schenker
4941035143 toradex: tdx-cfg-block: add new 8gb apalis-imx8
0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT

This module is identical to its 4GB counterpart
0037: Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT
except for the RAM size.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-06-14 21:25:26 +02:00
Tom Rini
c1d9020cc7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-14 12:59:12 -04:00
Marcel Ziswiler
8f27bf114e board: apalis_t30/tk1/colibri_t20/t30: integrate mac address via dt
Use device tree to set MAC address of the Ethernet chip.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-13 15:31:15 -07:00
Vignesh Raghavendra
2d257d9279 configs: Add configs for AM62x SK
Add am62x_evm_r5_defconfig for R5 SPL and am62x_evm_a53_defconfig for
A53 SPL and U-Boot support.

To keep the changes to minimum. Only UART And SD boot related configs
are included. This should serve as good starting point for new board
bringup with AM62x.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[trini: Migrate a number of CONFIG symbols, have re-tested]
Tested-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:37:33 -04:00
Suman Anna
900349b7dd board: ti: Introduce the basic files to support AM62 SK board
Add basic support for AM62 SK. This has 2GB DDR.
Note that stack for R5 SPL is in OCRAM @ 0x7000ffff so that is away from
BSS and does not step on BSS section

Add only the bare minimum required to support UART and SD.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-10 13:37:33 -04:00
Derald D. Woods
161535444b ARM: omap3: evm: Power on MMC when setting up PMIC
This commit copies the related code changes from the BeagleBoard.

Reference:
- 848cfe098f

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2022-06-10 13:37:32 -04:00
William Zhang
f8209d3051 arm: bcmbca: introduce the bcmbca architecture and 47622 SOC
This is the initial support for Broadcom's ARM-based 47622 SOC.

In this change, our first SOC is an armv7 platform called 47622. The
initial support includes a bare-bone implementation and dts with ARM
PL011 uart.

The SOC-specific code resides in arch/arm/mach-bcmbca/<soc> and board
related code is in board/broadcom/bcmba.

The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-06-10 13:37:32 -04:00
Vaishnav Achath
66a33f41e9 ti: j721e: enable hyperflash spl fixup for j721e
On j721e, its not possible to use OSPI0 and HBMC simultaneously as they
are muxed within the Flash Subsystem hence disable HBMC by default and
keep OSPI enabled. Bootloader will fixup DT when it detects HyperFlash
mux selection instead of OSPI.

Also updated detect_enable_hyperflash to use correct GPIO when checking
hypermux selection state:
* J7200 - hypermux sel connected to WKUP_GPIO0_6
* J721E - hypermux·sel·connected·to·WKUP_GPIO0_8

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2022-06-10 09:03:22 -04:00
Sean Anderson
e844e5d908 sandbox: Move some mac addresses to device tree
This prevents some conflicts when running sandbox with -D, since the
"rom" mac address will be random and won't match the environment. We
still need to keep addresses for eth1 and eth6 in the environment,
because dm_test_eth_rotate expects to be able to disable them by
removing their envaddr variables. This can likely be fixed in a future
series by adding a function to cause sandbox eth_opts callback for a
particular mac to fail immediately.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 13:59:52 -04:00
Sean Anderson
29186884f8 sandbox: Remove eth2addr from environment
DSA interfaces use the same mac address for each interface, unless
instructed otherwise. Just set eth4addr and let eth2addr and eth7addr be
set automatically.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-08 13:59:52 -04:00
Sean Anderson
469a968ac7 sandbox: net: Add mac address for eth8 to environment
The phy_eth0 interface introduced in commit f3dd213e15 ("net: introduce
helpers to get PHY ofnode from MAC") uses a globally-administered
address. Switch to using a locally-administered address, and add it to
the sandbox environment, like the others.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 13:59:52 -04:00
Pali Rohár
b62450cf22 serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE)
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.

For ns16550 driver this support is there since commit d293759d55
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-06 18:01:21 -04:00
Tom Rini
14b4817513 ax25-ae350: Move CONFIG_SYS_FDT_BASE to Kconfig
The address where the device tree will be passed in to U-Boot at is now
moved to the Kconfig file.  If this is user configurable, it needs to be
exposed rather than hidden, and should probably be renamed as well.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
7f2c91e5d8 Convert CONFIG_SPL_GD_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_GD_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:29 -04:00
Tom Rini
55cf860ba7 Convert CONFIG_SPL_RELOC_TEXT_BASE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_RELOC_TEXT_BASE
   CONFIG_SPL_RELOC_STACK
   CONFIG_SPL_RELOC_MALLOC_ADDR
   CONFIG_SPL_RELOC_MALLOC_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:28 -04:00
Tom Rini
eaf6ea6a1d Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:19 -04:00
Tom Rini
90f0819a31 Convert CONFIG_SPL_COMMON_INIT_DDR to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_COMMON_INIT_DDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:12 -04:00
Tom Rini
9b5f9aeb3b Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_BSS_MAX_SIZE
   CONFIG_SPL_MAX_FOOTPRINT

Note that the da850evm platforms were violating the "only use one" rule
here, and so now hard-code their BSS limit.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:10 -04:00
Tom Rini
b35316fb67 Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_INIT_MINIMAL
   CONFIG_SPL_FLUSH_IMAGE
   CONFIG_SPL_SKIP_RELOCATE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Tom Rini
b7fbdc55c7 Convert CONFIG_HUSH_INIT_VAR to Kconfig
This converts the following to Kconfig:
   CONFIG_HUSH_INIT_VAR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Michal Simek
93216276f5 xilinx: fru: Replace spaces with \0 in detected revision
Also fix board revision field where spaces are used instead of \0.
The same change was done for board name by commit 530560b6f8 ("xilinx:
fru: Replace spaces with \0 in detected name").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com
2022-06-06 09:32:26 +02:00
Dave Gerlach
c30f6d62f0 board: ti: am64x: Update MAINTAINERS
Move maintainership of TI AM64x boards to Vignesh.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-06-03 15:42:05 -04:00
Tom Rini
4fe629d2e8 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-05-27 08:50:42 -04:00
Wasim Khan
d9402bd49b board: freescale: Update MAINTAINERS List
Update MAINTAINERS List for LS2088ARDB and LS2088AQDS
platforms

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
2022-05-26 10:32:26 -04:00
Rick Chen
b277a95c6e riscv: ae350: Fix OF_BOARD boot failure
Enable OF_HAS_PRIOR_STAGE for ae350 boards with OF_BOARD

Fixes: 239d22c795 ("fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARD")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-05-26 18:37:51 +08:00
Tom Rini
661f540075 Xilinx changes for v2022.07-rc4
zynqmp:
 - Fix DP PLL configuration for zcu102/zcu106 and SOM
 - Fix split mode for starting R5s
 - DT fixes
 - Remove firmware node for mini configurations
 - Wire TEE for multi DTB fit image
 
 xilinx:
 - Handle board_get_usable_ram_top(0) properly
 
 phy:
 - Extend psgtr timeout
 
 mmc:
 - Fix mini configuration which misses zynqmp_pm_is_function_supported()
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Merge tag 'xilinx-for-v2022.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.07-rc4

zynqmp:
- Fix DP PLL configuration for zcu102/zcu106 and SOM
- Fix split mode for starting R5s
- DT fixes
- Remove firmware node for mini configurations
- Wire TEE for multi DTB fit image

xilinx:
- Handle board_get_usable_ram_top(0) properly

phy:
- Extend psgtr timeout

mmc:
- Fix mini configuration which misses zynqmp_pm_is_function_supported()
2022-05-25 09:50:08 -04:00
Tom Rini
7e0edcadb0 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
The bulk of it is (finally!) some DT sync from the kernel. We refrained
from syncing one incompatible change, as this would spoil booting Linux
kernels before v5.13 with U-Boot's DT (via UEFI, for instance).
I test booted Linux v5.18 and v5.4 with that new DT on some boards, and
the headless peripherals (MMC, USB, Ethernet) seemed to work.
The rest are fixes:
- silencing missing clock warnings due to the new pinctrl driver
- fixing "UART0 on PortF", allowing UART access through the SD card pins
- add an F1C100s clock driver, to enable MMC support (SPI comes later)
- some cleanups for CONS_INDEX_n in Kconfig

Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and
OrangePi-Zero.
2022-05-24 23:29:00 -04:00
Samuel Holland
3ba0a25c44 sunxi: Skip MMC0 init when its pinmux conflicts with UART0
Currently, selecting UART0_PORT_F entirely disables MMC support on sunxi
platforms. But this is a bigger hammer then needed. Muxing UART0 to the
pins on port F only causes a conflict with MMC0, so minimize the impact
by specifically skipping MMC0 init. We can continue to use MMC1/2 if
those are enabled.

Let's also remove the preprocessor check while refacting this function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24 01:14:35 +01:00
Humberto Naves
1b05136a6c arm: socfpga: Add the terasic de10-standard board
Use the de10-nano files as templates for the de10-standard board.
The files in qts directory are generated by quartus from the GHRD
design.

Signed-off-by: Humberto Naves <hsnaves@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-05-23 21:28:07 +02:00
Patrice Chotard
61708bb0a2 spi: spi-uclass: Add new spi_get_bus_and_cs() implementation
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().

Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.

Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2022-05-23 09:33:10 -04:00
Tom Rini
004d30c786 u-boot-imx-20220523
-------------------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087
 
 Additionally to u-boot-imx20200520:
 
 - DH MX8MP
 - i.MX GPIO: reading GPIO when direction is output
 - Menlo i.MX53: switch to DM
 
 And from u-boot-imx20200520:
 
 - fix Verdin hang
 - add pca9450 regulator
 - conversion to DM_SERIAL
 - NAND block handling
 - fix crypto
 - enable cache on some boards
 - add ACC board (MX6)
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Merge tag 'u-boot-imx-20220523' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220523
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087

Additionally to u-boot-imx20200520:

- DH MX8MP
- i.MX GPIO: reading GPIO when direction is output
- Menlo i.MX53: switch to DM

And from u-boot-imx20200520:

- fix Verdin hang
- add pca9450 regulator
- conversion to DM_SERIAL
- NAND block handling
- fix crypto
- enable cache on some boards
- add ACC board (MX6)
2022-05-23 09:25:39 -04:00
Marek Vasut
4d573d5c98 ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-23 11:37:58 +02:00
Marek Vasut
9d371e5fea ARM: imx: mx5: Convert MX53 Menlo board to DM I2C and DM RTC
Convert the board to DM I2C and DM RTC. This leads to removal of board
side iomuxc configuration, which is now done using pin control driver,
and conversion of board side legacy I2C accessors to DM ones.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2022-05-23 11:37:58 +02:00
Philip Oberfichtner
bd8df1f7dd ARM: imx6: Adapt device tree selection in DH board file
Before this commit device tree selection could rely solely on
differentiating the iMX6 processor variant Q and DL. After adding two new
carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs
makes this approach infeasible.

It is now required to specify the carrier board (dhcom-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-05-20 12:36:49 +02:00