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microblaze: cache: improve icache Kconfig options

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Replace CONFIG_ICACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports
the "wic" (Write to Instruction Cache) instruction. It will be used to
guard "wic" invocations in microblaze cache code.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Ovidiu Panait 2022-05-31 21:14:27 +03:00 committed by Michal Simek
parent ef0a592ae8
commit 8daf89678e
3 changed files with 14 additions and 7 deletions
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4
arch/microblaze/Kconfig
View file

@ -39,10 +39,6 @@ config TARGET_MICROBLAZE_GENERIC
endchoice
config ICACHE
bool "Enable icache support"
default y
source "board/xilinx/Kconfig"
source "board/xilinx/microblaze-generic/Kconfig"

6
arch/microblaze/cpu/cache.c
View file

@ -58,14 +58,14 @@ void flush_cache(ulong addr, ulong size)
{
int i;
for (i = 0; i < size; i += 4) {
asm volatile (
#ifdef CONFIG_ICACHE
if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WIC)) {
asm volatile (
"wic %0, r0;"
#endif
"nop;"
:
: "r" (addr + i)
: "memory");
}
if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) {
asm volatile (

11
board/xilinx/microblaze-generic/Kconfig
View file

@ -74,4 +74,15 @@ config SPL_XILINX_MICROBLAZE0_USE_WDC
bool
default XILINX_MICROBLAZE0_USE_WDC
config XILINX_MICROBLAZE0_USE_WIC
bool "MicroBlaze wic instruction support"
default y
help
Enable this option if the MicroBlaze processor is configured with
support for the "wic" (Write to Instruction Cache) instruction.
config SPL_XILINX_MICROBLAZE0_USE_WIC
bool
default XILINX_MICROBLAZE0_USE_WIC
endif