Commit graph

235 commits

Author SHA1 Message Date
Darwin Rambo
de351d6be6 lib: time: add weak timer_init() function
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
2014-01-24 16:59:06 -05:00
Masahiro Yamada
e5c5301f14 Makefile: make directories by Makefile.build
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17 14:11:31 -05:00
Masahiro Yamada
3bddafaab4 Makefile: convert makefiles to Kbuild style and delete grep switch
We have converted all makefiles needed to build $(LIBS).

Until this commit we used to grep switch so that U-Boot style
and Kbuild style makefiles coexist.
But we do not need any more.

Goint forward, use always Kbuild style Makefile when adding
a new Makefile

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-01 11:42:13 -04:00
Masahiro Yamada
a79854a90f board: arm: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@ti.com>
2013-11-01 11:42:12 -04:00
Mateusz Zalega
16297cfb2a usb: new board-specific USB init interface
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.

New API allows selective initialization of USB controllers whenever needed.

Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
2013-10-20 23:42:40 +02:00
Tom Rini
c2120fbfbc Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.

Conflicts:
	board/sandburst/common/ppc440gx_i2c.c
	board/sandburst/common/ppc440gx_i2c.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:24 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Simon Glass
1f2ba722ac tegra: i2c: Enable new CONFIG_SYS_I2C framework
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
2013-07-23 08:34:55 +02:00
Stephen Warren
d035fcf9b6 ARM: tegra: enable LCD panel on Ventana
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11 14:15:16 -07:00
Stephen Warren
b46694df84 ARM: tegra: enable LCD panel on Harmony
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11 14:15:16 -07:00
Jim Lin
7e44d9320e ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114
Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11 14:15:15 -07:00
Jim Lin
56867d88c4 ARM: Tegra: FDT: Add USB EHCI function for T30/T114
Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11 14:15:15 -07:00
Tom Warren
dcfe863838 Tegra: T30: Beaver: Fix board/board_name env vars, s/b beaver, not cardhu
Did a 'strings u-boot-dtb-tegra.bin | less' and saw that both
board and board_name == beaver. Didn't test as I have no T30
Beaver board here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 12:58:41 -07:00
Tom Warren
601795462a Tegra: T30: Beaver board support.
Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
Add a Beaver build so it can begin to be differentiated, if need be.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 16:13:51 -07:00
Tom Warren
49493cb714 Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:38 -07:00
Tom Warren
6d9ea159e4 Tegra114: MMC: Add SD bus power-rail init routine
T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Tom Warren
2a04a31791 Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup
before the MMC driver is added.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Tom Warren
e9cd20654c Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
af77fdb2ce tegra114: dalmore: fdt: enable dalmore SPI controller
Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
78f47b7353 spi: add common fdt SPI driver interface
Add a common interface to fdt based SPI drivers.  Each driver is
represented by a table entry in fdt_spi_drivers[].  If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:06 -07:00
Allen Martin
ff1da6fb5f tegra: spi: rename tegra SPI drivers
Rename tegra SPI drivers to tegra20_flash and tegra20_slink in
preparation for commonization and addition of tegra114_spi.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Allen Martin
9000652da0 tegra: remove support for UART SPI switch
This feature was only used for tegra20 seaboard that had a pinmux
conflict on the SPI pins.  These boards were never manufactured, so
remove this support to clean up SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:05 -07:00
Tom Warren
477393e787 Tegra114: Dalmore: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().

Currently, no padcfg entries exist. SDIO3CFG will be added when the
MMC driver is added as per the TRM to work with the SD-card slot on
Dalmore E1611.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:49:14 -07:00
Tom Warren
5647c03431 Tegra114: fdt: Move aliases from dtsi to dts file as per other Tegras
All other Tegra boards have their alias nodes in the .dts file

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:49:07 -07:00
Tom Warren
f31a5443a8 Tegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bits
The pinmux code issues a warning if the caller attempts to disable the
lock bit in a pinmux register, since this is impossible (once it's
locked, the only way to unlock it is to reset the device/pmt controller).

The I2C/DDC/CEC/USB macros expect a lock setting to be passed in,
and the previous setting of DISABLE caused the pinmux table parsing
code to issue the warning. Changing the lock bits in these table
entries to DEFAULT (i.e. don't touch it) fixes this.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:48:55 -07:00
Tom Warren
190be1f9b7 Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines
T30 requires specific SDMMC pad programming, and bus power-rail bringup.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:44 -07:00
Tom Warren
1baa4e72c6 Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:44 -07:00
Tom Warren
8ca79b2ff4 Tegra30: Cardhu: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().

Currently, only SDIO1CFG is changed as per the TRM to work with
the SD-card slot on Cardhu.

Thanks to StephenW for the suggestion/original idea.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:43 -07:00
Tom Warren
8b7776b9f9 Tegra114: pinmux: Update pinmux tables & code, fix a bug w/SDMMC3 init
Use the latest tables & code from our internal U-Boot repo.
The SDMMC3_CD, CLK_LB_IN and CLK_LB_OUT offsets in the pingroup
table were off by a few indices, causing the pinmux init code to
write bad data to the PINMUX_AUX_ regs. This also enabled the lock
bit, which made it impossible to reconfig the pads correctly for
SDMMC3 (SD card on Dalmore) operation. Also fixes SPI_CS2_N,
USB_VBUS_EN0, HDMI_CEC and UART2_RXD/TXD muxes.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:43 -07:00
Tom Warren
bb638bb756 Tegra30: Cardhu: Remove unneeded cardhu.c.mmc file
This was an older debug/developmental file that got added
accidentally. Not needed/used in any Cardhu build.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:43 -07:00
Tom Warren
527519ae69 Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)
Minor edits to clock, apbdma and SPI, make I2C match kernel DT, and add gpio

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:43 -07:00
Tom Warren
73bb244394 Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files
Not used, and wrong in Cardhu's case

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
c9aa831ee2 Tegra: MMC: Add DT support to MMC driver for all T20 boards
tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
Tested on Seaboard, fully functional.

Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
126685ad44 Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Linux dts files were used for those boards that didn't already
have sdhci info populated. Tamonten has their own dtsi file with
common sdhci nodes (sourced from Linux).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
6c5be646b4 Tegra: fdt: Change /include/ to #include for C preprocessor
dts Makefile has the arch & board include paths added to DTS_CPPFLAGS.
This allows the use of '#include "xyz"' in the dts/dtsi file which
helps the C preprocessor find common dtsi include files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
b77c3547e8 Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:41 -07:00
Lucas Stach
7ae18f3725 tegra: usb: move implementation into right directory
This moves the Tegra USB implementation into the drivers/usb/host
directory. Note that this merges the old
/arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code
changes, just moving stuff around.

v2: While at it also move some defines and the usb.h header file to make
usb driver usable for Tegra30.
NOTE: A lot more work is required to properly init the PHYs and PLL_U on
Tegra30, this is just to make porting easier and it does no harm here.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-03-14 11:06:41 -07:00
Tom Warren
07067145de Tegra114: Add/enable Dalmore build (T114 reference board)
This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:26 -07:00
Tom Warren
94829195ac Tegra114: Add generic Tegra114 build support
This patch adds basic Tegra114 (T114) build support - no specific
board is targeted.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:26 -07:00
Tom Warren
8aff009585 Tegra114: Dalmore: Add DT files
These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:25 -07:00
Allen Martin
b19f57491a tegra: add SPI SLINK driver
Add driver for tegra SPI "SLINK" style driver.  This controller is
similar to the tegra20 SPI "SFLASH" controller.  The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices.  In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH.  Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.

This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings.  Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.

To enable this driver, use CONFIG_TEGRA_SLINK

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:25 -07:00
Allen Martin
23e3158f34 tegra30: fdt: add SPI SLINK nodes
Add tegra30 SPI SLINK nodes to fdt.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:24 -07:00
Allen Martin
36068ae75e tegra: fdt: add back missing host1x node
Add back host1x node to seaboard dts file.  This got dropped during
the tegra fdt sort.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:23 -07:00
Allen Martin
b7723f3f30 tegra: fdt: sort dts files
Sort nodes in dts files according the the following rules:

1) Any nodes that already exist in any /include/d file, in the order
they appear in the /include/d file.

2) Any nodes with a reg property, in order of their address.

3) Any nodes without a reg property, alphabetically by node name.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-17 09:07:34 -07:00
Allen Martin
d3f8752ed6 tegra: fdt: remove clocks nodes
These nodes are unused.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-17 09:07:23 -07:00
Allen Martin
d08b9e9c7e tegra: remove IRDA pinmux synonym
IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this
synonym and replace with UARTB to disambiguate.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
083bbbbe77 Tegra30: fdt: Update DT files with I2C info for T30/Cardhu
Note that T30 does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
DVC_I2C is still used to designate the controller intended for
power control (PWR_I2C in the schematics). On Cardhu, it's used
to access the PMU and EEPROM, as well as the audio codec, temp
sensor, and fuel gauge devices from the OS.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
f01b631f7d Tegra30: Add/enable Cardhu build (T30 reference board)
This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.

include/configs/tegra-common.h now holds common config options
for Tegra SoCs.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
6d6c0baebe Tegra30: Add generic Tegra30 build support
This patch adds basic Tegra30 (T30) build support - no specific
board is targeted.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
79ce91bade Tegra30: Cardhu: Add DT files
These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Marc Dietrich
716d943983 tegra: display: add board pinmux
Boards may require a different pinmux setup for DISPALY than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:07 -07:00
Stephen Warren
72573543b5 ARM: tegra: enable 8-bit SD slots in board files
Harmony contains an SD slot with all 8 bits routed. This allows plugging
in an eMMC-chip-in-SD-form-factor.

Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits
hooked up.

Now that the U-Boot eMMC code fully supports 8-bit operation, initialize
those ports as 8-bit instead of 4-bit to improve performance.

Whistler was already registering its ports as 8-bit.

TrimSlice doesn't have any 8-bit ports.

I don't have any Avionic Design boards nor the Colibri board to test with.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:42 -07:00
Simon Glass
77139f5170 tegra: fdt: Add LCD definitions for Seaboard
The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:39 -07:00
Simon Glass
1b24a50b44 tegra: Add LCD support to Nvidia boards
Add calls to the LCD driver from Nvidia board code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:37 -07:00
Simon Glass
e1ae0d1f71 tegra: Add support for PWM
The pulse width/frequency modulation peripheral supports generating
a repeating pulse. It is useful for controlling LCD brightness.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:36 -07:00
Stephen Warren
a2ab6b7d32 ARM: tegra: don't request GPIO from Seaboard's SPL
Seaboard has a GPIO that switches an external mux between Tegra's debug
UART and SPI flash. This is initialized from the SPL so that SPL debug
output can be seen. Simplify the code that does this, and don't actually
request the GPIO in the SPL; just program it. This saves ~4.5K from the
size of the SPL, mostly BSS due to the large gpio_names[] table that is
no longer required. This makes Seaboard's SPL fit within the current max
size.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
da1f735272 ARM: tegra: select between Seaboard/Ventana at compile time
Seaboard and Ventana are very similar boards, and so share the seaboard.c
board file. The one difference needed so far is detected at run-time by
calling machine_is_ventana(). This bloats the Ventana build with code
that is never used. Switch to detecting Ventana at compile time to remove
bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit
within the max size.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
56f42f85f5 ARM: tegra: Whistler: remove unused USB alias
Port USB1 on Whistler is intended as a device port for USB recovery.
Whistler's DT currently contains an alias for this USB port, even though
Whistler's config doesn't enable multiple USB controllers, so the alias
is unused. Remove the unused alias for consistency for now. Similar,
explicitly disable the port in the device tree too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
699c40e878 ARM: tegra: Harmony: enable ULPI USB port
The ULPI port is routed onto pins on the mini PCI Express connector. A
standard breakout board may be used to access the port.

* Add required DT entries to configure the ULPI port.
* Setup up the ULPI pinmux in the board code.
* Enable multiple USB controller and ULPI support in the board config.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Marc Dietrich
73286d8729 tegra: move common features to a common makefile
For Non-Nvidia boards to include newly added features (like emc clock
scaling) it would be necessary to add each feature to their own board
Makefile. This is because currently the top Makefile automaticly includes
these features only for Nvidia boards.

This patch adds a simple Makefile include so all new features become
available for non-Nvidia board vendors.

Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Lucas Stach
c0720afbb5 tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
516f00b324 tegra: clean up board include hell
The prototypes used in board files were all scattered out, which lead to
code duplication between SPL and normal U-Boot and some prototypes not actually
being used. Consolidate this in a common board header.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Lucas Stach
0cd10c7abf tegra20: rework UART GPIO handling
Rename board provided gpio_config_uart() to
gpio_early_init_uart() as it does the same thing as the equally
called function provided by the uart-switch code. This allows
to simply call this function in early board init whether or not
we are building with CONFIG_UART_SWITCH defined.

Also provide a weak symbol for this function, to avoid the
need to provide this function for boards that don't need any
fixup.

This patch supersedes the earlier posted
"tegra: convert gpio_config_uart to weak symbol".
Build tested with MAKEALL -s tegra20

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Tom Warren
29f3e3f248 Tegra: Change Tegra20 to Tegra in common code, prep for T30
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-10 13:01:24 -07:00
Stephen Warren
cf46cdebdd ARM: tegra: fix Ventana standalone build
Ventana always pulls in files from the Seaboard directory, so needs to
mkdir $(obj)../seaboard unconditionally. This fixes:

git clean -f -d -x
./MAKEALL ventana

"MAKEALL -s tegra20" passes without this change, because Seaboard
happens to be built before Ventana, and hence the directory has already
been created.

I believe the mkdir is only needed for out-of-tree builds, since the
seaboard directory is part of the source tree. However, since we always
build an SPL for Tegra now, which I believe is effectively an out-of-tree
build, we will always need this at some time. The overhead of just
uncondtionally executing the mkdir is minimal, and simplifies the
Makefile, since we don't need to code up the exact minimal condition to
execute the mkdir.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:32 -07:00
Stephen Warren
3aa7a6a635 ARM: tegra: remove redundant mkdirs from board Makefiles
None of harmony, seaboard, ventana, whistler directly build files from
../common/, so there's no need to mkdir the obj directory for such files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Stephen Warren
9614a1e963 tegra: enable NAND on Harmony
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
7cedd1811a tegra: fdt: Add NAND definitions to fdt
Add a flash node to handle the NAND, including memory timings and
page / block size information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:30 -07:00
Allen Martin
a49716aa7c tegra20: move SDRAM param save to later in boot
Move warmboot_save_sdram_params() to later in the boot sequence.  This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:22 +02:00
Allen Martin
45ec5b2579 tegra20: remove timer_init from SPL build
Don't use timer_init from tegra board.c.  This comes out of arm720t
for the SPL build.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
Allen Martin
00a2749d7b tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
Stephen Warren
e028494887 tegra: add pin_mux_spi() board initialization function
Boards can override this to set up the pinmux correctly to access serial
flash.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:33 +02:00
Tom Warren
1e2d785975 tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2012-07-09 22:44:32 +02:00
Thierry Reding
cb7a1cf36a tegra: Allow boards to perform early GPIO setup
The new gpio_early_init() function, which does nothing by default, can
be overridden by boards to configure GPIOs at an early stage.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Tom Warren
3f82d89d3d mmc: tegra2: rename tegra2_mmc.* to tegra_mmc.*
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Tom Warren
edffa63d3d spi: tegra2: rename tegra2_spi.* to tegra_spi.*
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Stephen Warren
b1b9e4ce3a tegra: ventana: add own device tree, enable USB
Add a device tree for Ventana; the Seaboard file no longer represents
the HW present on Ventana.

Enable USB on Ventana.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Stephen Warren
f3d93309c1 tegra: harmony: add device tree support
... to enable USB host support, which enables Ethernet support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Stephen Warren
d5ebc937c9 tegra: Whistler board support
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:

E1120 motherboard
E1108 CPU board
E1116 PMU board

The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.

Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:17 +02:00
Tom Warren
078078cfa9 spi: Tegra2: Seaboard: fix UART corruption during SPI transactions
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
2012-07-07 14:07:17 +02:00
Anton Staff
c3ab91f064 tegra: fdt: Add keyboard definitions for Seaboard
Seaboard uses a QUERTY keyboard. We add key codes for this to
enable key scanning to work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Simon Glass
d376e8d228 tegra: fdt: Add EMC data for Tegra2 Seaboard
This adds timings for T20 and T25 Seaboards, using the bindings found here:

http://patchwork.ozlabs.org/patch/132928/

We supply both full speed options for normal running, and half speed options
for testing / development.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Jimmy Zhang
c5b34a29ac tegra: Add EMC settings for Seaboard
Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Wei Ni
5aff021c61 tegra: Turn off power detect in board init
Tegra core power rail has leakage voltage around 0.2V while system in
suspend mode. The source of the leakage should be coming from PMC power
detect logic for IO rails power detection.
That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0'
to PWR_DET (APBDEV_PMC_PWR_DET_0).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Simon Glass
67ac5797ad tegra: Set up warmboot code on Nvidia boards
Call the function to put warmboot boot in a suitable place for resume.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Simon Glass
8723626dd9 tegra: Set up PMU for Nvidia boards
Adjust PMU to permit maximum frequency operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Simon Glass
3682cc3d2c tegra: i2c: Select I2C ordering for Seaboard
Select the port ordering for I2C on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:50 +02:00
Simon Glass
cb445fb4cc tegra: i2c: Initialise I2C on Nvidia boards
This enables I2C on all Nvidia boards including Seaboard and
Harmony.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:50 +02:00
Simon Glass
f10393e501 tegra: usb: Add USB support to nvidia boards
This adds basic USB support for port 0. The other port is not supported
yet.

Tegra2 (SeaBoard) # usb start
(Re)start USB...
USB:   Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 5 USB Device(s) found
       scanning bus for storage devices... 1 Storage Device(s) found
Tegra2 (SeaBoard) # ext2load usb 0:3 10000000 /boot/vmlinuz
Loading file "/boot/vmlinuz" from usb device 0:3 (ROOT-A)
2932976 bytes read

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:49 +02:00
Simon Glass
1920172ec8 tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
We set up two USB ports, one of which can be host or device.
For some reason the kernel version does enable both ports.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:48 +02:00
Simon Glass
cd474cbae6 tegra: fdt: Add clock bindings for Tegra2 Seaboard
Add the definition of the oscillator clock frequency and the 32KHz clock.
The latter is provided by a PMIC on I2C which we don't actually use at
present, but we expect this definition to be used in the kernel and want
to keep our .dts the same.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:48 +02:00
Simon Glass
6710b5b5fd tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:47 +02:00
Simon Glass
ca28090d21 tegra: Use funcmux for MMC on seaboard
Use the new funcmux_select() feature to set up the MMC pin mux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Simon Glass
e712e54518 tegra: Use funcmux for MMC on harmony
Use the new funcmux_select() feature to set up the MMC pin mux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Thierry Reding
a747cc0a8c tegra2: Optimize out-of-tree build for Ventana.
As proposed by Mike Frysinger, mkdir can take more than one argument.
Instead of spawning two processes, create both the common and seaboard
directories in one go.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Simon Glass
f46a945653 tegra: Move boards over to use arch-level board UART function
Now that we can set up the UART in common tegra code, make the boards
use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Simon Glass
905ed41aad tegra: Move clock_early_init() to arch_cpu_init()
The clock init is not board specific, so move it into
the cpu code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Simon Glass
ccdd6eaecb tegra: Move cpu_init_cp15() to arch_cpu_init()
This call is more of an architecture requirement than a board
one, so move it there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Tom Warren
5b37bd3afd arm: Tegra: Fix Harmony and Ventana builds in u-boot-tegra/master
Seaboard changes have removed the need for common/board.o in the
Makefile. Propagate this change to the other Tegra2 builds.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Thierry Reding
977a39e600 tegra2: Move tegra2_mmc_init() prototype to public header.
tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of
the Tegra2-based boards will need to call it, this commit exports it in
the new public asm/arch/mmc.h header file to prevent each board from
providing its own prototype.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00
Simon Glass
a04eba99f5 tegra2: Plumb in SPI/UART switch code
On Seaboard the UART and SPI interfere with each other. This causes the UART
to receive spurious zero bytes after SPI transactions and also means that
SPI can corrupt a few output characters when it starts up if they are still
in the UART buffer.

This updates the board to use the SPI/UART switch to avoid the problem.

For now this feature is turned off since it needs changes to the NS16550
UART to operate.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00
Simon Glass
cb93481268 tegra2: Implement SPI / UART GPIO switch
The Tegra2 Seaboard has the unfortunate feature that SPI and the console
UART are multiplexed on the same pins. We need to switch between one
and the other during SPI and console activity.

This new file implements a switch and keeps track of which peripheral
owns the pins. It also flips over the controlling GPIO as needed

Since we are adding a second file to board/nvidia/common, we create
a proper Makefile there and remove the direct board.o include from
board/nvidia/seaboard/Makefile

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00
Tom Warren
9112ef8d89 tegra2: spi: Add SPI driver for Tegra2 SOC
This driver supports SPI on Tegra2, running at 48MHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-12-24 10:23:30 +01:00
Simon Glass
1be0d75973 tegra2: Add UARTB support
UARTB is used on some boards, so support it here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:30 +01:00
Simon Glass
6b5763e588 tegra2: Tidy UART selection
UART selection is done with a lot of #ifdefs. This cleans things up
a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:30 +01:00
Thierry Reding
67c2cb1e69 tegra2: Fix out-of-tree build for Ventana.
Since Ventana is derived from Seaboard and requires seaboard.c to build,
make sure board/nvidia/seaboard is created in the build tree.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Wolfgang Denk <wd@denx.de>
2011-12-22 08:36:09 +01:00
Simon Glass
831a077f11 tegra2: Enable instruction cache
Since low-level init is skipped, the instruction cache is never enabled on
Tegra2. This explicitly calls this initialization as soon as the A9 is
initialized.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:09 +01:00
Simon Glass
e43d6ed932 tegra2: Add arch_cpu_init() to fire up Cortex-A9
We want to move away from a special Tegra2 start-up, and just use
arch_cpu_init() instead. However, if we run board_init_f() from boot
we need to build it for ARMv4T, since the Tegra's AVP start-up CPU
does not support ARMv7.

The effect of this is to do the AVP init earlier, and in
arch_cpu_init(), rather that board_early_init_f().

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:08 +01:00
Stephen Warren
5fac236a97 tegra2: Use new GPIO APIs in gpio_config_uart()
... rather than open-coding the register accesses.

However, gpio_request() typically stores the "label" parameter in a global
data structure. This causes problems when called from gpio_config_uart(),
since the code is running before relocation. To solve this, pass a NULL
string to gpio_request(), and modify gpio_request() not to touch the string
if it's NULL.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:08 +01:00
Stephen Warren
d5ef19b9b3 tegra2: Add support for Ventana
Ventana is a board which is very similar to Seaboard. Support it by
re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.

v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets.
v6: Make gpio_config_uart_seaboard() static.
v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so
    he asked me to add myself for this board.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:08 +01:00
Stephen Warren
9877841f6b tegra2: Modify MMC driver to handle power and cd GPIOs
Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and
modify that function to perform all required GPIO initialization. This
removes the need for board files to perform these operations.

Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which
GPIOs to use.

Update affected call-sites in seaboard.c and harmony.c. Note that this
change should make all SD ports work on Harmony, since the required GPIO
setup is now being performed.

v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change.
    Remove prototype of gpio_config_mmc() from board.h

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Andy Fleming <afleming@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:08 +01:00
Stephen Warren
ae03661fda tegra2: Move board_mmc_init into board files
For Seaboard, this is mostly a cut/paste of board_mmc_init() and
pin_mux_mmc() into seaboard.c; pin_mux_mmc() was modified to add some
missing pinmux_tristate_disable calls for the GPIOs.

For Harmony, those functions were modified to configure SDMMC2 (index 2)
instead of SDMMC3 (index 1), since that's what is present on the board.

However, harmony.c is still missing the required GPIO setup, so neither
port is likely to function correctly yet.  This will be fixed in the next
change.

v4: Include board.h to prototype tegra2_mmc_init().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-09 17:30:08 +01:00
Stephen Warren
de71fbe468 tegra2: Move MMC clock initialization into MMC driver
This centralizes knowledge of MMC clocking into the MMC driver. This also
removes clock setup from the board files, which will simplify later changes
that modify the Harmony board to support the correct set of MMC controllers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Andy Fleming <afleming@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2011-11-03 02:15:00 -05:00
Tom Warren
ccf7988b9a tegra2: Enable MMC for Seaboard
This adds the required GPIO and pinmux configuration to make eMMC / SD work
on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
20e18e051f tegra2: Add more pinmux functions
This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.

Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
c3cf49d247 tegra2: Rename PIN_ to PINGRP_
The pin groupings are better named PINGRP, since on Tegra2 they refer to
multiple pins.

Sorry about this, but better to get it right now when there is only a small
amount of code affected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
4ed59e70e4 tegra2: Add more clock functions
This adds most of the clock functions required by board and driver code:

-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control

These functions are plumbed in as required.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
3e00dbdf24 tegra2: Clean up board code a little
This removes clock_init() and pinmux_init() which are names better suited
to those respective modules. By moving board_init_f() to the bottom of the
file we can remove the need for so many functions in the board.h header file.

The only clock/pinmux/gpio init we need to do prior to relocation is
for the UART.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Simon Glass
03c609f69b tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.

This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
2011-10-27 21:56:29 +02:00
Mike Frysinger
26ddff2d8d build: add missing $(AR)->$(cmd_link_o_target) update
Seems people fixed their files to use libfoo.o, but didn't actually
update the creation targets to use $(cmd_link_o_target).  Update the
rest of the Makefile's found with grep.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Simon Glass <sjg@chromium.org>
2011-10-22 01:18:41 +02:00
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
Che-liang Chiou
10980d4a54 arm: tegra2: fix out-of-tree build
The out-of-tree build fails because the Makefiles in question depend on
source files of another directory but do not explicitly mkdir that
directory.

As a matter of fact, other Makefiles under board/*/ directory that refer
to source files under another directory explicitly call mkdir.

This patch adds explicit mkdir's to the Makefiles in question, and
verifies that out-of-tree build is working.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2011-09-07 22:03:53 +02:00
Simon Glass
d07dc4993d Tegra2: Use clock and pinmux functions to simplify code
Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
858bd095e1 Tegra2: Add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
b4ba2be8dc Tegra2: Add more clock support
This adds functions to enable/disable clocks and reset to on-chip peripherals.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Igor Grinberg
221a0666db arm: nvidia and smdk6400: use common code for machine type
NVIDIA boards and Samsung SMDK6400 already use a local variant of
CONFIG_MACH_TYPE option.
Switch to use the new common code.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-09-03 22:40:45 +02:00
Graeme Russ
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
Tom Warren
21ef6a109c mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:28:56 -05:00
Tom Warren
f4ef66685a arm: Tegra2: Move clk/mux init to board_early_init_f, add GPIO init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:10 +02:00
Tom Warren
74652cf684 arm: Tegra2: add support for A9 CPU init
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-04-27 19:38:09 +02:00
Wolfgang Denk
14666418e9 Coding Style cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-03-27 21:48:08 +02:00
Tom Warren
ee4bbbcb65 arm: Tegra2: Add support for NVIDIA Seaboard board
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:55 +01:00
Tom Warren
efc05ae131 arm: Tegra2: Add support for NVIDIA Harmony board
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:55 +01:00
Tom Warren
3f82b1d3ab arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:54 +01:00