Commit graph

36 commits

Author SHA1 Message Date
Kishon Vijay Abraham I
6f1af1e358 board: ti: invoke clock API to enable and disable clocks
invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:22 -04:00
Kishon Vijay Abraham I
03c128c949 board: ti: remove duplicate initialization of vbus_id_status
vbus_id_status is initialized in board_usb_init. So remove it
while creating dwc3_device objects.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Tom Rini
7c352cd38d am33xx: Re-enable SW levelling for DDR2
The recent changes for hw leveling on am33xx were not intended for
DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
value to check against. This lets us pass in the value we would use to
configure, when we have not yet configured the board yet.  In other cases
update the call to be as functional as before and check an already
programmed value in.

Tested-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-06-15 10:57:26 -04:00
Joe Hershberger
0adb5b761f net: cosmetic: Name ethaddr variables consistently
Use "_ethaddr" at the end of variables and drop CamelCase.
Make constant values actually 'const'.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:32 -06:00
Kishon Vijay Abraham I
2d48aa69bd usb: modify usb_gadget_handle_interrupts to take controller index
Since we support multiple dwc3 controllers to be existent at the same
time, in order to handle the interrupts of a particular dwc3 controller
usb_gadget_handle_interrutps should take controller index as an
argument.

Hence the API of usb_gadget_handle_interrupts is modified to take
controller index as an argument and made the corresponding changes to all
the usb_gadget_handle_interrupts calls.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:11 +02:00
Kishon Vijay Abraham I
9f81eb77ea board: ti: AM43xx: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in am43xx board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:11 +02:00
Felipe Balbi
403d70abd9 board: ti: am43xx: add support for AM43xx Industrial Development Kit
AM43xx Industrial Development Kit is a new board
based on AM437x line of SoCs. Targetted at Industrial
Automation applications, it comes with EtherCAT, motor
control and other goodies.

Thanks to James Doublesin for all the help.

Cc: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-01-13 15:26:10 -05:00
Felipe Balbi
d5c082a32d board: ti: am43xx: take care of all OPPs
Make sure that all OPPs are checked on
scale_vcores(). While at that also fix 600MHz
VDD_MPU voltage according to AM437x Data Manual
available at [1].

Table 5-3 on that document, lists all valid
voltages per frequency.

[1] http://www.ti.com/lit/ds/symlink/am4379.pdf

Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-01-13 11:53:40 -05:00
Felipe Balbi
068ea0a8a8 board: ti: am43xx: replace if else if else with a switch
A switch statement fits better in this case,
specially considering we have a few extra
frequencies to use.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-01-13 11:53:39 -05:00
James Doublesin
c87b6a96ac arm: am437x: Correct PLL frequency for 25MHz
The frequencies for 25MHz in dpll_per were out of spec for 25MHz,
correct.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-01-13 11:53:39 -05:00
James Doublesin
fc46bae2ae arm: am437x: Enable hardware leveling for EMIF
Switch to using hardware leveling for certain parameters on the EMIF
rather than using precalculated values.  Doing this also means we have a
common place now between am437x and am335x for setting
emif_sdram_ref_ctrl with a value for the correct delay length.

Tested-by: Felipe Balbi <balbi@ti.com>
Tested-by: Tom Rini <trini@ti.com>
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-01-13 11:53:39 -05:00
James Doublesin
e2a6207bcc arm: am437x: PLL values for all input frequencies
Need to provide PLL values for all possible input frequencies (19.2, 24,
25, 26MHz). Values provide are also optimized for jitter (needed
especially for PER PLL and DDR PLL).

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-01-13 11:53:39 -05:00
pekon gupta
e53ad4b445 board/ti/am43xx: add support for parallel NAND
This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.

am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
  time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
  controlled by:
  (a) Statically using Jumper on connecter (J89) present on board.
  (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
      by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
      SPI2_CS0 == 0: NAND (default)
      SPI2_CS0 == 1: eMMC

am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
  Thus only one of the two can be used at a time. Selection is controlled by:
  (a) Dynamically driving following GPIO pin from software
      GPMC_A0(GPIO) == 0 NAND is selected (default)

NAND device (MT29F4G08AB) on these boards has:
 - data-width=8bits
 - blocksize=256KB
 - pagesize=4KB
 - oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-08-25 10:48:12 -04:00
Albert ARIBAUD
b1cdd8baa1 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-07-28 12:26:21 +02:00
Tom Rini
7aa5598aac tps65218/am43xx_evm: Add power framework support to TPS65218
Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.

Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-07-25 15:21:06 -04:00
Cooper Jr., Franklin
8038b497e7 am43xx: Tune the system to avoid DSS underflows
* This is done by limiting the ARM's bandwidth and setting DSS priority in
  the EMIF controller to ensure underflows do not occur.
2014-07-07 19:42:34 -04:00
Franklin S. Cooper Jr
2c95211167 am43xx: Update EMIF DDR3 Configuration for AM43x GP
* Boot failures have been discovered due to a combination of routing issues and
  non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
  different timings are required for alpha, beta and production boards.

Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
2014-07-07 19:42:34 -04:00
Felipe Balbi
619ce62d2d board: ti: am43xx: add AM437x SK PHY Address
pass correct PHY Address when running on SK
so that we have working ethernet with this board
too.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Felipe Balbi
9cb9f3331b board: ti: am43xx: add support for AM43xx Starter Kit
AM43xx Starter Kit is a new board based on
AM437x line of SoCs. Being a low-cost EVM and
small size EVM are intended to provide an entry
level development platform on a full fledged
Hardware System.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Felipe Balbi
d51e5aeff6 board: ti: am43xx: print unsupported board name
when porting u-boot to a new am43xx board, it
helps to know the name of the current unsupported
board so we don't have to hunt for design documents
to figure out what's written in the EEPROM.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19 17:53:58 -04:00
Tom Rini
83bad1026b arm:am43xx: Add TPS65218 support to scale voltages up
This family is supported by the TPS65218 PMIC.  Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Tom Rini
feca6e676e am43xx: Only read the MPU frequency bits of CTRL_DEV_ATTR
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Sourav Poddar
7a5f71bc40 am43xx_evm: Add qspiboot target
The ePOS EVM and EVM SK have QSPI as an option to boot.  Add a qspiboot
target that utilizes QSPI for env and so forth as an example of best
practices.  As QSPI is booted from directly we need to chang
CONFIG_SYS_TEXT_BASE.

Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices
we need to handle that elsewhere, once NAND support is also added.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:12 -04:00
Mugunthan V N
3a3939bf3d ARM: AM43xx: Add Ethernet boot support to SPL
Add Ethernet Boot support to SPL

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-03-04 09:42:07 -05:00
Lokesh Vutla
e27f2dd721 ARM: AM4372: Update EMIF registers for DDR3
Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD
registers.
In EMIF_PHY_CTRL:
Updating [4:0]READ_LATENCY to 8, because at higher frequencies like
400MHz the read latency expected will be CL+3 as per tests from HW
folks.
Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug
purpose. With out this resume is not working(Still waiting for PHY team
to come back for better explanation).

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-03-04 09:42:07 -05:00
Mugunthan V N
4cdd7fda91 ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVM
Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected
to RMII and RGMII phy respectively and enable cpsw in config.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-03-04 09:42:06 -05:00
Dave Gerlach
cd8341b7eb ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-21 13:55:40 -05:00
Lokesh Vutla
0df8afdf10 ARM: AM43xx: Enable DDR dynamic IO power down for DDR3
This patch enables dynamically powering down the
IO receiver when not performing a read on DDR3 board.
This optimizes both active and standby power consumption.
This is derived from a patch that is done on AM335x[1]

[1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-01-24 11:38:39 -05:00
Lokesh Vutla
b5e01eecc8 ARM: AM43xx: GP_EVM: Add support for DDR3
GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
Adding details for the same.
Below is the brief description of DDR3 init sequence(SW leveling):
-> Enable VTT regulator
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program leveling registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18 21:14:45 -05:00
Lokesh Vutla
d3daba10f1 ARM: AM43xx: EPOS_EVM: Add support for LPDDR2
AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
Adding LPDDR2 init sequence and register details for the same.
Below is the brief description of LPDDR2 init sequence:
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
-> Wait till initialization is complete and the configure MR registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18 21:14:44 -05:00
Lokesh Vutla
cf04d0326b ARM: AM43xx: clocks: Update DPLL details
Updating the Multiplier and Dividers value for all DPLLs.
Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value
returned the MPU DPLL is locked.
At different OPPs follwoing are the MPU locked frequencies.
OPP50	300MHz
OPP100	600MHz
OPP120	720MHz
OPPTB	800MHz
OPPNT	1000MHz
According to the latest DM following is the OPP table dependencies:
	VDD_CORE 	VDD_MPU
	OPP50		OPP50
	OPP50 		OPP100
	OPP100		OPP50
	OPP100		OPP100
	OPP100		OPP120
So at different OPPs of MPU it is safest to lock CORE at OPP_NOM.
Following are the DPLL locking frequencies at OPP NOM:
Core locks at 1000MHz
Per locks at 960MHz
LPDDR2 locks at 266MHz
DDR3 locks at 400MHz

Touching AM33xx files also to get DPLL values specific to board but no
functionality difference.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18 21:14:01 -05:00
Sekhar Nori
f4af163e6c ARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support
CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and
CONFIG_BOARD_LATE_INIT is already set. Adding support to detect the
board. These variables are used by findfdt.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18 21:14:00 -05:00
Sekhar Nori
9f1a8cd33f ARM: AM43XX: board: add support for reading onboard EEPROM
Add support for reading onboard EEPROM to enable
board detection.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18 21:14:00 -05:00
Lokesh Vutla
369cbe1e1e ARM: AM43xx: Adapt to ti_armv7_common.h config file
Use ti_armv7_common.h config file to inclde the common
configs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18 21:14:00 -05:00
Lokesh Vutla
3b34ac13fe ARM: AM43xx: clocks: Add dpll and clock data
Add dpll and clock data for AM43xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00
Lokesh Vutla
fbf2728da3 ARM: AM43xx: Add Board files
Add board specific information for AM43xx.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15 08:51:10 -04:00