Commit graph

89 commits

Author SHA1 Message Date
Peng Fan
eb3967388e imx8m: implement armv8_el2_to_aarch32
Add iMX8M specific armv8_el2_to_aarch32 to let AArch64 mode U-Boot
could boot aarch32 mode linux with FIT image as below:

/dts-v1/;

/ {
        description = "Configuration to load ARM32 Linux";

        images {
                kernel@1 {
                        description = "ARM32 Linux kernel";
                        data = /incbin/("./Image");
                        type = "kernel";
                        arch = "arm";
                        os = "linux";
                        compression = "none";
                        load = <0x40008000>;
                        entry = <0x40008000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
                fdt@1 {
                        description = "Flattened Device Tree blob";
                        data = /incbin/("./imx8mm-evk.dtb");
                        type = "flat_dt";
                        arch = "arm";
                        compression = "none";
                        load = <0x43000000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
        };
        configurations {
                default = "config@1";

                config@1 {
                        description = "fsl-imx8mm-evk";
                        kernel = "kernel@1";
                        fdt = "fdt@1";
                };
        };
};

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:48 +08:00
Peng Fan
3c41728d80 imx8m: Refactor the OPTEE memory removal
Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:48 +08:00
Peng Fan
6036dba1c8 imx8m: disable nodes before kernel/mfgtool boot for fused part
To fused part, we need to disable nodes of dtb to let kernel boot.

To mfgtool, USB issue when using super-speed for mfgtool, temporally
work around the problem to use high-speed only.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
2707faf01f imx8mn/imx8mp: override env_get_offset and env_get_location
To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
7a42bf0489 imx8m: power down fused cores
For non-Quad SoCs, the fused cpu cores could be powered down in SPL
to save power.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Ye Li
d1eee7eed9 imx8mp: Add fused parts support
iMX8MP has 6 fused parts in each qualification tier, with core, VPU,
ISP, NPU or DSP fused respectively.

The configuration tables for enabled modules:
MIMX8ML8DVNLZAA          Quad Core, VPU, NPU, ISP, DSP
MIMX8ML7DVNLZAA          Quad Core, NPU, ISP
MIMX8ML6DVNLZAA          Quad Core, VPU, ISP
MIMX8ML5DVNLZAA          Quad Core, VPU
MIMX8ML4DVNLZAA          Quad Lite
MIMX8ML3DVNLZAA          Dual Core, VPU, NPU, ISP, DSP

Add the support in U-Boot

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
2f3c92060d imx8m: workaround ROM serror
ROM SError happens on two cases:

1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.

2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K of ROM is still protected and cause
SError.

Since ROM mask SError until ATF unmask it, so then ATF always meets the
exception. This patch works around the issue in SPL by enabling SPL
Exception vectors table and the SError exception, take the exception
to eret immediately to clear the SError.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
3c9221ad27 imx8m: add eqos clk
Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the
weak function in driver

Add set_clk_eqos to configure eQoS clk

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
3c1c28d4e0 imx8m: add sdhc/nand/ecspi clk api
Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
14254e646d imx8m: configure NoC clk
Configure NoC clk for better system performance

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
46a8a28bf6 imx8m: configure arm clk sources from PLL
A53 CCM root max support 1GHz, to support high freq, we need
to switch ARM clk sources from ARM PLL directly.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:47 +08:00
Peng Fan
a2f143eaac imx8m: soc: use arm_smccc_smc
Use arm_smccc_smc to replace call_imx_sip

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Adam Ford
f36f8bc627 imx: Add support for i.MX8MM Beacon EmbeddedWorks devkit.
Beacon EmbeddedWorks, formerly known as Logic PD, is releasing
a devkit based on the i.MX8M Mini SoC consisting of baseboard +
SOM.

It supports eMMC on the SOM, microSD on the baseboard, various
GPIO, the PINCTRL, and UART.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-10 20:55:20 +02:00
Ye Li
3462b55d17 imx8mp: Set default SNSR25C for TMU probe1
So far u-boot only load SNSR25C for TMU main probe (probe 0). However,
kernel enables two probes. So it also needs to set default SNSR25C of
TCALIV1 for blank samples.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
ebb9aab318 imx: load calibration parameters from fuse for i.MX8MP
i.MX8MP thermal which has two probes and supports temperature range
from -40 to 125.  The driver still uses default 1p HW
calibration at 25C and loads calibration parameters from fuse.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
94c693d782 imx: i.MX8MN: Enable loading TASR and TCALIV from fuse
Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers
value from fuse before enabling TMU calibration. Otherwise the calibration
is not exact.

Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
70487ff386 imx8mm: Load fuse for TMU TCALIV and TASR
On iMX8MM, the default value of TMU registers TCALIV and TASR need
be loaded from fuse. HW won't do this, it expect SW loads them before
using TMU.

Reviewed-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Marek Vasut
b52fb0b0b5 ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQ
Add initial support for Technexion Pico-iMX8MQ SoM on PicoPI carrier
board. Currently working is ethernet, serial, eMMC. DT is imported
from Linux 5.4.28 ("462afcd6e7ea") .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-05-10 13:19:39 +02:00
Alifer Moraes
ef99f3d9e8 arm: imx: Add support for Google's Coral Dev Board
Add initial support for Google's Coral Dev Board based on i.MX8MQ.

https://coral.ai/products/dev-board

The Phanbell naming has been used here to match the naming convention
used in Google's U-Boot source tree:

https://coral.googlesource.com/uboot-imx/

Co-developed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Tested-by: Marco Franchi <marcofrk@gmail.com>
2020-05-01 13:49:15 +02:00
Claudius Heine
c5635a032a ARM: imx8m: Don't use the addr parameter of reset_cpu()
imx8m has the only implementation of reset_cpu() which does not ignore
the addr parameter and instead gives it some meaning as the base address
of watchdog registers.  This breaks convention with the rest of U-Boot
where the parameter is ignored and callers are passing in 0.

Fixes: d2041725e8 ("imx8m: restrict reset_cpu")
Co-developed-by: Harald Seiler <hws@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
2020-05-01 13:46:22 +02:00
Harald Seiler
568af92679 ARM: imx8m: Fix indentation of reset_cpu() function
Use proper code-style, tabs instead of spaces for indentation.

Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
efa1a62ad2 ARM: imx8m: Do not define do_reset() if sysreset is enabled
The SPL can also be compiled with sysreset drivers just fine, so
update the condition to cater for that option.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
dabaabd3f1 ARM: imx: imx8m: Do not warn about cpu-idle-states if missing
If the cpu-idle-states is missing from the DT in the first place, do
not fail on removing in. Just move on and do not even print an error,
since not being able to remove something which is not there in the
first place is not an error and surely does not justify failing to
boot.

Turn the surrounding prints into debugs to reduce the useless noise.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01 13:46:22 +02:00
Claudius Heine
3675d93875 imx: imx8m: Don't use the addr parameter of reset_cpu
imx8m has the only implementation of `reset_cpu` which does not ignore
the addr parameter and instead gives it some meaning as the base address
of watchdog registers.  This breaks convention with the rest of U-Boot
where the parameter is ignored and callers are passing in 0.

Fixes: d2041725e8 ("imx8m: restrict reset_cpu")
Co-Authored-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01 13:46:22 +02:00
Ye Li
7247974643 imx8m: Enable WDOG_B for timeout
When doing reset_cpu, in normal case the WDOG_B outputs immediately
after we clean WDA bit. But on mscale, the WDOG_B may be later than
internal reset, and cause PMIC not reset. As we enabled the SD3.0
support, the PMIC must be reset to reset SD card.

Change the reset_cpu to enable the WDOG_B for timeout as well, and set
WDOG timeout to 1s.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
1c97fcda7f imx8mm: clock: fix fracpll decode issue
The fracpll decoding is using the bit definitions for int pll. Most of
them are same, but the CLKE bit is different. Fix the wrong CLKE_MASK
for fracpll and correct all bit definitions in fracpll decoding.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
6fcd0b2388 imx8m: Dump DRAM PLL rate by clocks command
Add the dump of DRAM PLL into "clocks" command

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
712a341c76 imx8mq: Set ARM core clock directly from ARM PLL
For ARM core clock, there are two input branches, and can select via mux:
one from ARM PLL directly, second from CCM A53 clock root.

Currently we are using second branch. But IC confirmed the CCM A53 root
signoff timing is 1Ghz, so we should switch to input from ARM PLL directly.

This patch fixes the CORE SEL slice configuration and switch ARM clock
to ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Ye Li
15a7426045 imx8mq: Enable eMMC HS400 and SD UHS mode on EVK
iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS
and HS400 configs to enhance the eMMC/SD access.

The change also needs to set usdhc clock to 400Mhz, and add the
off-on-delay-us to SD reset pin, otherwise some SD cards will
fail to select UHS mode in re-initialization.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
6b87b3f4dc imx8m: update clock root and fix core_sel
Update clock root table to let it be easy to configure clock at
very early stage. Also the core_sel mux parent should be A53 CLK
root and ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
a07bcec403 imx8m: acquire ATF commit hash
Acquire ATF commit hash when booting U-Boot to make user easy
to know the ATF version.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
c915403218 imx: imx8m: add i.MX8MN variants support
Add i.MX8MN variants support

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
cb1a1de6a0 imx: imx8m: add i.MX8MQ Dual and QuadLite support
Add i.MX8MQ Dual and QuadLite variants.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Marek Vasut
126dcc925d ARM: imx: imx8mm: Add missing clock entries for FEC clock
All the FEC ethernet clock entries for iMX8MM are missing, while they
are already present on iMX8MQ. Fill in the nodes on iMX8MM, as the FEC
ethernet gets bogus clock information otherwise which makes ethernet
inoperable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01 13:46:21 +02:00
Frieder Schrempf
291e3ab904 imx8mm/mn: Add missing root clock entry for ARM core clock
The current implementation in arch/arm/mach-imx/cpu.c uses non-DM
code to retrieve the core clock frequency. As the root clock is not
listed we currently get:

CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz

Fix this by adding the missing entry, which results in:

CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:06:15 +01:00
Igor Opaniuk
14d5aeff77 board: toradex: Add Verdin iMX8M Mini support
This adds initial minimal support for the Toradex Verdin iMX8M Mini Quad
2GB WB IT V1.0A module. They are now strapped to boot from eFuses which
are factory fused to properly boot from their on-module eMMC. U-Boot
supports booting from the on-module eMMC only, SDP support is disabled
for now due to missing i.MX 8M Mini USB support.

Functionality wise the following is known to be working:
- eMMC, 8-bit and 4-bit MMC/SD card slots
- Ethernet
- GPIOs
- I2C

Boot sequence is:
SPL ---> ATF (TF-A) ---> U-boot proper

ATF, U-boot proper and u-boot.dtb images are packed into a FIT image,
loaded by SPL.

Boot:
U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
Normal Boot
Trying to boot from MMC1
NOTICE:  Configuring TZASC380
NOTICE:  RDC off
NOTICE:  BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty
NOTICE:  BL31: Built : 01:11:41, Jan 25 2020
NOTICE:  sip svc init

U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)

CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz
Reset cause: POR
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial#
 06535149
Net:   eth0: ethernet@30be0000
Hit any key to stop autoboot:  0
Verdin iMX8MM #

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-02-09 14:50:52 +01:00
Pedro Jardim
2f39ab1649 clock_imx8mq: Make frac_pll_init() static
Since frac_pll_init() is only used in this file, change it to 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:662:5: warning: no previous
prototype for ‘frac_pll_init’ [-Wmissing-prototypes]

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:09 +01:00
Pedro Jardim
852cd55ea7 clock_imx8mq: Remove the function sscg_pll_init()
Function sscg_pll_init() is not used anywhere, so it can simply be deleted.
This was found because of the following sparse
warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:702:5: warning: no previous prototype for ‘sscg_pll_init’ [-Wmissing-prototypes]
 int sscg_pll_init(u32 pll)
     ^~~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Pedro Jardim
953d02f001 clock_imx8mq: Make do_imx8m_showclocks() static
Since do_imx8m_showclocks() is only used inside this file, make it 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:836:5: warning: no previous prototype
 for ‘do_imx8m_showclocks’ [-Wmissing-prototypes]
 int do_imx8m_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,
     ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Pedro Jardim
fb3c4d926f clock_imx8mq: Delete not used init_usb_clk()
Function init_usb_clk() is not used anywhere, so it can simply be deleted.
This was detected by the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:377:6: warning: no previous prototype
 for ‘init_usb_clk’ [-Wmissing-prototypes]
 void init_usb_clk(void)
      ^~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Alifer Moraes
c27483fcb0 imx8m: clock_imx8mm: Staticize functions
Functions fracpll_configure(), decode_intpll(), decode_fracpll(),
get_root_src_clk() and get_root_clk() are used only in the scope of this
file, so make them static to fix the following sparse warnings:

arch/arm/mach-imx/imx8m/clock_imx8mm.c:50:5: warning: no previous
prototype for ‘fracpll_configure’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:271:5: warning: no previous
prototype for ‘decode_intpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:418:5: warning: no previous
prototype for ‘decode_fracpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:483:5: warning: no previous
prototype for ‘get_root_src_clk’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:527:5: warning: no previous
prototype for ‘get_root_clk’ [-Wmissing-prototypes]

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-01-20 15:38:16 +01:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
234187e2bc imx: imx8m: add imximage-8mp-lpddr4.cfg
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
19957ee33d imx: imx8m: only support non-dm code in clock_imx8mm.c
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
e997d30be8 imx: imx8m: add 1GHz fracpll entry
4000MTS DDR needs 1GHz fracpll, so add the entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00