Ye Li 70487ff386 imx8mm: Load fuse for TMU TCALIV and TASR ... On iMX8MM, the default value of TMU registers TCALIV and TASR need be loaded from fuse. HW won't do this, it expect SW loads them before using TMU. Reviewed-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>		2020-05-10 20:55:20 +02:00
..
clock_imx8mm.c	imx8mm: clock: fix fracpll decode issue	2020-05-01 13:46:22 +02:00
clock_imx8mq.c	imx8m: Dump DRAM PLL rate by clocks command	2020-05-01 13:46:21 +02:00
clock_slice.c	imx8m: update clock root and fix core_sel	2020-05-01 13:46:21 +02:00
imximage-8mm-lpddr4.cfg	imx8m: add image cfg for i.MX8MM lpddr4	2019-10-08 16:36:36 +02:00
imximage-8mn-ddr4.cfg	imx8m: add i.MX8MN ddr4 image cfg file	2019-11-05 10:27:18 +01:00
imximage-8mp-lpddr4.cfg	imx: imx8m: add imximage-8mp-lpddr4.cfg	2020-01-08 13:20:09 +01:00
imximage.cfg	imx: imx8m: introduce imximage cfg file	2019-01-01 14:12:18 +01:00
Kconfig	ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQ	2020-05-10 13:19:39 +02:00
lowlevel_init.S	imx: rename mx8m,MX8M to imx8m,IMX8M	2019-01-01 14:12:18 +01:00
Makefile	imx: imx8mp: add basic clock	2020-01-08 13:20:08 +01:00
soc.c	imx8mm: Load fuse for TMU TCALIV and TASR	2020-05-10 20:55:20 +02:00