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2f3c92060d
ROM SError happens on two cases: 1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but when ROM patch lock is fused, this write will cause SError. 2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB is field return mode, but the last 4K of ROM is still protected and cause SError. Since ROM mask SError until ATF unmask it, so then ATF always meets the exception. This patch works around the issue in SPL by enabling SPL Exception vectors table and the SError exception, take the exception to eret immediately to clear the SError. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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| .. | ||
| clock_imx8mm.c | ||
| clock_imx8mq.c | ||
| clock_slice.c | ||
| imximage-8mm-lpddr4.cfg | ||
| imximage-8mn-ddr4.cfg | ||
| imximage-8mp-lpddr4.cfg | ||
| imximage.cfg | ||
| Kconfig | ||
| lowlevel_init.S | ||
| Makefile | ||
| soc.c | ||