Commit graph

546 commits

Author SHA1 Message Date
Patrice Chotard
f959118b66 ARM: dts: stm32mp: alignment with v6.6-rc1
Device tree alignment with Linux kernel v6.6.rc1.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-10-04 13:32:41 +02:00
Dario Binacchi
e97aeda67f dt-bindings: mfd: stm32f7: Add binding definition for CAN3
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.

Add binding definition for CAN3 peripheral.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Lee Jones <lee@kernel.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:01 +02:00
Weijie Gao
df4c82f014 reset: mediatek: add reset definition for MediaTek MT7988 SoC
This patch adds reset bits for MediaTek MT7988

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03 09:40:50 -04:00
Weijie Gao
421436981a clk: mediatek: add clock driver support for MediaTek MT7988 SoC
This patch adds clock driver support for MediaTek MT7988 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03 09:40:49 -04:00
Xingyu Wu
9a12e304dd dt-bindings: clock: jh7110: Modify clock id to be same with Linux
The clock id needs to be changed to be consistent with Linux.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:21:11 +08:00
Adam Ford
d90d6074e8 clk: imx8mp: Update clocks based on kernel 6.4-RC4
There are some newer clocks added to the kernel recently,
so to fix prepare for resycing the device trees, update
the clock list.  Since there are some minor changes to
the USB clocks, update which USB clocks are enabled
to match with the upstream kernel as well.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
2023-07-13 11:29:40 +02:00
Conor Dooley
4e99899bd5 riscv: dts: sync mpfs-icicle devicetree with linux
The "notable" disappearances are:
- the pac193x stanza - there's nothing in mainline linux w.r.t. bindings
  for this & what is going to appear in mainline linux is going to be
  incompatible with what is currently in U-Boot.
- operating points - these operating points should not be set at the
  soc.dtsi level as they may not be possible depending on the design
  programmed to the FPGA
- clock output names - there are defines for the clock indices, these
  should not be needed
- the dt maintainers in linux NAKed using defines for IRQ numbers
- the qspi nand, which is not part of the icicle's default configuration
  is removed.

Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-07-06 17:28:08 +08:00
Alexey Romanov
959426e026 dt-bindings: power: add Meson A1 PWRC bindings
We can use them in secure pwrc driver.

Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230531093156.29240-3-avromanov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Igor Prusov
8d72c796b4 ARM: dts: Add Amlogic Meson A1 DT from Linux 6.3-rc7
Import Linux 6.3-rc7 Device tree and necessary bindings for Amlogic A1
board from 6a8f57ae2eb0 ("Linux 6.3-rc7").

Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230505125639.3605-2-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Michal Simek
bb922ca3eb global: Use proper project name U-Boot (next)
Use proper project name in DTs, messages and READMEs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-19 16:45:36 -04:00
Patrick Delaunay
08002ffd08 ARM: dts: stm32mp: alignment with v6.3
Device tree alignment with Linux kernel v6.3:
- f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi
- 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on
  stm32mp135f-dk.dts
- 8539ebb435a5 - ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
- 15f72e0da4da - ARM: dts: stm32: add pinctrl and disabled spi5 node in
  stm32mp135f-dk
- ea99a5a02ebc - ARM: dts: stm32: Create separate pinmux for qspi cs pin
  in stm32mp15-pinctrl.dtsi
- a306d8962a24 - ARM: dts: stm32: Rename mdio0 to mdio
- 0a5ebb1f3367 - ARM: dts: stm32: Replace SAI format with dai-format DT
  property
- ccdab19738a6 - ARM: dts: stm32: add adc support to stm32mp13
- 022932ab55fd - ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
- ab2806ddad9d - ARM: dts: stm32: add dummy vdd_adc regulator on
  stm32mp135f-dk
- e46a180c060f - ARM: dts: stm32: add adc support on stm32mp135f-dk
- 9ebf215fbae1 - ARM: dts: stm32: add PWR fixed regulators on stm32mp131
- 16f4ff60519a - ARM: dts: stm32: add USBPHYC and dual USB HS PHY support
  on stm32mp131
- 4a47f0f3e936 - ARM: dts: stm32: add UBSH EHCI and OHCI support on
  stm32mp131
- 2a46bb66c47f - ARM: dts: stm32: add USB OTG HS support on stm32mp131
- 9ebf215fbae1 - ARM: dts: stm32: add fixed regulators to support usb on
  stm32mp135f-dk
- 16f4ff60519a - ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
- c4e7254cf6dc - ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk
- 44978e135916 - ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13
- 4f532403b1e5 - ARM: dts: stm32: enable USB OTG in dual role mode on
  stm32mp135f-dk
- e1f15571c96c - ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13
- 6cc71374002e - ARM: dts: stm32: add mcp23017 IO expander on I2C1 on
  stm32mp135f-dk
- 7ffd2266bd32 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcor-som
- 21d83512bf2b - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcom-som
- 732dbcf52f74 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp151a-prtt1l
- 003b7c6b24f4 - ARM: dts: stm32: remove sai kernel clock on
  stm32mp15xx-dkx
- f2b17b39bfff - ARM: dts: stm32: rename sound card on stm32mp15xx-dkx
- dee3cb759d3d - ARM: dts: stm32: Remove the pins-are-numbered property
- ae8cf3b48727 - ARM: dts: stm32: add i2s nodes on stm32mp131
- 619746a27bd0 - ARM: dts: stm32: add sai nodes on stm32mp131
- c5e05d08ef90 - ARM: dts: stm32: add spdifrx node on stm32mp131
- 0a5afd3ee0d0 - ARM: dts: stm32: add dfsdm node on stm32mp131
- bf9d876bea2e - ARM: dts: stm32: add timers support on stm32mp131
- a3183748371d - ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk
- a9060c1326bc - ARM: dts: stm32: add timers support on stm32mp135f-dk
- a12154058f75 - ARM: dts: stm32: Fix User button on stm32mp135f-dk
- 2f33df889e99 - ARM: dts: stm32: Use new media bus type macros
- 366384e49551 - ARM: dts: stm32: Update part number NVMEM description on
  stm32mp131

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:22:07 +02:00
Patrick Delaunay
763c6b8d7a media: dt-bindings: media: Add macros for video interface bus types
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.

Based on linux commit f7eeb0084593 ("media: dt-bindings: media: Add macros
for video interface bus types")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:22:07 +02:00
Peng Fan
596b9c4e1b arm: dts: imx93: sync device tree with Linux
Sync device tree with next-20230426

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Ralph Siemsen
4647a84b6c ARM: dts: add devicetree for Renesas RZ/N1 SoC
This is taken directly from Linux kernel 6.3
(commit 457391b0380335d5e9a5babdec90ac53928b23b4)

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-05-13 04:01:30 +02:00
Ralph Siemsen
e4aea57fa7 pinctrl: renesas: add R906G032 driver
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.

This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-05-13 04:01:30 +02:00
Yang Xiwen
08ad608aa2 dt-binding: histb-clock: add clocks definition for Hi3798MV200
These clocks are found on Hi3798MV200

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03 09:05:24 -04:00
Linus Walleij
8a5122bfd3 arm: dts: Import device tree for Broadcom Northstar
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Jianlong Huang
d60f384938 dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Add pinctrl definitions for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
58c9c60b64 dt-bindings: clock: Add StarFive JH7110 clock definitions
Add all clock outputs for the StarFive JH7110 clock generator.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
c10483045e dt-bindings: reset: Add StarFive JH7110 reset definitions
Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and
always-on(AON) reset controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Tho Vu
0296ec364d dt-bindings: clock: Add R8A779G0 V4H CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the
Renesas R-Car V4H (R8A779G0) SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
3813c3c0a5 dt-bindings: power: Add R8A779G0 V4H SYSC power domain definitions
Add power domain indices for R-Car V4H (R8A779G0) from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
2fa93af66a dt-bindings: clock: Add R8A779F0 S4 CPG Core Clock headers
Add definitions for R8A779F0 S4 CPG Core Clock headers from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
ec6f6acac1 dt-bindings: power: Add R8A779F0 S4 SYSC power domain definitions
Add power domain indices for R-Car S4 (R8A779F0) from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Andre Przywara
6621cc85f7 sunxi: dts: arm: update devicetree files from Linux v6.2-rc2
Sync the devicetree files from the Linux kernel repo, v6.2-rc2.
This is covering the 32-bit SoCs, from arch/arm/boot/dts.

This enables some new devices for the F1C100s family, though this is of
little relevance to U-Boot itself.
The H3 gains the "phys" property for the first USB controller, which
prevents an error message when U-Boot's USB stack comes up, and allows
using this port in host mode.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-05 23:33:13 +00:00
Jagan Teki
a0f5a61dc1 dt-bindings: reset: add rk3588 reset definitions
Add reset ID defines for rk3588.

commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset
definitions")

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
a8ac0d53f9 dt-bindings: power: Add power-domain header for rk3588
Add power-domain header for RK3588 SoC from description in TRM.

commit <67944950c2d0> ("dt-bindings: power: add power-domain header for
rk3588")

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
f71feb4738 dt-bindings: clk: Add dt-binding header for RK3588
Add the dt-bindings header for the Rockchip RK3588, that gets
shared between the clock controller and the clock references
in the dts.

commit <f204a60e545c> ("dt-bindings: clock: add rk3588 clock
definitions")

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
1bb92d7cb3 dt-bindings: rockchip: Sync rockchip, vop2.h from Linux
Sync rockchip,vop2.h from linux-next, and the last commit is

commit <604be85547ce> ("drm/rockchip: Add VOP2 driver")

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-02-28 18:07:26 +08:00
Sumit Garg
56443285f2 pinctrl-snapdragon: Get rid of custom drive-strength values
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.

Also, add support for pinconf bias-pull-up.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Hai Pham
e019f98a2a dt-bindings: clock: Pick R-Car Gen3 R8A77961 M3W+ header from Linux 6.1.7
Pick R-Car Gen3 R8A77961 M3W+ CPG Core Clock header from Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update commit message
2023-02-02 01:49:19 +01:00
Hai Pham
cd6ad682ca dt-bindings: power: Pick R-Car Gen3 R8A77961 M3W+ header from Linux 6.1.7
Pick R-Car Gen3 R8A77961 M3W+ power domain header from Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update commit message
2023-02-02 01:49:19 +01:00
Marek Vasut
71d2a5e5ef ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

The following script has been used for the synchronization:

$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
	if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
		cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
	elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
		cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
	else
		echo "NOT FOUND: $i"
	fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )

Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.

Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.

Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .

Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .

Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
2023-02-02 01:49:19 +01:00
Marek Vasut
9696b246e6 ARM: dts: rmobile: Synchronize DT headers with Linux 6.1.7
Synchronize R-Car device tree headers with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

This is only a copyright and SPDX identifier update, no
functional change.

The following script has been used for the synchronization:

$ for i in $(cd include/dt-bindings/clock/ ; ls -1 r8a*) ; do cp /linux-2.6/include/dt-bindings/clock/$i include/dt-bindings/clock/ ; done
$ for i in $(cd include/dt-bindings/power/ ; ls -1 r8a*) ; do cp /linux-2.6/include/dt-bindings/power/$i include/dt-bindings/power/ ; done

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-02-02 01:49:19 +01:00
Jagan Teki
766e7e04bc dt-bindings: power: Add power-domain header for rv1126
Add power-domain header for RV1126 SoC from description in TRM.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
4ebc5e36fb dt-bindings: clk: Add dt-binding header for RV1126
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Sergiu Moga
ee25ed5899 dt-bindings: clk: at91: Define additional UTMI related clocks
Add definitions for an additional main UTMI clock as well as its
respective subclocks.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
7b88887ba7 dt-bindings: reset: add sama7g5 definitions
Upstream linux commit 5994f58977e0.

Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

The three reset USB phy's have their ID's mapped from 4 to 6. There are
no USB phy's with ID's numbered from 0 to 3.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
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Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Eugen Hristev
f2d6c888f4 dt-bindings: mfd: add at91-usart.h from Linux
Copy include file dt-bindings/mfd/at91-usart.h from Linux

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Johan Jonker
4d89330b8a rockchip: rk3128-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3128
sync the clock dt-binding header.
This is the state as of v6.0 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Bryan Brattlof
253802912a arm: dts: introduce am62a7 dtbs from linux kernel
Introduce the basic am62a7 SoC dtbs from the v6.1-rc3 tag of the linux
kernel along with the new am62a specific pinmux definition that we will
use to generate the dtbs for the u-boot-spl and u-boot binaries

Co-developed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-12-09 14:10:28 -05:00
Gabriel Fernandez
01c8b664d2 dt-bindings: stm32mp13: add clock & reset support for STM32MP13
Add support of stm32mp13 DT bindings of clock and reset.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 16:49:35 +01:00
Conor Dooley
540d02217f dt-bindings: clk: add missing clk ids for microchip mpfs
When this binding header was initally upstreamed, the PLL clocking the
microprocessor subsystem (MSS) and the RTC reference clocks were
omitted. Add them now, matching the IDs used in Linux.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Marcel Ziswiler
dbd5ca2e46 imx8mm: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
f067b59743 imx8mn: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
0b42fdca2d imx8mp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
cb9b70fd2f imx8mq: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
ed7bda5710 imx8ulp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00