define the phytec_get_som_type function also when the SoM detection is
disabled.
Fixes:
commit 110d321a56 ("board: phytec: common: phytec_som_detection: Add phytec_get_som_type")
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
- mips: fix bug in cache init on MIPS32r2 or later
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAmXyCh8ACgkQKPlOlyTy
XBicug/+KSFfoD7nYY5VCSgDIPPvbwm91uW7nwlTDymSHZx1gvX6uaAuo7fPVBlE
j+nrPpV9g7aGMihkV6JC4/2TAYB0norA7umjXV9QcZlv+qJahxhMqtmKjqH+nxiZ
zslH8lg1mOkuDnIEBzyaXryqPEOv+Uo0jaOiWAm9Lc8gRprI7g34yM+N/7PY3KLN
dFXc6bpP3JKwsmgAfG7w8WB/aBLBo1Ksdj1tfHzmj87IyPeL51cldDbxK9aNnRlq
61PfRALhO+39Lgm9QTi1ukGkOU1/l7v0523PECOwjiQ6QbgElch0pJl9tNwhjc8G
w+8OQcSEw/xnF8NSzSVaGKXGy91PjenNeAS39DQX1XvjfMZmtIcfNEClRcOgeb6x
eYDfjKdpn8uEMNZ8hn7eetRjXcgKTFP7z+ZMrvUPB+E+1MB3ncU19sYTMh31nL/4
6VU1AEM95TWWSbYK/wH+r+TnudO7CVdPmqRA1x1Pf3w66kWPBiR8/WwOuLRLx6HN
cg2/vBrF+iK87ItCFPSBUYzLmt2UbKRzbIIQgG9ub4qfAe6FADtyF/HNPiu+mU5H
XwUB+cjnntaRQPbZpp2t9ILwmJ3R47RTntcWoruWYUm9lEzrLZ6z9Az66zDmPy0L
aXrbzHfSqZ+Mg5I7cyx0d0+4PgqQlBOH/jlVkRHyQ4HzM6/h5BE=
=Qt/+
-----END PGP SIGNATURE-----
Merge tag 'mips-fixes-for-v2024.04' of https://source.denx.de/u-boot/custodians/u-boot-mips
- mips: implement __udivdi3 to fix building of SquashFS
- mips: fix bug in cache init on MIPS32r2 or later
The intention of change_k0_cca() is to read the C0.Config register into
register $t0, update $t0 with the new cache coherency mode passed in $a0
and write back $t0 to C0.Config. With MIPS32 R2 or later instruction
sets, this can be achieved with a single instruction with INS. The
source and destination register of the INS instruction is passed as
first parameter. In case of change_k0_cca() it is register $t0. But
for writing back the updated value to C0.Config, the incorrect $a0
register is used. This is only correct in the MIPS32 R1 code path.
Fix the `mtc0` instruction to write back the value of the $t0 register.
Fix the MIPS32 R1 code path to also store the updated value in $t0.
Reported by user ddqxy138 on Github.
b838586086
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Squashfs wasn't compiling because the lldiv() directives
turn into __udivdi3 and we are using private libgcc.
After this squashfs compiles for MIPS.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Bartel Eerdekens <barteleerdekens@gmail.com>
When copying the build system for Linux we missed to replace some
instances of 'Documentation' by 'doc'.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Python 3.6 introduced a DeprecationWarning for invalid escape sequences.
This is upgraded to a SyntaxWarning in Python 3.12, and will eventually
be a syntax error.
Fix these now to get ahead of it before it's an error.
Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
Message-ID: <20230912060801.95533-3-bgray@linux.ibm.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Adapted for U-Boot
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Use proper binary artifact names for HSFS devices.
Do not use the *_unsigned binaries.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
When using the previous prototype you got a compiler warning like this:
warning: initialization of 'int (*)(struct cmd_tbl *, int, int, char * const*)' from incompatible pointer type 'int (*)(struct cmd_tbl *, int, int, const char **)' [-Wincompatible-pointer-types]
Fixes: 3d9640f55c ("doc: expand README.commands")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Moving the efi_carve_out_dt_rsv() call in commit 1be415b21b
("efi_loader: create memory reservations in ACPI case")
broke boards that create additional memory reservations in
ft_board_setup() since it is now called before those additional
memory reservations are made. This is the case for the rk3588
boards and breaks booting OpenBSD on those boards.
Move the call back to its original location and add a call in
the code path used for ACPI.
Fixes: 1be415b21b ("efi_loader: create memory reservations in ACPI case")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The 'PolarFire Hart Software Services' SBI implementation returns the
version of the incorporated OpenSBI. Format the number accordingly.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
For an unknown implementation ID an output like
SBI 1.0Unknown implementation ID 16777216
Extensions:
sbi_set_timer
...
was shown. The number 16777216 is not the implementation ID.
* Show the correct number
* Use a hexadecimal output format
* Add a missing line feed
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Previously PLL node was missing from SPL dts. This caused BUS_ROOT
to stay on OSC clock (24Mhz). As a result, all peripherals have to
run at a much lower frequency, and loading from sdcard/emmc is slow.
Thus, enabling PLL node in dts to fix this.
Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The first multi-letter extension after the single-letter extensions does
not have to be preceded by an underscore, which could cause the parser
to mistakenly find a single-letter extension after the start of the
multi-letter portion of the string.
Three letters precede multi-letter extensions (s, x & z), none of which
are valid single-letter extensions. The dt-binding also allows
multi-letter extensions starting with h, but no such extension have been
frozen or ratified, and the unprivileged spec no longer uses "h" as a
prefix for multi-letter hypervisor extensions, having moved to "sh"
instead. For that reason, modify the parser to stop at s, x & z to prevent
this overrun, ignoring h.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
U-Boot SPL loads the device-tree directly behind main U-Boot overlapping
the .bss section. reserve_fdt() is called in board_init_f() to relocate the
device-tree to a safe location.
Debug UARTs are enabled before board_init_f(). With sbi_dbcn_available in
the .bss section the device-tree is corrupted when _debug_uart_init() is
called in the SBI serial driver. Move the variable to the .data section.
Link: https://bugs.launchpad.net/ubuntu/+source/u-boot/+bug/2054091
Fixes: dfe0837494 ("risc-v: implement DBCN based debug console")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
It appears that there is some timing marginality either in the
board layout or the SoC that results in occasional data corruption
on some boards.
We observed this issue on some of the new HiFive Unmatched RevB
boards during volume production as well as some of the original
HiFive Unmatched boards from 2021 in our possession. This means
that there are other boards out there that might have the issue
too.
We have done some limited testing with DDR4 at 1600MT/s and
faulty boards (failing at 1866MT/s) passed.
We plan further testing after we procure a temperature chamber.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Distro boot scripts are deprecated. Use standard boot instead.
Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
- Use TF-A on imx8mp_beacon to fix boot regression.
- Use latest 6.8 dts for imx8mp_beacon.
- Fix the RAM initialization for phycore_imx8mp PCL-070 rev 1.
- Describe the 0087 i.mx8m mini product variant in tdx-cfg-block.
The device tree has evolved over time, so re-sync. This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver. However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
When the board was originally added, it enabled some features which
allowed it to bypass Trusted Firmware, but as the feature set of
Linux grew and more features became available, the U-Boot config
options which bypassed TF-A caused issues, so it needs to return
to the standard operating mode of using TF-A or the system no
longer boots.
Fixes: ab53bd43db ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
One fix makes the reboot more robust on some older board, another one
stabilises the initial clock setup on the A10/A20.
Two patches make sure our DRAM init does not actually change the content
of the DRAM array, which allows to use DRAM for Linux' pstore
functionality.
We get SPI support for U-Boot proper for one more SoC, that patch was
lingering around for a while, and should not affect other SoCs, so I am
merging this now.
As an added bonus, we get the defconfig file for a new board, the DT was
already synced from the kernel tree.
The CI looked happy with changes, and I tested them on five different
boards with different SoCs.
A RNG driver for Armada 3720 boards running the Turris Mox rWTM firmware
from CZ.NIC in the secure processor.
Signed-off-by: Max Resch <resch.max@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add a config fragment with required differences for booting from spi
flash instead of sd-card (default).
Settings for environment location are based on vendor u-boot:
https://github.com/kobol-io/u-boot/blob/helios4/include/configs/helios4.h#L59
The fragment can be applied on top of helios4_defconfig by make:
make helios4_defconfig spiboot.config
Signed-off-by: Josua Mayer <josua@solid-run.com>
Update the helios4 defconfig to enable the 'setexpr' command, which is a
default and useful for various complex boot-scripts.
Signed-off-by: Josua Mayer <josua@solid-run.com>
SolidRun Armada-388 SoM has an i2c bus supporting on-som eeprom, and
peripherals on a carrier.
armada-38x.dtsi disables this bus by default, it should be enabled by
som or carrier dts.
Linux has moved i2c0 from helios-4 board dts to som dtsi, including
status, pinctrl and clock speed.
Copy these settings from mainline.
This fixes accessing i2c bus from u-boot commandline.
Signed-off-by: Josua Mayer <josua@solid-run.com>
The Turris Omnia contains the Marvell 88E6176 ethernet switch. Add
config options and device tree to enable the support.
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Signed-off-by: Marek Behún <kabel@kernel.org>
The mv88e6xxx driver does not currently initialize the smi_addr field, but
instead keeps the default zero value. This leads to driver being unusable
on devices where the switch is not on address zero of the mdio bus. Fix
this problem by reading the SMI address from device tree.
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Current sunxi DRAM initialisation code does several test accesses to the
DRAM array to detect aliasing effects and so determine the correct
row/column configuration. This changes the DRAM content, which breaks
use cases like soft reset and Linux's ramoops mechanism.
Fix this problem by saving and restoring the content of the DRAM cells
that is used for the test writes.
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
mctl_mem_matches and mctl_mem_matches_base identical functions. To
avoid code duplication move them to dram_helpers and make
mctl_mem_matches use generic mctl_mem_matches_base.
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
No device tree in U-Boot or linux use the wrong spelling used in code.
Use correct property name as defined in dwc3 bindings.
Fixes: 062790f461 ("usb: xhci-dwc3: Add USB2 PHY configuration")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
Because of commit bf947d2a4b ("imx6ul: synchronise device tree with
linux"), the compatible property of lcdif in imx6ul.dtsi went from
compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
to
compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
without updating the mxsfb driver to match that change.
Add "fsl,imx6sx-lcdif" as a compatible id to fix that.
Fixes: bf947d2a4b ("imx6ul: synchronise device tree with linux")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Commit 5d7a95f499 ("imx6ul/imx6ull: synchronise device trees with
linux") removed the display timings from the board device tree whereas
they are still needed by the mxsfb driver.
Add the timings back (the correct ones) in the
imx6ul-opos6uldev-u-boot.dtsi file and remove them from the
opos6uldev.env file.
Update the opos6uldev_defconfig file so that the LCD turns on at boot.
Fixes: 5d7a95f499 ("imx6ul/imx6ull: synchronise device trees with linux")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Use the latest, mx93a1-ahab-container.img that is compatible with the
i.MX93 A1 revision.
Using mx93a1-ahab-container.img on an A0 chip and conversely causes a boot
failure without any traces on the UART.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
If the optional `tee.bin` OP-TEE binary is missing, the image will still be
functional. Adapt the warning message accordingly.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
The OrangePi Zero 2W is a tiny development board featuring the Allwinner
H618 SoC, shipping with up to 4GB of LPDDR4 DRAM, a mini-HDMI connector,
two USB Type-C sockets and a 16MB SPI NOR flash.
There is an FPC connector to connect an expansion board, which sports
two more USB Type-A sockets and a 100MBit Ethernet port. Support for
the expansion board is not in the DT yet, probably a DT overlay would
cover this in the future.
Add a defconfig file selecting the right drivers and DRAM options.
Since the .dts file was synced from the Linux kernel repo already, we
just need to add one line to the Makefile to actually build the .dtb.
The DRAM parameters were derived from the values found in the BSP DRAM
drivers on the SPI NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>