Commit graph

91582 commits

Author SHA1 Message Date
Igor Opaniuk
fc7ef0f9e7 common: avb_verify: add str_avb_io_error/str_avb_slot_error
Introduce str_avb_io_error() and str_avb_slot_error() functions,
that provide a pointer to AVB runtime error message.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Link: https://lore.kernel.org/r/20240209192045.3961832-6-igor.opaniuk@foundries.io
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-02-15 10:38:34 +01:00
Igor Opaniuk
0ef0825a8c cmd: avb: rework prints
Simplify and add more context for prints where it's needed.

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20240209192045.3961832-5-igor.opaniuk@foundries.io
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-02-15 10:38:34 +01:00
Igor Opaniuk
0508a7c667 common: avb_verify: rework error/debug prints
Make error prints more verbose with additional context.
Also s/print/debug/g for prints, which might be relevant only
for debugging purposes.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Link: https://lore.kernel.org/r/20240209192045.3961832-4-igor.opaniuk@foundries.io
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-02-15 10:38:34 +01:00
Igor Opaniuk
a14aa59e7e avb: move SPDX license identifiers to the first line
Move SPDX license identifiers to the first line, so it conforms
to license placement rule [1]:

Placement:
The SPDX license identifier in kernel files shall be added at the first
possible line in a file which can contain a comment.  For the majority
of files this is the first line, except for scripts which require the
'#!PATH_TO_INTERPRETER' in the first line.  For those scripts the SPDX
identifier goes into the second line.

[1] https://www.kernel.org/doc/Documentation/process/license-rules.rst

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Link: https://lore.kernel.org/r/20240209192045.3961832-3-igor.opaniuk@foundries.io
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-02-15 10:38:34 +01:00
Igor Opaniuk
c2f72d00ab common: avb_verify: don't call mmc_switch_part for SD
mmc_switch_part() is used for switching between hw partitions
on eMMC (boot0, boot1, user, rpmb).
There is no need to do that for SD card.

This fixes the avb command usage on SD cards.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240209192045.3961832-2-igor.opaniuk@foundries.io
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-02-15 10:38:34 +01:00
Igor Opaniuk
cfbeb4b0b9 MAINTAINERS: add custodian tree info for AVB/AB
Add information about a custodian tree [1] for AVB/AB, which is
maintained by Mattijs Korpershoek.

[1] https://source.denx.de/u-boot/custodians/u-boot-dfu

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20240213073638.1125429-1-igor.opaniuk@foundries.io
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-02-15 10:38:34 +01:00
Tom Rini
77ff61a5bb Xilinx changes for v2024.04-rc3
zynqmp:
 - Cover missing _SE chip variants to fix fpga programming
 
 versal:
 - Enable LTO for mini configurations
 
 versal-net:
 - Enable LTO for mini configurations
 - Fix GIC address to aligned with real silicon
 
 xilinx:
 - DTs cleanup and fixups
 - Enable HTTP boot
 - Add missing spl header to zynqmp.c
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Merge tag 'xilinx-for-v2024.04-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2024.04-rc3

zynqmp:
- Cover missing _SE chip variants to fix fpga programming

versal:
- Enable LTO for mini configurations

versal-net:
- Enable LTO for mini configurations
- Fix GIC address to aligned with real silicon

xilinx:
- DTs cleanup and fixups
- Enable HTTP boot
- Add missing spl header to zynqmp.c
2024-02-14 15:23:10 -05:00
Caleb Connolly
22f391e8be
button: qcom-pmic: demote "unknown button" message to debug
This message isn't an error (there can be a watchdog subnode for example)
but it shouldn't be printed unless this driver is being debugged. Demote
it to a debug print.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-02-14 17:21:50 +00:00
Dan Carpenter
6b929e9f3c
button: qcom-pmic: fix some error checking
The pmic_reg_read() function can return errors.  Add a check for that.

Fixes: 4e8aa0065d ("button: qcom-pmic: introduce Qualcomm PMIC button driver")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-02-14 17:16:52 +00:00
Michal Simek
c2ad5fb616 arm64: versal-net: Setup correct addresses of GICR/GICD
Previous addresses where used in past in emulation environment but never
gets to silicon that's why use correct addresses.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5d3d0e1afb1f673ffeb4a1c5d7f040475c806a30.1707220293.git.michal.simek@amd.com
2024-02-14 11:23:43 +01:00
Tom Rini
37345abb97 Prepare v2024.04-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-02-13 18:16:57 -05:00
Tom Rini
0b66c54a97 Merge branch '2024-02-13-assorted-updates'
- Add the button command patch, update MAINTAINERS entry for a platform,
  fix a problem with the hash command, fix a problem on K3 platforms and
  revert a change on verdin-am62.
2024-02-13 17:32:17 -05:00
Francesco Dolcini
ea7d3eec1e Revert "board: verdin-am62: set cpu core voltage depending on speed grade"
This reverts commit d2099587d6.

According to TI changing the VDD_CORE while the SoC is running is not
allowed, the voltage must be set before the AM62 device reset is
released, revert this change therefore.

The correct solution would be to program the PMIC during manufactoring
according to the speed grade of the SoC.

Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1318338/am623-booting-from-mmc-failed-after-lowering-vdd_core-to-0-75v/5036508#5036508
Fixes: d2099587d6 ("board: verdin-am62: set cpu core voltage depending on speed grade")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2024-02-13 15:38:49 -05:00
Caleb Connolly
e761035b64 boot: add support for button commands
With the relatively new button API in U-Boot, it's now much easier to
model the common usecase of mapping arbitrary actions to different
buttons during boot - for example entering fastboot mode, setting some
additional kernel cmdline arguments, or booting with a custom recovery
ramdisk, to name a few.

Historically, this functionality has been implemented in board code,
making it fixed for a given U-Boot binary and requiring the code be
duplicated and modified for every board.

Implement a generic abstraction to run an arbitrary command during boot
when a specific button is pressed. The button -> command mapping is
configured via environment variables with the following format:

  button_cmd_N_name=<button label>
  button_cmd_N=<command to run>

Where N is the mapping number starting from 0. For example:

  button_cmd_0_name=vol_down
  button_cmd_0=fastboot usb 0

This will cause the device to enter fastboot mode if volume down is held
during boot.

After we enter the cli loop the button commands are no longer valid,
this allows the buttons to additionally be used for navigating a boot
menu.

Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Tegra30
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-02-13 15:38:49 -05:00
Igor Opaniuk
348ea87850 cmd: hash: fix param count check
Add correct check for parameter count.

This fixes this issue when `hash` cmd is invoked without params:

=> hash
data abort
pc : [<bf739204>]	   lr : [<ba6effa8>]
reloc pc : [<60019204>]	   lr : [<5afcffa8>]
sp : ba6dd9c8  ip : bf7391f0	 fp : bf74ec14
r10: 00000001  r9 : ba6dfea0	 r8 : bf7ea030
r7 : 00000000  r6 : ba6effa8	 r5 : 00000000  r4 : ffffffff
r3 : bf7c257c  r2 : 00000001	 r1 : 00000000  r0 : bf7e6e34
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
Code: e5934004 e1a0e003 e59f3050 e2444001 (e5f4c001)
Resetting CPU ...

resetting ...

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2024-02-13 15:38:11 -05:00
Roger Quadros
ef473d541d memory: ti-gpmc: Fix lock up at A53 SPL during NAND boot on AM64-EVM
AM64 ES2.0 bootrom seems to enable WAIT0EDGEDETECTION interrupt.
This causes a lockup at A53 SPL when accessing NAND controller
or ELM registers.

A good option would be to softrest GPMC block at probe
but this cannot be done for AM64 as SOFTRESET bit is marked
as reserved in SYSCONFIG register.

Fix the issue by disabling all IRQs at probe.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-02-13 15:38:11 -05:00
Igor Opaniuk
b12883fc38 poplar: add myself as co-maintainer
Add myself as co-maintainer for Poplar board, as I'm currently
working on it (re-testing releases, addressing issues etc).

CC: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
CC: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
2024-02-13 15:38:11 -05:00
Tom Rini
73b5b47dd5 Pull request doc-2024-04-rc2
Documentation:
 
 * Fix and extend utf8_to_utf32_stream() documentation
 * Fix rendering of OpenSBI logo in VisionFive 2 description
 * Document imxrt1170-evk board
 * codingstyle.rst: Clarify include section
 
 UEFI:
 
 * simplify error message in efi_disk_create_raw()
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Merge tag 'doc-2024-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request doc-2024-04-rc2

Documentation:

* Fix and extend utf8_to_utf32_stream() documentation
* Fix rendering of OpenSBI logo in VisionFive 2 description
* Document imxrt1170-evk board
* codingstyle.rst: Clarify include section

UEFI:

* simplify error message in efi_disk_create_raw()
2024-02-12 15:22:05 -05:00
Nils Le Roux
a5f877a0bd net: designware: Support high memory nodes
Some platforms (such as the Lichee Pi 4A) have their dwmac device
addressable only in high memory space. Storing the node's base address
on 32 bits is not possible in such case.

Use platform's physical address type to store the base address.

Signed-off-by: Nils Le Roux <gilbsgilbert@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2024-02-12 13:41:03 -05:00
Tom Rini
2eb39c9ada doc/develop/codingstyle.rst: Clarify include section
Rework the section about includes slightly. We should not be using
common.h anywhere, so remove that from examples and ask people to send
patches removing it when found. Doing this also means we need to reword
other parts of this section. Be clearer about using alphabetical
ordering.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2024-02-12 17:35:34 +01:00
Janne Grunau
1a72acba38 lib: charset: Fix and extend utf8_to_utf32_stream() documentation
Clarify usage of buffer argument.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-12 17:35:34 +01:00
Heinrich Schuchardt
50457f547d efi_loader: simplify error message in efi_disk_create_raw()
The error message

    Adding disk for usb_mass_storage.lun0 failed (err=-9223372036854775788/0x8000000000000014)

provides a decimal and a hexadecimal notation of the EFI status code
EFI_ALREADY_STARTED which is defined as (EFI_ERROR_MASK | 20).
The decimal output does not convey the value 20 clearly.

With the patch we write

    Adding block device usb_mass_storage.lun0 failed, r = 20

similar to other EFI error messages.

Fixes: 952018117a ("dm: sandbox: Switch over to using the new host uclass")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-12 17:35:34 +01:00
Heinrich Schuchardt
5bf0802631 doc: board: starfive: fix rendering of OpenSBI logo
The rendering of the OpenSBI logo should look like the screen output.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-12 17:35:34 +01:00
Jesse Taube
71b7bd86ed doc: imx: imxrt1170: Document imxrt1170-evk board
Add documentation for imxrt1170-evk.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>

Add index page entry, adjust formatting.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-12 17:35:34 +01:00
Tom Rini
91c37c4a20 Merge tag 'u-boot-imx-master-20240212' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19583

- Fix the i.MX8MP SPI compatible string.
- Let the SPL clock code do the configuration on Data Modul i.MX8M Plus
  eDM SBC.
- Enable secure boot on the imx93_var_som board.
2024-02-12 09:26:20 -05:00
Venkatesh Yadav Abbarapu
db23e67bbd xilinx: zynqmp: Add the missing function prototype
Add missing prototype to fix the below sparse warning
warning: no previous prototype for 'spl_spi_get_uboot_offs'
	 [-Wmissing-prototypes]

Fixes: 2c8a09219c ("arm64: zynqmp: Add multiboot support for SPL/SPI offset calculation")
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240207083328.1673752-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-02-12 09:28:32 +01:00
Michal Simek
a0a24194bc arm64: zynqmp: Disable DP on kd240
When SOM dt is combined with kd240 overlay DPSUB is enabled but kd240 has
no DP wired that's why change disable it via status property.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f6de217b3350c9d59032ef54800882e48f240398.1706791116.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
04dca75ae3 arm64: zynqmp: Do not expose usbhub nodes on kr260 usb1
usb0 is already updated but forget to also update usb1.

Fixes: 4ff083f09b ("arm64: zynqmp: Do not expose usbhub nodes")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/862ca748670f18f25d88aa5b43c37e3dd6aa35eb.1706791116.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
f1c24bdf7b arm64: zynqmp: Align nvmem-fw node with dt-schema
Node name has to be renamed to be aligned with dt-schema and also
xlnx,zynqmp-nvmem-fw switched to fixed-layout.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/32899b20c1e282aab16c32074b1c9a3f45f6dac8.1706791116.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
e0cce11434 arm64: zynqmp: Remove arm,cortex-a53-edac node
There is no dt schema associated with it. Also Linux driver have been
removed in Xilinx Linux tree and never gets to upstream that's why remove
description for it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6685ee980d9b475f95eef6b2a74795adc4ac4619.1706791116.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
fb16d9321f xilinx: Fix fpga region DT nodes name
fpga-full is not aligned with the latest dt-schema. Generic name
fpga-region should be used.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/78e6e3f287f79917eb92c6c74accbaf955526aad.1706791116.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
f8e125c995 arm64: zynqmp: Fix kr260 clock wiring
kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.

On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e87ae94979c6efc909740bb1a569505042e4f876.1706626255.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
8e9566c981 arm64: zynqmp: Describe 25MHz fixed clock for PL GEMs
Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c430aeacaa76d9f61ed3f874f721a33049f45eb9.1706514396.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
0845f5c803 arm64: zynqmp: Sync clock labels with kr260 revB
Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using one si5332 and revB multiple clock chips
using the same clock labels helping with keeping only one device tree
overlay which targets PL. That's why synchronize clock labels and use
labels from revB which are more generic.
Unfortunately if there is driver for si5332 chip split could happen again
but it is still worth to do it now and solve this issue when occurs.

Reported-by: Sagar Karmarkar <sagar.karmarkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/abac6069e6029ed4076ec7b9d6b33604b6072aa3.1706253871.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Saeed Nowshadi
cbd87dae91 arm64: zynqmp: Add 'silabs, skip-recall' to all si570 clk nodes
Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting.  This re-calibration causes a glitch on the output clock.  At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation.  System Controller should skip the re-calibration
step to prevent any clock instability for Versal.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbb2322c94503f0e6b369c60312b7546500fad95.1706170068.git.michal.simek@amd.com
2024-02-12 09:28:32 +01:00
Michal Simek
98f7bf5da4 arm64: xilinx: Enable EFI_HTTP_BOOT by default
Enable EFI_HTTP_BOOT to be able to booting OS via http.
In case of that dhcp server is not providing dns server IP set it up via
setenv dnsip <ip addr>.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b78a7d8b0100c724f657c0997b273e073cf31a14.1706093917.git.michal.simek@amd.com
2024-02-12 09:28:31 +01:00
Venkatesh Yadav Abbarapu
8a58aed145 configs: versal_net: Enable CONFIG_LTO for mini qspi/ospi
Adding a tiny bit more code for mini u-boot leads to a OCM
image overflow. Fix this by enabling LTO for this board, so that such
changes still can be made to the common U-Boot code.

Enable building mini u-boot image with LTO, which results in about 8KB
reduction in size.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240126081139.3210211-1-venkatesh.abbarapu@amd.com
2024-02-12 09:28:31 +01:00
Venkatesh Yadav Abbarapu
958526f250 configs: versal: Enable CONFIG_LTO for mini qspi/ospi
Adding a tiny bit more code for mini u-boot leads to a OCM
image overflow. Fix this by enabling LTO for this board, so that such
changes still can be made to the common U-Boot code.

Enable building mini u-boot image with LTO, which results in about 8KB
reduction in size.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240126080900.3209323-1-venkatesh.abbarapu@amd.com
2024-02-12 09:28:31 +01:00
Venkatesh Yadav Abbarapu
dfc8e5f659 soc: zynqmp: Add the IDcode for dr_SE and eg_SE variants
ID code is added for zu67dr_SE, zu11eg_SE, zu19eg_SE and zu47dr_SE
variants. SE is the select edition of restricted devices with the
capabilities.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240123045715.893652-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-02-12 09:28:31 +01:00
Tom Rini
e8f2404e09 Merge branch 'master-779h0-r2' of https://source.denx.de/u-boot/custodians/u-boot-sh 2024-02-11 12:42:25 -05:00
Mathieu Othacehe
fcd377ed64 configs: imx93_var_som: Enable AHAB support
Enable AHAB support in the imx93_var_som configuration.

Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
2024-02-10 15:16:13 -03:00
Mathieu Othacehe
db783ee982 board: imx93_var_som: Probe ELE MU
Probing the MU is needed to prevent this error in the SPL:

ele dev is not initialized
Authenticate container hdr failed, return -19, resp 0x0
IND = INVALID

ele dev is not initialized
Error: release container failed, resp 0x0!
IND = INVALID

SPL: failed to boot from all boot devices

Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
2024-02-10 15:16:13 -03:00
Mathieu Othacehe
2029a4c6be imx93: Use a header for imx9_probe_mu declaration
Put imx9_probe_mu declaration in a new mu.h header file.

Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2024-02-10 15:16:13 -03:00
Marek Vasut
05d3602737 spi: mxc_spi: Add imx6ul-ecspi compatible string
Recent i.MX8MP DTs use new fsl,imx6ul-ecspi compatible string instead
of the fsl,imx51-ecspi compatible string. Add the new compatible string
to fix ECSPI operation on i.MX8MP.

For details, see Linux:
48d74376fb68 ("arm64: dts: imx8mp: update ecspi compatible and clk")
8eb1252bbedf ("spi: imx: remove ERR009165 workaround on i.mx6ul")

Fixes: 451799a6ce ("arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2024-02-10 15:15:55 -03:00
Marek Vasut
0fa60e3c2a ARM: imx: Let SPL configure ECSPI1 clock on Data Modul i.MX8M Plus eDM SBC
The SPL clock code does configure the ECSPI clock frequency, which has
to match the mxc-spi driver configuration for successful SPI NOR boot.
Drop the assigned-clock from DT ecspi1 node on this board to let the
SPL clock code do the configuration and keep it aligned with the driver
expectation.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-02-10 15:15:40 -03:00
Hai Pham
53066deccb ARM: renesas: Add Renesas R8A779H0 V4M Gray Hawk board code
Add board code for the Renesas R8A779H0 V4M Gray Hawk board.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2024-02-10 17:08:06 +01:00
Hai Pham
9e9a92e4a3 ARM: dts: renesas: Add Renesas Gray Hawk boards support
Initial support for the Renesas Gray Hawk CPU and BreakOut boards.

The arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi is extended version of:
https://lore.kernel.org/linux-renesas-soc/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be/
The version currenty submitted upstream lacks functionality which is
present in this series. Once the upstream support implements that
missing functionality, these DTs will be updated to match.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2024-02-10 17:08:06 +01:00
Hai Pham
903f98e88c ARM: dts: renesas: Add Renesas R8A779H0 V4M DT extras
Add Renesas R8A779H0 V4M DT extras for U-Boot.

Until the RPC node becomes part of main DT, keep it here as
an extension so that board code can enable and use the RPC
to access SPI NOR.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2024-02-10 17:08:06 +01:00
Hai Pham
1acb69d9b3 ARM: dts: renesas: Add Renesas R8A779H0 V4M SoC support
Add initial support for the Renesas R8A779H0 (R-Car V4M) SoC.

The current version is imported and modified from:
https://lore.kernel.org/linux-renesas-soc/4107bc3d7c31932da29e671ddf4b1564ba38a84c.1706194617.git.geert+renesas@glider.be/
The modifications contain nodes from previous version
which are useful in U-Boot and not part of the Linux
kernel DT yet. The following nodes were added:
- pfc
- gpio0..gpio7
- i2c0..i2c3
- avb0..avb2
- mmc0

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2024-02-10 17:08:06 +01:00
Hai Pham
c49f936455 mtd: spi: renesas: Add R8A779H0 V4M support
Support RPC SPI on R8A779H0 V4M SoC.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2024-02-10 17:08:06 +01:00