Commit graph

491 commits

Author SHA1 Message Date
Tom Rini
145a996592 Merge tag 'u-boot-rockchip-20221020' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- dts update and sync for rk356x, rk3288, rk3399 from Linux;
- Add rk3399 EAIDK-610 board support;
- Update for puma-rk3399 board;
- some fix and typo fix in different drivers;
2022-10-20 22:32:38 -04:00
FUKAUMI Naoki
85a8ef1264 arm: dts: rockchip: rk356x: sync with Linux 6.0
prepare for rk3566 based board

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Andre Przywara
7f53f5093b sunxi: dts: arm64: update devicetree files
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.

This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.

Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
Some A64 boards gain some audio nodes.
The H616 DTs are now switched to the version finally merged into the
kernel, which brings some changes, but none affecting U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-18 08:15:59 +01:00
Jim Liu
9ca71c9c19 arm: nuvoton: Add support for Nuvoton NPCM845 BMC
Add basic support for the Nuvoton NPCM845 EVB (Arbel).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-06 21:05:17 -04:00
Weijie Gao
40746bf429 clk: mediatek: add clock driver support for MediaTek MT7981 SoC
This patch adds clock driver support for MediaTek MT7981 SoC

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
37d5a9a29d clk: mediatek: add clock driver support for MediaTek MT7986 SoC
This patch adds clock driver support for MediaTek MT7986 SoC

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
14c81eb2f6 dt-bindings: pinctrl: mediatek: add a header for common pinconf parameters
This patch adds a pinctrl header for common pinconf parameters such as
pull-up/pull-down resistors and drive strengths.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:15 -04:00
Tom Rini
e9a1ff9724 Merge branch 'master' into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-19 16:07:12 -04:00
Jesse Taube
7d9c6f1781 RAM: Add changes for i.MXRT11xx series
The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
3d579c11e0 dt-bindings: imx: Add clock binding for i.MXRT1170
Add the clock binding doc for i.MXRT1170.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Patrice Chotard
f6f681642f gpio: sandbox: Add GPIOD_IS_AF for gpio configured in alternate function
This allows to test if a pin's label if displayed using gpio_get_status()
when this pin is configured in alternate function.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-15 09:55:30 -04:00
Icenowy Zheng
d13cd77068 dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
This commit sychronizes the header file for FU740 PRCI clocks with the
one from Linux 5.19.

The constant values are the same, but all constant names are changed
(most are just prefixed with FU740_).

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:15 +08:00
Dhananjay Phadke
65523d28b9 gpio: aspeed: port Linux dt-bindings header file
Makes it easier to add readable GPIO definitions in DTS files
for Aspeed SOC based boards.

Ported with small edits to add IBM copyright statement and fix
for checkpatch warning.

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Billy Tsai <billy_tsai@aspeedtech.com>
Acked-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-08-20 18:12:51 -04:00
Tom Rini
86feeab3dc u-boot-imx-20220726
-------------------
 
 i.MX for 2022.10
 
 - Added i.MX93 architecture
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
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Merge tag 'u-boot-imx-20220726' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220726
-------------------

i.MX for 2022.10

- Added i.MX93 architecture

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
2022-07-26 10:26:00 -04:00
Peng Fan
0da3d96e10 arm: dts: Add i.MX93 SoC DTSi file
Add the DTSi file and DT header files for i.MX93 SoC

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Michal Simek
165694b125 dt-bindings: versal: Add versal reset IDs
The same file is already the part of Linux kernel that's why add it also to
u-boot to be able to use it in source code and DT files.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
2022-07-26 08:23:55 +02:00
Sumit Garg
a4a9d9e874 clocks: qcom: Add clock driver for QCS404 SoC
Currently this clock driver initializes clocks for UART and eMMC. Along
with this import "qcom,gcc-qcs404.h" header from Linux mainline to
support DT bindings.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25 13:02:04 -04:00
Sumit Garg
ffa7928719 clocks: sdm845: Import qcom,gcc-sdm845.h
Rather than using magic numbers as clock ids for peripherals import
qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids.
So start using corresponding clk-id macro for debug UART.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25 13:02:04 -04:00
Marcel Ziswiler
24a7a3c1c0 imx8mm: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
181d1684ca imx8mq: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:01 +02:00
Marcel Ziswiler
4e5114daf9 imx8mn: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
b4052d55ad colibri_vf: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
vf610-colibri-eval-v3.dtb rather than the previous vf610-colibri.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
2f96d4dd95 imx7s/d: synchronise device trees with linux
Synchronise device tree with linux-next next-20220708.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
d0399a46e7 imx6dl/imx6qdl: synchronise device trees with linux
Synchronise device trees with linux-next next-20220708.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Fabio Estevam
05996f350d imx8mm: Sync device tree with linux-next 20220711
Sync imx8mm.dtsi device tree with linux-next 20220711.

The main motivation for doing this sync is the sha256 regression
reported by Andrey Zhizhikin [1].

The linux-next kernel has the following commit, which disables
the job ring 0 and fixes the problem:

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20220715&id=dc9c1ceb555ff661e6fc1081434600771f29657c

[1] https://lore.kernel.org/u-boot/AM6PR06MB46912207D9460CD9924F35DAA68B9@AM6PR06MB4691.eurprd06.prod.outlook.com/T/#t

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-07-25 16:12:00 +02:00
Weijie Gao
daf4ce6b5e reset: mtmips: add reset controller support for MediaTek MT7621 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7621 SoC

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Weijie Gao
e75cc00982 clk: mtmips: add clock driver for MediaTek MT7621 SoC
This patch adds a clock driver for MediaTek MT7621 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-13 23:03:37 +02:00
Patrick Delaunay
69ef98b209 ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1

- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
  on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15

+ patch from stm32-dt-for-v5.19-fixes-2

- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Eugen Hristev
1535f1d19c dt-bindings: sound: add microchip,pdmc.h
Include microchip,pdmc.h from Linux.

This file includes required defines for DT successful build.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2022-06-28 10:09:45 +03:00
Suman Anna
8a6d273343 dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62
Add pinctrl macros for AM62x SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
 done for other similar platforms.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:32 -04:00
Samuel Holland
9a50489c60 dt-bindings: sunxi: Update clock/reset binding headers
Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:50 +01:00
Jim Liu
c7554574ff clk: nuvoton: Add support for NPCM750
Add clock controller driver for NPCM750

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-05-05 09:28:47 -04:00
Jim Liu
84335544ea arm: nuvoton: Add support for Nuvoton NPCM750 BMC
Add basic support for the Nuvoton NPCM750 EVB (Poleg).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-05-05 09:28:47 -04:00
Pali Rohár
53ee48b673 dt-bindings: leds: import common led bindings from linux 5.17
This allows usage of LED_COLOR_ID_RGB macro in DTS files.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-28 09:26:44 -04:00
Marek Vasut
2e760f180d imx: power-domain: Add i.MX8MP support
Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-04-21 12:44:23 +02:00
Johan Jonker
334d519a13 rockchip: rk3288-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
444311196e rockchip: rk3288-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6914ef8e67 rockchip: rk3228-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
3c48a62460 rockchip: rk3228-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
5e6ee6bde5 rockchip: rk3066-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Jesse Taube
6f9d3da42f ARM: dts: imxrt10..-evk: Linux moved pins-imxrt1020 to dts
The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree
This patch move it in U-Boot as well.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12 21:08:23 +02:00
Angus Ainslie
a375c6f3fb dt-bindings: imx8mq-clock: add mainline definitions
Sync the clock ids with the mainline kernel

077de6e1c9f ("clk: imx8mq: add PLL monitor output")

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Marek Vasut <marex@denx.de>
2022-04-12 17:33:55 +02:00
Michal Simek
d2f059c3dc dt-bindings: xilinx: Add missing ids for PD
There are some new power domain IDs which are used in Linux kernel that's
why add them here too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e6092e1d3766c0ac11bf620820739c93ab677a85.1648626981.git.michal.simek@xilinx.com
2022-04-05 15:12:12 +02:00
Michal Simek
7ce9d921bd dt-bindings: phy: Sync phy.h with Linux kernel
Make sure that both files are in sync to have the same values in DTs.
The patch is fixing SPDX license as is used in the kernel and adding new
values for PHY_TYPE_DPHY and PHY_TYPE_CPHY.

SPDX license change was done by:
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
and new value added by:
Link: https://lore.kernel.org/r/20210617144349.28448-3-jonathan@marek.ca

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/06dbc03d4c9ac5d621341d8fb8cc16f489062b39.1648113469.git.michal.simek@xilinx.com
2022-03-29 09:17:49 +02:00
Marty E. Plummer
6d36e92d28 rockchip: rk3399: Add support for chromebook_kevin
Add support for Kevin, an RK3399-based convertible chromebook that is
very similar to Bob. This patch is mostly based on existing support for
Bob, with only minor changes for Kevin-specific things.

Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV,
so adjust it here in the dts as well. The rk3399-gru-kevin devicetree
has an unknown event code reference which has to be defined, set it
to the Linux counterpart. The new defconfig is copied from Bob with the
diffconfig:

     DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin"
     DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb"
     VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400
     VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600
    +TARGET_CHROMEBOOK_KEVIN y

With this Kevin can boot from SPI flash to a usable U-Boot prompt on the
display with the keyboard working, but cannot boot into Linux for
unknown reasons.

eMMC starts in a working state but fails to re-init, microSD card works
but at a lower-than-expected speed, USB works but causes a hang on
de-init. There are known workarounds to solve eMMC and USB issues.

Cc: Marty E. Plummer <hanetzer@startmail.com>
Cc: Simon Glass <sjg@chromium.org>
[Alper: commit message, resync config with Bob, update MAINTAINERS,
        add to Rockchip doc, add Kconfig help message, set regulator]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-03-18 18:12:03 +08:00
Pali Rohár
0934dddc64 arm: a37xx: Update DTS files to version from upstream Linux kernel
This change updates all Armada 37xx DTS files to version which is used by
Linux kernel v5.18.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Swapnil Jakhade
f74415a1ff dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
Add binding to specify Spread Spectrum Clocking mode used

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
Aswath Govindraju
55e1d7477b dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 09:41:27 -05:00
Aswath Govindraju
4f260bbeeb dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 09:41:27 -05:00
Angus Ainslie
881c8a6154 arm: dts: imx8mq kernel dts updates
Update to the 5.16 imx8mq dts files and dt bindings

Changes since v1:

Dropped rfkill.h that is not in linux mainline yet.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:02 +01:00