Commit graph

286 commits

Author SHA1 Message Date
Xu, Hong
ffa280fa53 AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Xu, Hong
f87353f0d9 AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Asen Dimov
3ad24802aa AT91: change common at91sam9261 files to compile with new scheme
Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Reinhard Meyer
b38d634b39 AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Andreas Bießmann
c23e5e7eda a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
The CONFIG_AT91RM9200_USART is an remnant of
18ed5e9550 which deleted the
at91rm9200_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:56 +02:00
Andreas Bießmann
8312af9f90 a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of
at91rm9200 arch code in arm920t.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
Andreas Bießmann
cf05528238 ARM: remove obsolete at91rm9200
The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
Aneesh V
b4dc644291 omap4: clock init support for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
d506719f7f omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
25223a68e5 omap: reuse omap3 gpio support in omap4
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
924eb369e3 omap4: sdram init changes for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
5ab12a9eeb omap4: add omap4460 revision detection
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
John Rigby
3decb14abe mkimage: Add OMAP boot image support
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
  SPL framework

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
8cf686e19b omap: add MMC and FAT support to SPL
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
  can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
  and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
  payload size and load address from this header. If the
  header is not detected assume u-boot.bin as payload

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
bcae721162 omap: add basic SPL support
- Provide alternate implementations of board_init_f()
  board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
  it to board config header from config.mk

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
033ca72438 armv7: start.S: fixes and enhancements for SPL
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
  vector

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
1e463866f5 omap4: automatic sdram detection
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.

This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.

Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
095aea293b omap4: calculate EMIF register values
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.

For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
2ae610f030 omap4: add sdram init support
Add support for the SDRAM controller (EMIF).

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
3776801d0a omap4: add clock support
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails

This work draws upon previous work done for x-loader by:
	Santosh Shilimkar <santosh.shilimkar@ti.com>
	Rajendra Nayak <rnayak@ti.com>

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
ad577c8a48 omap4: add OMAP4430 revision check
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
469ec1e353 omap4: cleanup pin mux data
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
  to SoC directory). Will help in having single SPL for all
  boards.
- Non-essential part(the pins not essential for u-boot to function)
  need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Sanjeev Premi
80bb756dbe omap3: Include array definition only when it is used
The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().

Enclose definition of this array in #ifdef...#endif for
the same.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:18 +02:00
Mike Williams
1626308797 cleanup: Fix typos and misspellings in various files.
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address

Signed-off-by: Mike Williams <mike@mikebwilliams.com>
2011-07-28 21:27:36 +02:00
Graeme Russ
17659d7de9 Timer: Remove reset_timer_masked()
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
2011-07-26 14:54:15 +02:00
Graeme Russ
53fc43c682 Timer: Fix at91rm9200/spi.c timer usage 2011-07-26 14:53:55 +02:00
Graeme Russ
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
Graeme Russ
5c8404aff1 Timer: Remove set_timer completely 2011-07-26 14:52:17 +02:00
Aneesh V
401bb30b6d replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:34 +02:00
David Jander
6e25b6ce5d ARM: MX5: Fix broken leftover TO-2 errata workaround
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.

Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
Stefano Babic
9f008bb47d MX31: Cleanup clock function
The patch provide the same API used with other i.MX
processors and get rid of mx31_ functions.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
Albert ARIBAUD
a55d23ccf6 Remove volatile qualifier in get_ram_size() calls
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-07-17 17:11:53 +02:00
Rob Herring
22193540c1 ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-17 11:24:35 +02:00
Stefano Babic
727024a9a4 MX27: Update to autogenerated asm-offsets.h
On i.MX27, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Stefano Babic
0edf8b5b2f MX5: Update to autogenerated asm-offsets.h
On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
23210d8e1b imx: Add auto generation of asm-offsets.h for imx25
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
dea5387d98 imx: Use correct imx25 reset.c
imx25 used the wrong reset.c from imx27

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
a7f39e7c22 imx: Add get_tbclk() function for imx25
Need this function for autoboot keyd

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Fabio Estevam
3f7bfbdd3c mx27: Make the UART port number explicit
mx27_uart_init_pins does the IOMUX setting for UART1 port.

Change the function name to make the UART port number explicit.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-14 15:41:24 +02:00
Matthias Weisser
f456445f29 build: Add targets for auto gen of asm-offsets.h and use it in imx35
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-14 15:41:24 +02:00
Andreas Bießmann
d703355fd1 arm920t/at91: add at91rm9200_devices.c
This is a copy of arm926ejs/at91 api for perpherial initialisation.
At the moment we just need the usart part of the api.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
Andreas Bießmann
6a372e940d arm920t/at91: use new clock.c features
This patch enables the new clock features from arm920t/at91/clock.c. This
is an required step to get at91rm9200_usart replaced by atmel_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Jens Scharsig <js_at_ng@scharsoft.de>
Cc: Eric Bénard <eric@eukrea.com>
2011-07-04 10:55:27 +02:00
Andreas Bießmann
c3a383f5bd arm920t/at91: add clock.c
This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The
arm926ejs specialities are removed from arm920t version and vice versa.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
Fabio Estevam
a6e961c292 MX5: Introduce a function for setting the chip select size
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
John Rigby
aadcfc179a OMAP[34]: fix broken timer
As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff.  This value is not only wrong but
illegal according to the reference manual.

One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command.  The sleep will hang
forever.

The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.

Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
2011-07-04 10:55:26 +02:00
Aneesh V
137db2d7f5 armv7: adapt s5pc1xx to the new cache maintenance framework
adapt s5pc1xx to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
45bf05854b armv7: adapt omap3 to the new cache maintenance framework
adapt omap3 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
8b457fa828 armv7: adapt omap4 to the new cache maintenance framework
adapt omap4 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
c2dd0d4554 armv7: integrate cache maintenance support
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
	- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
	- Make changes according to the new framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
Aneesh V
e47f2db537 armv7: rename cache related CONFIG flags
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF

Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
 * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
 * Changed all three flags to the final names suggested as above
   and accordingly changed the commit message
2011-07-04 10:55:25 +02:00