Commit graph

100 commits

Author SHA1 Message Date
Nishanth Menon
38e5a5abda ARM: OMAP4: Panda: rework DMM logic
Part of DMM logic is reuse from commit
47a4bea6af ("ARM: omap4: Update sdram
setting for panda rev A6") Which broke SDP4430 with ES2.3 (uses old
DDR).

So, to maintain support for newer DDR used in Panda ES rev B3, we
should, in addition to the commit
675cc77a3a ("ARM:OMAP4+: panda-es: Support
Rev B3 Elpida DDR2 RAM"), DDR timings, also do DMM configuration
specific to Panda.

Signed-off-by: Nishanth Menon <nm@ti.com>
2015-01-05 15:13:45 -05:00
Tom Rini
939911a64b armv7:TI: Add <asm/ti-common/sys_proto.h> and migrate omap_hw_init_context
The omap_hw_init_context function (and assorted helpers) is the same for
all OMAP-derived parts as when CHSETTINGS are used, that's the same and
our DDR base is also always the same.  In order to make this common we
simply need to update the names of the define for DDR address space
which is also common.

Cc: Sricharan R. <r.sricharan@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-05-23 19:40:05 -04:00
pekon gupta
e4426d07b6 ARM: omap4: add platform specific info for GPMC and ELM controllers
This patch moves platform specific information for GPMC and ELM controller
into separate header files, so that any derivative devices do not mess other
header files.

Platform specific information added into arch-xx/../hardware.h
 - CPU related platform specific details like base-address of GPMC and ELM

Platform specific information added into arch-xx/../mem.h
 - Generic configs for GPMC and ELM initialization.
 - Hardware parameters or constrains specific to GPMC and ELM IP like;
   number of max number of chip-selects available

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-05-23 16:12:02 -04:00
Wolfgang Denk
4e4685027c ARM: OMAP: hide custom bit manipulation function sr32()
The only remaining user of the custom bit manipulation function sr32()
is arch/arm/cpu/armv7/omap3/clock.c, so  make it a static function in
that file to prepare complete removal.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-04-17 14:39:54 -04:00
Marek Vasut
463bb19eeb spl: Fix guardian macros in spl.h
Fix the macros guarding the spl.h header for various platforms. Due to
a typo and a propagation of it, the macros went out-of-sync with their
ifdef check, so fix this.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-03-28 15:06:30 -04:00
pekon gupta
6aff050988 mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nand
omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-03-04 17:23:54 -06:00
pekon gupta
51d192c40d mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers into common omap_gpmc.h
Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related
defines and declarations scattered in SoC platform specific header files
like include/asm/arch-xx/cpu.h
However, GPMC hardware remains same across all platforms thus this patch merges
GPMC data scattered across different arch-xx specific header files into single
header file include/asm/arch/omap_gpmc.h

Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-03-04 17:23:54 -06:00
Jassi Brar
e81f63f0d2 ARM: OMAP4/5: Remove dead code against CONFIG_SYS_ENABLE_PADS_ALL
The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2014-01-24 09:38:39 -05:00
Lokesh Vutla
dcc2357638 ARM: OMAP4: Move TEXT_BASE down to non-HS limit
With the current scenario SPL size is being overlapped with the public
stack and not allowing any OMAP4 device to boot. So the suggestion came
up was to move the TEXT_BASE down to non-HS limit. Fixing the same and
also moving the SRAM_SCRATCH_SPACE_ADDR up to the end of image
downloadable area.
Discussion on this can be seen here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg127147.html

Tested on OMAP4460 PANDA.

Reported-by: Chao Xu <caesarxuchao@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-12 14:54:20 -05:00
Hardik Patel
675cc77a3a pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAM
Signed-off-by: Hardik Patel <hardik.patel@volansystech.com>
2013-12-04 11:41:13 -05:00
Dan Murphy
e84b8f6ce0 ARM: omap4-panda: Add MAC address creation for panda
Add a MAC address create based on the OMAP die ID registers.
Then poplulate the ethaddr enviroment variable so that the device
tree alias can be updated prior to boot.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
2013-10-14 16:06:53 -04:00
Albert ARIBAUD
e62d5fb0da Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-09-04 14:06:56 +02:00
Taras Kondratiuk
40aadf9201 ARM: OMAP4470: Add voltage and dpll data
OMAP4470 reference design uses TWL6032 PMIC
with a following connection scheme:
  VDD_CORE = TWL6032 SMPS2
  VDD_MPU  = TWL6032 SMPS1
  VDD_IVA  = TWL6032 SMPS5

Set voltage and frequency values according to
OMAP4470 Data Manual Operating Condition Addendum v0.7

Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Taras Kondratiuk
696f81f9a9 ARM: OMAP4470: Add OMAP4470 identification
Signed-off-by: Taras Kondratiuk <taras@ti.com>
2013-08-28 11:44:58 -04:00
Wolfgang Denk
bcd4d4eb2b SPDX-License-Identifier: fixing some problematic GPL-2.0 files
Unlike the other patches in this series so far, this commit fixes a
ambiguity in the license terms for some OMAP files:  the code was
originally derived from the Linux kernel sources, where it was clearly
marked as GPL-2.0 (i. e. without the "or later" part), but the U-Boot
version had a GPL-2.0+ file header added, apparently without
permission / relicensing from the original authors of the code.

Insert a GPL-2.0 SPDX-License-Identifier to fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
2013-08-19 15:34:13 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Tom Rini
fbbbc86e8e Merge branch 'master' of git://git.denx.de/u-boot-arm
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-12 10:36:48 -04:00
Axel Lin
87bd05d78f ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have different gpio count but currently omap_gpio driver uses hard
coded 192 which is wrong.

This patch fixes this issue by:
1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h.
2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5.

Thanks for Lubomir Popov to provide valuable comments to fix this issue.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
Acked-by: Heiko Schocher <hs@denx.de>
2013-07-02 09:21:16 -04:00
Tom Rini
41341221d1 Merge branch 'master' of git://git.denx.de/u-boot-arm
Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR

Conflicts:
	arch/arm/include/asm/arch-omap5/omap.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-06-13 15:16:15 -04:00
Lokesh Vutla
97405d843e ARM: DRA7xx: clocks: Update PLL values
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-06-10 08:43:10 -04:00
Sricharan R
f9b814a8e9 ARM: DRA7xx: Correct the SYS_CLK to 20MHZ
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:10 -04:00
Lokesh Vutla
63fc0c775c ARM: DRA7xx: power Add support for tps659038 PMIC
TPS659038 is the power IC used in DRA7XX boards.
Adding support for this and also adding pmic data
for DRA7XX boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
Lokesh Vutla
4ca94d8186 ARM: OMAP4+: pmic: Make generic bus init and write functions
Voltage scaling can be done in two ways:
-> Using SR I2C
-> Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
Lokesh Vutla
af1d002f89 ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.h
To be consistent with other ARM platforms,
renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
Lokesh Vutla
9239f5b625 ARM: OMAP4+: Cleanup header files
After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-06-10 08:43:09 -04:00
Andrii Tseglytskyi
4d0df9c1e9 OMAP3+: introduce generic ABB support
Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Adaptive Body-Bias ldos are present for some voltage domains
starting with OMAP3630. There are three modes of operation:

* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
  performance at the cost of power.  Used to operate safely at high
  OPPs.
* Reverse Body-Bias - applies voltage bias to decrease leakage and
  save power.  Used to save power at lower OPPs.

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
2013-06-10 08:43:09 -04:00
Tom Rini
edfcf85a0a am33xx/omap4+: Move SRAM_SCRATCH_SPACE_ADDR to <asm/arch/omap.h>
The location of valid scratch space is dependent on SoC, so move that
there.  On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR.  On
am33xx/ti814x we want to use what the ROM defines as "public stack"
which is the area after our defined download image space.  Correct the
comment about and location of CONFIG_SPL_TEXT_BASE.

Signed-off-by: Tom Rini <trini@ti.com>
2013-06-06 08:57:45 -04:00
Tom Rini
4596dcc1d4 am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.c
We need to call the save_omap_boot_params function on am33xx/ti81xx and
other newer TI SoCs, so move the function to boot-common.  Only OMAP4+
has the omap_hw_init_context function so add ifdefs to not call it on
am33xx/ti81xx.  Call save_omap_boot_params from s_init on am33xx/ti81xx
boards.

Reviewed-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-06-05 08:46:49 -04:00
SRICHARAN R
4a0eb75752 ARM: OMAP: Cleanup boot parameters usage
The boot parameters are read from individual variables
assigned for each of them. This been corrected and now
they are stored as a part of the global data 'gd'
structure. So read them from 'gd' instead.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini <trini@ti.com>
2013-05-10 08:25:56 -04:00
SRICHARAN R
f92f2277a6 ARM: OMAP4/5: Make OMAPx_SRAM_SCRATCH_ defines common
These defines are same across OMAP4/5. So move them to
omap_common.h. This is required for the patches that
follow.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-05-10 08:25:56 -04:00
SRICHARAN R
76db5b8f59 ARM: OMAP: Make omap_boot_parameters common across socs
omap_boot_parameters is same and defined for each
soc. So move this to a common place to reuse it
across socs.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-05-10 08:25:56 -04:00
Lokesh Vutla
0b1b60c779 ARM: OMAP5: Fix warm reset with USB cable connected
Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.

There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.

In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'

In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[rnayak@ti.com: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
2013-05-10 08:25:55 -04:00
Tom Rini
c3d2c24f6c OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
In the case of booting from certain peripherals, such as UART, we must
not see what the device descriptor says for RAW or FAT mode because in
addition to being nonsensical, it leads to a hang.  This is why we have
a test currently for the boot mode being within range.  The problem
however is that on some platforms we get MMC2_2 as the boot mode and not
the defined value for MMC2, and in others we get the value for MMC2_2.
This is required to fix eMMC booting on omap5_uevm.

Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on
classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC).

Signed-off-by: Tom Rini <trini@ti.com>
2013-04-08 11:29:34 -04:00
Lokesh Vutla
d3d82e9fc6 arm: omap4: Fix SDRAM AUTO DETECTION
Commit "8602114 omap: emif: configure emif only when required"
breaks SDRAM_AUTO_DETECTION.
The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection)
done in do_sdram_init(). The above commit moves dmm_init() above
do_sdram_init() because of which dmm_init() uses uninitialized
emif_sizes[].
So instead of using global emif_sizes[], get sdram details locally
and calculate emif sizes.

Reported-by: Michael Cashwell <mboards@prograde.net>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-04-08 11:29:34 -04:00
Lokesh Vutla
c43c8339fe ARM: OMAP4+: Make control module register structure generic
A seperate omap_sys_ctrl_regs structure is defined for
omap4 & 5. If there is any change in control module for
any of the ES versions, a new structure needs to be created.
In order to remove this dependency, making the register
structure generic for all the omap4+ boards.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
SRICHARAN R
3fcdd4a5f8 ARM: OMAP4+: Clean up the pmic code
The pmic code is duplicated for OMAP 4 and 5.
Instead move the data to Soc specific place and
share the code.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
SRICHARAN R
ee9447bfe3 ARM: OMAP4+: Cleanup the clocks layer
Currently there is quite a lot of code which
is duplicated in the clocks code for OMAP 4 and 5
Socs. Avoiding this here by moving the clocks
data to a SOC specific place and the sharing the
common code.

This helps in addition of a new Soc with minimal
changes.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:09 -04:00
SRICHARAN R
01b753ff7b ARM: OMAP4+: Change the PRCM structure prototype common for all Socs
The current PRCM structure prototype directly matches the hardware
register layout. So there is a need to change this for every new silicon
revision which has register space changes.

Avoiding this by making the prototye generic and populating the register
addresses seperately for all Socs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-03-11 11:06:09 -04:00
Enric Balletbo i Serra
66c7f39923 SPL: ONENAND: Fix some ONENAND related defines.
Some ONENAND related defines use the term ONE_NAND instead of
ONENAND, as the technology name is ONENAND this patch replaces
all these defines.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2013-03-08 16:41:14 -05:00
Nikita Kiryanov
fa3a69289f omap: consolidate common mmc definitions
The various mmc_host_def.h files are almost identical.
Reduce code duplication by moving the similar definitions to a common
header file.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-03-08 16:41:12 -05:00
Tom Rini
55cdbb8d4e ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and
add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:57 -07:00
Tom Rini
861a86f460 omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()
Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing.  Change how this works to
be opt-in and only turned on for omap4/5 now.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Koen Kooi
a532278074 omap4 i2c: add support for i2c bus 4
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
2012-09-06 06:01:09 +02:00
Tom Rini
41aebf8106 omap4/5/am33xx: Make lowlevel_init available to all armv7 platforms
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms.  As part of this we change some of the macros that are used
to be more clear.  Previously (except for am335x evm) we had been
setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
equivalent to simply referencing NON_SECURE_SRAM_END.  On am335x evm we
should have been doing this initially and do now.

Cc: Sricharan R <r.sricharan@ti.com>
Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:19 +02:00
Lokesh Vutla
38f25b125e OMAP4+: Force DDR in self-refresh after warm reset
Errata ID:i727

Description: The refresh rate is programmed in the EMIF_SDRAM_REF_CTRL[15:0]
REG_REFRESH_RATE parameter taking into account frequency of the device.
When a warm reset is applied on the system, the OMAP processor restarts
with another OPP and so frequency is not the same. Due to this frequency
change, the refresh rate will be too low and could result in an unexpected
behavior on the memory side.

Workaround:
The workaround is to force self-refresh when coming back from the warm reset
with the following sequence:
• Set EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2
• Set EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM to 0x0
• Do a dummy read (loads automatically new value of sr_tim)
This will reduce the risk of memory content corruption, but memory content
can't be guaranteed after a warm reset.

This errata is impacted on
OMAP4430: 1.0, 2.0, 2.1, 2.2, 2.3
OMAP4460: 1.0, 1.1
OMAP4470: 1.0
OMAP5430: 1.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
2012-07-07 14:07:35 +02:00
Lokesh Vutla
702395073f ARM: OMAP3+: Detect reset type
Certain modules are not affected by means of
a warm reset and need not be configured again.
Adding an API to detect the reset reason warm/cold.

This will be used to skip the module configurations
that are retained across a warm reset.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:34 +02:00
SRICHARAN R
e423a8f76d ARM: OMAP4: Correct the lpddr2 io settings register value.
To meet certain timing requirements on the lpddr2 cmd and data phy
interfaces ,lpddr iopads have to be configured as differential buffers
and a Vref has to be internally generated and provided to these buffers.

Correcting the above settings here.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
753bae8c5d OMAP5: DPLL core lock for OMAP5432
No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Aneesh V
03f69dc6fd omap4+: Avoid using __attribute__ ((__packed__))
Avoid using __attribute__ ((__packed__)) unless it's
absolutely necessary. "packed" will remove alignment
requirements for the respective objects and may cause
alignment issues unless alignment is also enforced
using a pragma.

Here, these packed attributes were causing alignment
faults in Thumb build.

Signed-off-by: Aneesh V <aneesh@ti.com>
2012-05-15 08:31:26 +02:00
SRICHARAN R
d417d1db5f OMAP3+: reset: Create a common reset layer.
The reset.S has the function to do a warm reset on OMAP
based socs. Moving this to a reset.c file so that this
acts a common layer to add any reset related functionality
for the future.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:25 +02:00