mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
am33xx/omap4+: Move SRAM_SCRATCH_SPACE_ADDR to <asm/arch/omap.h>
The location of valid scratch space is dependent on SoC, so move that there. On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR. On am33xx/ti814x we want to use what the ROM defines as "public stack" which is the area after our defined download image space. Correct the comment about and location of CONFIG_SPL_TEXT_BASE. Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
parent
eecf9e2e78
commit
edfcf85a0a
7 changed files with 10 additions and 10 deletions
|
@ -31,8 +31,10 @@
|
|||
#ifdef CONFIG_AM33XX
|
||||
#define NON_SECURE_SRAM_START 0x402F0400
|
||||
#define NON_SECURE_SRAM_END 0x40310000
|
||||
#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000
|
||||
#elif defined(CONFIG_TI814X)
|
||||
#define NON_SECURE_SRAM_START 0x40300000
|
||||
#define NON_SECURE_SRAM_END 0x40320000
|
||||
#define SRAM_SCRATCH_SPACE_ADDR 0x4031B800
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -141,6 +141,7 @@ struct s32ktimer {
|
|||
*/
|
||||
#define NON_SECURE_SRAM_START 0x40304000
|
||||
#define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */
|
||||
#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
|
||||
/* base address for indirect vectors (internal boot mode) */
|
||||
#define SRAM_ROM_VECT_BASE 0x4030D000
|
||||
#endif
|
||||
|
|
|
@ -188,6 +188,7 @@ struct s32ktimer {
|
|||
*/
|
||||
#define NON_SECURE_SRAM_START 0x40300000
|
||||
#define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */
|
||||
#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
|
||||
/* base address for indirect vectors (internal boot mode) */
|
||||
#define SRAM_ROM_VECT_BASE 0x4031F000
|
||||
|
||||
|
|
|
@ -591,7 +591,6 @@ static inline u32 omap_revision(void)
|
|||
/*
|
||||
* SRAM scratch space entries
|
||||
*/
|
||||
#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
|
||||
#define OMAP_SRAM_SCRATCH_OMAP_REV SRAM_SCRATCH_SPACE_ADDR
|
||||
#define OMAP_SRAM_SCRATCH_EMIF_SIZE (SRAM_SCRATCH_SPACE_ADDR + 0x4)
|
||||
#define OMAP_SRAM_SCRATCH_EMIF_T_NUM (SRAM_SCRATCH_SPACE_ADDR + 0xC)
|
||||
|
|
|
@ -306,12 +306,11 @@
|
|||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
/*
|
||||
* Place the image at the start of the ROM defined image space and leave
|
||||
* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
|
||||
* Place the image at the start of the ROM defined image space.
|
||||
* We limit our size to the ROM-defined downloaded image area, and use the
|
||||
* rest of the space for stack.
|
||||
*/
|
||||
#define CONFIG_SPL_TEXT_BASE 0x402F0500
|
||||
#define CONFIG_SPL_TEXT_BASE 0x402F0400
|
||||
#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
|
||||
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
|
||||
|
||||
|
|
|
@ -215,12 +215,11 @@
|
|||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
/*
|
||||
* Place the image at the start of the ROM defined image space and leave
|
||||
* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
|
||||
* Place the image at the start of the ROM defined image space.
|
||||
* We limit our size to the ROM-defined downloaded image area, and use the
|
||||
* rest of the space for stack.
|
||||
*/
|
||||
#define CONFIG_SPL_TEXT_BASE 0x402F0500
|
||||
#define CONFIG_SPL_TEXT_BASE 0x402F0400
|
||||
#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
|
||||
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
|
||||
|
||||
|
|
|
@ -205,12 +205,11 @@
|
|||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
/*
|
||||
* Place the image at the start of the ROM defined image space and leave
|
||||
* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
|
||||
* Place the image at the start of the ROM defined image space.
|
||||
* We limit our size to the ROM-defined downloaded image area, and use the
|
||||
* rest of the space for stack.
|
||||
*/
|
||||
#define CONFIG_SPL_TEXT_BASE 0x402F0500
|
||||
#define CONFIG_SPL_TEXT_BASE 0x402F0400
|
||||
#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
|
||||
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
|
||||
|
||||
|
|
Loading…
Reference in a new issue