Commit graph

802 commits

Author SHA1 Message Date
Wolfgang Denk
0cf207ec01 WS cleanup: remove SPACE(s) followed by TAB
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 09:08:16 -04:00
Wolfgang Denk
66356b4c06 WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Guillaume La Roque
df3ab898f6 arm: mediatek: merge board Kconfigs into mach-mediatek
On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME
variables from defconfig.
This is because in board/mediatek/mtXXXX/Kconfig this value was override
by default due to the if CONFIG_TARGET_MTXXXX condition.

Merge all the Kconfigs to the mach-medatek/Kconfig.

This way:
- we only define SYS_{SOC,VENDOR} once
- all board definitions are in a single place, simplifying the build logic.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
2021-09-23 14:15:32 -04:00
Marek Vasut
1f391c3454 lmb: Switch to generic arch_lmb_reserve_generic()
Switch arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() to
arch_lmb_reserve_generic().

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Hai Pham <hai.pham.ud@renesas.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wolfgang Denk <wd@denx.de>
2021-09-23 14:15:32 -04:00
Tom Rini
6674edaabf Prepare v2021.10-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmFBKRgACgkQFHw5/5Y0
 tyw/PwwAtGB3rBeYW4rjWuMC5WP1UDTnvZIAok5ImWumWDahjDm8Yq2VCzAe9adw
 EYBjuNmaNl9aQvGVqlVJeIcLku5MLuLQu2za8vhc1R8X9VTPPY+LLTcdOokOmB8y
 8JiaE7fJsb1bZeV+diF9tss3B0IkUrwSJtW1d+qfdz/4UiRvwK5BhnZgzIobDldO
 g1Ldz/xiR2GOAXlUMwDrNAi6qNvmeAqRsQxySVrjltAV2ST7LJnOiHuWvJX6g6VS
 l796Hleh/kULfEW6n+1ZaTNqvVRcJ8xYSOG8w8y9u6HuPBA3JrYH1p1Eo5n7PPDv
 US71Iy/ncweTyfTMEBThWLqjHOQ05sVkWX/r4fj2iJRli+Og53lE1fVJ4ajIx7vz
 Tc76wI43i0I5lr2yTErjUG6EzDDoueqd+c8BwxihNLUK/+QG31xoCEMfC80C25ro
 QhYVFgiPWN0ySUD5M5tbGXODvfNNIDKXpY5oSOTVtemZtDEMpO2zBM1s/K3RV7Ud
 Je9Pj0Cu
 =Me42
 -----END PGP SIGNATURE-----

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt
2021-09-16 10:29:40 -04:00
Simon Glass
3232bdf0b3 pci: Drop DM_PCI
This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-13 18:23:13 -04:00
Simon Glass
2a73606668 serial: Rename SERIAL_SUPPORT to SERIAL
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:01 -04:00
Michal Simek
b4c2c151b1 Kconfig: Remove all default n/no options
default n/no doesn't need to be specified. It is default option anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
Tom Rini
a2ac2b964b Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SKIP_LOWLEVEL_INIT
   CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
Tom Rini
ab92b38a01 Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage.  For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol.  This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:47:49 -04:00
Simon Glass
7e5f460ec4 global: Convert simple_strtoul() with hex to hextoul()
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.

Add a proper comment to simple_strtoul() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02 13:32:14 -04:00
Daniel Schwierzeck
526ceb4387 MIPS: malta: enable PCI driver model
Enable DM_PCI and DM_ETH on MIPS Malta.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-07-18 20:37:39 +02:00
Daniel Schwierzeck
73be5636f4 MIPS: malta: add DT bindings for PCI host controller
Add DT binding for GT64120 and MSC01 PCI controllers. Only
GT64120 is enabled by default to support Qemu. The MSC01 node
will be dynamically enabled by Malta board code dependent
on the plugged core card.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-07-18 20:37:39 +02:00
Daniel Schwierzeck
5308a71db8 MIPS: remove deprecated qemu_mips board
Remove qemu_mips boards because DM migration doesn't make sense.
The board support for qemu_mips is already marked as deprecated
in Qemu in favour of the Malta board. Also qemu_mips support
has been removed from Linux a long time ago.

The official replacement is the Malta board. The same Malta U-Boot
image can be used with Qemu and on physical hardware.
All combinations of Big Endian and Little Endian as well as 32 bit
and 64 bit are supported.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-05-25 15:35:06 +02:00
Marek Behún
236f2ec432 treewide: Convert macro and uses of __section(foo) to __section("foo")
This commit does the same thing as Linux commit 33def8498fdd.

Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.

Remove the quote operator # from compiler_attributes.h __section macro.

Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Tom Rini
4dda435131 - MIPS: octeon: fix minor bugs of initial merge
- MIPS: octeon: add support for QLM and PCI-E controller
 - MIPS: octeon: add support for AHCI and SATA
 - MIPS: octeon: add E1000 ethernet support
 - MIPS: octeon: add Octeon III NIC23 board
 - ata/scsi: add support for Big Endian platforms
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAmCEf04ACgkQKPlOlyTy
 XBj2Aw//SxPX48XynT979cMIOoylO6Rs1saWtQr32YmycWnGC0/wvFNPU/kjNP/a
 jinOxvY2TSBNqToSuCDZxGXyijMIdAnWVCQCUXmah7bZ+GtiYWR0SHNO0TQ+qrBW
 06CC7hgQQqQswGClJe4njwTyVIzTQvyo/UdjS6RWggDZPsnGpyMlR5O56ZCNNH8o
 1XFCG8hSrQBRO38RpXciGS3dFeaqOQy96K9M5pellf9Fh5a+jHyAmK8Z/0R+T6cG
 +PoNh6qZAsXFj0PVuvu0CaXFHpP+fhdA4kEwt64PJCe8D3x7d05COuN0bL+e6D6u
 E4cSnkjmzNgYvoi4YAGaQN9f4PKPSMHuYf7YdIBFCQQ8OtxNXpUHOg0zr4SRnq/C
 ypq285f2O7Aq+3t0BrC7jTjo+Y2PzVIUR8MXpvh698ZSdJnqOlJf0y5tRwdhf/+k
 gh+rT7mWIOoRRWpb6qHMUr5gnparl0gOykspMlQ2NKB+kfmC4RP2pYxQFp82TFIq
 ZMUaXer2/g5dVptEhTU0vBsTrk7s/u239WtwyXpOCdoM6sI/FoMoiCoQoD2isKP6
 mUv/iwTpfNTtQnx5MM2Xsu+8pzcXjaVeoMaNcI55jZ2QTCoMAFA6odYTk+GHS3Vx
 Yt3TLrH6O46PXNSULROkmTR4RgiDHcGCX/HGTKkcA/+X9GDjjNc=
 =JwRN
 -----END PGP SIGNATURE-----

Merge tag 'mips-pull-2021-04-24' of https://source.denx.de/u-boot/custodians/u-boot-mips

- MIPS: octeon: fix minor bugs of initial merge
- MIPS: octeon: add support for QLM and PCI-E controller
- MIPS: octeon: add support for AHCI and SATA
- MIPS: octeon: add E1000 ethernet support
- MIPS: octeon: add Octeon III NIC23 board
- ata/scsi: add support for Big Endian platforms
2021-04-24 19:39:14 -04:00
Aaron Williams
b1d9554e05 mips: octeon: ebb7304: Add support for some I2C devices
This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:23:30 +02:00
Aaron Williams
7f0aa48d86 mips: octeon: dts/dtsi: Change UART DT node to use clocks property
We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:22:55 +02:00
Stefan Roese
ec85347102 mips: octeon: Add Octeon III NIC23 board support
This patch adds the basic support for the PCIe target board equipped
with the Octeon III CN2350 SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:22:55 +02:00
Stefan Roese
60c8efac8f mips: octeon: mrvl, cn73xx.dtsi: Add AHCI/SATA DT node
Add the AHCI compatible SATA DT node to the Octeon CN73xx dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:22:55 +02:00
Stefan Roese
6094145958 mips: octeon: cpu.c: Enable AHCI/SATA support
For easy AHCI/ SATA integration, this patch adds board_ahci_enable()
for the MVEBU AHCI driver, which will be used by this platform. This
platform specific "enable" function will setup the proper endian
swapping in the AHCI controller so that it can be used by the common
AHCI code.

Additionally the endian swizzle entry for AHCI in
octeon_should_swizzle_table[] is removed, as this enabled the original
lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup
to work correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:22:55 +02:00
Stefan Roese
480fa8346b mips: octeon: cpu.c: Add arch_misc_init() for pci-console & pci-bootcmd
This patch adds the necessary platform infrastructure code, so that the
MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can
be used. This is e.g. the bootmem initialization in a compatible way to
the Marvell 2013 U-Boot, so that the exisiting PC remote tools like
"oct-remote-console" & "oct-remote-load" can be used. This is be done in
the newly introduced arch_misc_init(), which calls the necessary init
functions when enabled.

These patches are in preparation for the MIPS Octeon NIC23 board
support, which is a desktop PCIe target board enabling these features.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:22:55 +02:00
Stefan Roese
84287f9f6f mips: octeon: cvmx-coremask.h: Fix cvmx_coremask_dprint() with DEBUG defined
As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros.
This patch switches to the unfortunately necessary #ifdef usage again
to make it work correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:22:55 +02:00
Stefan Roese
2b6a72ed08 mips: octeon: cvmx-bootmem: Fix compare in "if" statement
While porting from the Marvell source, I introduced a bug by misplacing
the parenthesis. This patch fixes this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:22:55 +02:00
Stefan Roese
39e0f648d3 mips: octeon: Move CVMX_SYNC from octeon_ddr.h to cvmx-regs.h
This makes is easier to use this macro from non-DDR related files.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:22:55 +02:00
Stefan Roese
827edf1818 mips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT node
This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi
file.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:25 +02:00
Stefan Roese
99f492b75f mips: octeon: Kconfig: Enable CONFIG_SYS_PCI_64BIT
Setting CONFIG_SYS_PCI_64BIT is needed for correct PCIe functionality on
MIPS Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:25 +02:00
Stefan Roese
5d64eeb555 mips: octeon: Makefile: Enable building of the newly added C files
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
5aeac5c4d5 mips: octeon: Add octeon_qlm.c
Import octeon_qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
283992f243 mips: octeon: Add octeon_fdt.c
Import octeon_fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
b8806c4e7a mips: octeon: Add cvmx-qlm.c
Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
9e0c83ad45 mips: octeon: Add cvmx-pcie.c
Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
d15ca6b444 mips: octeon: Add cvmx-helper.c
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
58cc84c128 mips: octeon: Add cvmx-helper-util.c
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
adc9a183c0 mips: octeon: Add cvmx-helper-jtag.c
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
251d65d440 mips: octeon: Add cvmx-helper-fdt.c
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
b9a6098cf6 mips: octeon: Add cvmx-helper-cfg.c
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Stefan Roese
468b61fd99 mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to mach
To match all other cvmx-* header, this patch moves the already existing
cvmx-lmcx-defs.h header one directory up.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Stefan Roese
b0f4ba0242 mips: octeon: Misc changes required because of the newly added headers
With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:03:24 +02:00
Aaron Williams
fe3334d0a3 mips: octeon: Add misc remaining header files
Import misc remaining header files from 2013 U-Boot. These will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23 21:03:08 +02:00
Aaron Williams
deb8b23bc0 mips: octeon: Add cvmx-sso-defs.h header file
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
693a776d4d mips: octeon: Add cvmx-sriox-defs.h header file
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
d9cde2999c mips: octeon: Add cvmx-sriomaintx-defs.h header file
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
9d9203c442 mips: octeon: Add cvmx-smix-defs.h header file
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
3b8cca7e46 mips: octeon: Add cvmx-sli-defs.h header file
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
dc7828d9e2 mips: octeon: Add cvmx-sata-defs.h header file
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
d96ed60b17 mips: octeon: Add cvmx-rst-defs.h header file
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
4bfe497d29 mips: octeon: Add cvmx-pow-defs.h header file
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
1c0bf7905c mips: octeon: Add cvmx-pko-defs.h header file
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00
Aaron Williams
aee94afd66 mips: octeon: Add cvmx-pki-defs.h header file
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23 21:02:12 +02:00