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mips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT node

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This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi
file.

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2020-12-11 17:06:09 +01:00 • committed by Daniel Schwierzeck
parent 99f492b75f
commit 827edf1818
1 changed files with 16 additions and 0 deletions
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16
arch/mips/dts/mrvl,cn73xx.dtsi
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@ -230,5 +230,21 @@
dr_mode = "host";
};
};
/* PCIe 0 */
pcie0: pcie@1180069000000 {
compatible = "marvell,pcie-host-octeon";
reg = <0 0xf2600000 0 0x10000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
dma-coherent;
bus-range = <0 0xff>;
marvell,pcie-port = <0>;
ranges = <0x81000000 0x00000000 0xd0000000 0x00011a00 0xd0000000 0x00000000 0x01000000 /* IO */
0x02000000 0x00000000 0xe0000000 0x00011b00 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
0x43000000 0x00011c00 0x00000000 0x00011c00 0x00000000 0x00000010 0x00000000>;/* prefetchable memory */
};
};
};