Commit graph

115 commits

Author SHA1 Message Date
Patrick Delaunay
d96315411c reset: scmi: define LOG_CATEGORY
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23 13:53:03 -05:00
Samuel Holland
21d314a661 clk: sunxi: Move header out of arch directory
The CCU header is only used by the DM drivers, not any platform code.
Its current location adds an artificial dependency on CONFIG_ARM and
ARCH_SUNXI, which will be problematic when adding the CCU driver for
a RISC-V sunxi platform.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
Wolfgang Denk
0a50b3c97b WS cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-30 08:08:56 -04:00
Wolfgang Denk
66356b4c06 WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Michal Simek
3f123b7424 reset: zynqmp: Add reset controller for ZynqMP SoC
Add firmware based reset controller for Xilinx ZynqMP SoC to let other
drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but
support for Xilinx Versal can be simply added. That's why reset_id and
nr_reset are assigned in probe folder.
Driver is inpired by driver from Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:03 +02:00
Chia-Wei Wang
bc7b38450b reset: ast2600: Fix missing reference operator
Fix missing reference operator '&' to correctly get
HW register addresses for writel().

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-07-24 08:57:53 -04:00
Simon Glass
ca4c24509c reset: Avoid a warning in devm_reset_bulk_get_by_node()
The devres_alloc() function is intended to avoid the need for freeing
memory, although in practice it may not be enabled, thus leading to a true
leak.

Nevertheless this is intended. Add a comment to explain this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 312952)
2021-07-15 18:42:05 -04:00
Kunihiko Hayashi
34707b32ed reset: uniphier: Add PCIe reset entry
Add reset control for PCIe controller on each SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2021-07-14 16:48:06 -04:00
Patrick Delaunay
b953ec2bca dm: define LOG_CATEGORY for all uclass
Define LOG_CATEGORY for all uclass to allow filtering with
log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06 10:38:03 -06:00
Green Wan
70415e1e52 board: sifive: add HiFive Unmatched board support
Add defconfig and board support for HiFive Unmatched.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31 16:35:55 +08:00
Green Wan
d56d79ed27 drivers: clk: add fu740 support
Add fu740 support. One abstract layer is added for supporting
multiple chips such as fu540 and fu740.

Signed-off-by: Green Wan <green.wan@sifive.com>
2021-05-31 16:35:54 +08:00
Patrice Chotard
6d734be905 reset: stm32: Fix bank and offset computation
BITS_PER_LONG is used to represent register's size which is 32.
But when compiled on arch64, BITS_PER_LONG is then equal to 64.

Fix bank and offset computation to make it work on arch32 and
arch64 and ensure that register's size is always equal to 32.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-05-28 11:24:02 +02:00
Neil Armstrong
67e6966078 reset: fix reset_get_by_index_nodev index handling
This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.

The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.

This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.

Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-04-27 08:07:21 -04:00
Bin Meng
ae2d9506a3 riscv: sifive: Rename fu540 board to unleashed
In preparation to add SiFive Unmatched board support, let's rename
the existing fu540 board to unleashed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-04-08 15:37:29 +08:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Weijie Gao
8d6465ba53 reset: reset-mtmips: add DM_FLAG_PRE_RELOC flag
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Chia-Wei, Wang
9fc21086b7 reset: aspeed: Add AST2600 reset support
Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Patrick Delaunay
829c92b1ee reset: stm32-reset: migrate trace to dev and log macro
Change debug to dev_dbg macro and define LOG_CATEGORY.

Remove the "%s:" __func__  header as it is managed by dev macro
(dev->name is displayed).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
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Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
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Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
65e25bea59 dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
f10643cf8a dm: core: Access device ofnode through functions
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
0fd3d91152 dm: Use access methods for dev/uclass private data
Most drivers use these access methods but a few do not. Update them.

In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-01-05 12:24:40 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Patrick Delaunay
d8d29a4489 reset: stm32: Add support of MCU HOLD BOOT
Handle the register RCC_MP_GCR without SET/CLR registers
but with a direct access to bit BOOT_MCU:
- deassert => set the bit: The MCU will not be in HOLD_BOOT
- assert => clear the bit: The MCU will be set in HOLD_BOOT

With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
added in binding stm32mp1-resets.h

Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 11:32:31 +01:00
Chia-Wei, Wang
b2424cd2f4 cosmetic: reset: ast2500: Rename driver and configs
1. Rename AST2500 reset driver from ast2500-reset.c
   to reset-ast2500.c
2. Rename AST2500 reset kconfig option from AST2500_RESET
   to RESET_AST2500

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-10-22 11:26:14 -04:00
Chia-Wei, Wang
611a28ce27 reset: ast2500: Use SCU for reset control
The System Control Unit (SCU) controller of Aspeed
SoCs provides the reset control for each peripheral.

This patch refactors the reset method to leverage
the SCU reset control. Thus the driver dependency
on watchdog including dedicated WDT API and reset
flag encoding can be eliminated.

The Kconfig description is also updated accordingly.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-10-22 11:26:14 -04:00
Patrick Delaunay
89f68302ca dm: add cells_count parameter in *_count_phandle_with_args
The cell_count argument is required when cells_name is NULL.

This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args

This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.

For example:
  count = dev_count_phandle_with_args(dev, "array", NULL, 3);

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06 09:07:54 -06:00
Etienne Carriere
34d76fefb2 reset: add reset controller driver for SCMI agents
This change introduces a reset controller driver for SCMI agent devices.
When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
binds a reset controller device for each SCMI reset domain protocol
devices enabled in the FDT.

SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also enabled.

SCMI Reset Domain protocol is defined in the SCMI specification [1].

Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-30 11:55:23 -04:00
Jean-Jacques Hiblot
bad2433151 test: reset: Add tests for the managed API
The tests are basically the same as for the regular API. Except that
the reset are initialized using the managed API, and no freed manually.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
2020-09-30 11:55:22 -04:00
Jean-Jacques Hiblot
139e4a1cbe drivers: reset: Add a managed API to get reset controllers from the DT
Add managed functions to get a reset_ctl from the device-tree, based on a
name or an index.
Also add a managed functions to get a reset_ctl_bulk (array of reset_ctl)
from the device-tree.

When the device is unbound, the reset controllers are automatically
released and the data structure is freed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
2020-09-30 11:55:22 -04:00
Robert Marko
8ef7df5df3 reset: Add IPQ40xx reset controller driver
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the reset controller.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-18 16:20:47 -04:00
Masahiro Yamada
702e57e113 treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.

To generate this commit, I ran the following semantic patch
excluding include/dm/.

  <smpl>
  @@
  type T;
  expression dev;
  @@
  -(T *)devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  @@
  expression dev;
  @@
  -devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:37 -06:00
Sagar Shrikant Kadam
ed50d3fae4 configs: reset: fu540: enable dm reset framework for SiFive
Add necessary defconfig and Kconfig entries to enable SiFive SoC's
reset driver so as to utilise U-Boot's reset framework.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Sagar Shrikant Kadam
d04a46426b sifive: reset: add DM based reset driver for SiFive SoC's
PRCI module within SiFive SoC's has register with which we can
reset the sub-systems within the SoC. The resets to DDR and ethernet
sub systems within FU540-C000 SoC are active low, and are hold low
by default on power-up. Currently these are directly asserted within
prci driver via register read/write.
With the DM based reset driver support here, we bind the reset
driver with clock (prci) driver and assert the reset signals of
both sub-system's appropriately.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-08-04 09:19:41 +08:00
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Nicolas Saenz Julienne
f676eb217b reset: Add Raspberry Pi 4 firmware reset controller
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Sean Anderson
038b13ee81 reset: Add generic reset driver
This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01 15:01:21 +08:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Trevor Woerner
1bc5d3a568 drivers/reset/Kconfig: fix typo
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
71f6354b0e rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Tom Rini
9a8942b53d sandbox conversion to SDL2
TPM TEE driver
 Various minor sandbox video enhancements
 New driver model core utility functions
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Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
2020-02-11 10:58:41 -05:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00