riscv: sifive: Rename fu540 board to unleashed

In preparation to add SiFive Unmatched board support, let's rename
the existing fu540 board to unleashed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
Bin Meng 2021-03-17 11:10:58 +08:00 committed by Leo Yu-Chi Liang
parent be5c442a15
commit ae2d9506a3
14 changed files with 20 additions and 19 deletions

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@ -17,8 +17,8 @@ config TARGET_MICROCHIP_ICICLE
config TARGET_QEMU_VIRT
bool "Support QEMU Virt Board"
config TARGET_SIFIVE_FU540
bool "Support SiFive FU540 Board"
config TARGET_SIFIVE_UNLEASHED
bool "Support SiFive Unleashed Board"
config TARGET_SIPEED_MAIX
bool "Support Sipeed Maix Board"
@ -55,7 +55,7 @@ config SPL_SYS_DCACHE_OFF
source "board/AndesTech/ax25-ae350/Kconfig"
source "board/emulation/qemu-riscv/Kconfig"
source "board/microchip/mpfs_icicle/Kconfig"
source "board/sifive/fu540/Kconfig"
source "board/sifive/unleashed/Kconfig"
source "board/sipeed/maix/Kconfig"
# platform-specific options below

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb

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@ -1,7 +1,7 @@
if TARGET_SIFIVE_FU540
if TARGET_SIFIVE_UNLEASHED
config SYS_BOARD
default "fu540"
default "unleashed"
config SYS_VENDOR
default "sifive"
@ -10,7 +10,7 @@ config SYS_CPU
default "fu540"
config SYS_CONFIG_NAME
default "sifive-fu540"
default "sifive-unleashed"
config SYS_TEXT_BASE
default 0x80200000 if SPL

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@ -1,10 +1,10 @@
SiFive FU540 BOARD
SiFive HiFive Unleashed BOARD
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@dabbelt.com>
M: Anup Patel <anup.patel@wdc.com>
M: Atish Patra <atish.patra@wdc.com>
S: Maintained
F: board/sifive/fu540/
F: doc/board/sifive/fu540.rst
F: include/configs/sifive-fu540.h
F: configs/sifive_fu540_defconfig
F: board/sifive/unleashed/
F: doc/board/sifive/unleashed.rst
F: include/configs/sifive-unleashed.h
F: configs/sifive_unleashed_defconfig

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@ -2,7 +2,7 @@
#
# Copyright (c) 2019 Western Digital Corporation or its affiliates.
obj-y += fu540.o
obj-y += unleashed.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o

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@ -330,7 +330,8 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
ARCH_MX6 || ARCH_MX7 || \
ARCH_ROCKCHIP || ARCH_MVEBU || ARCH_SOCFPGA || \
ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
OMAP44XX || OMAP54XX || AM33XX || AM43XX || TARGET_SIFIVE_FU540
OMAP44XX || OMAP54XX || AM33XX || AM43XX || \
TARGET_SIFIVE_UNLEASHED
help
Use sector number for specifying U-Boot location on MMC/SD in
raw mode.
@ -347,7 +348,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
OMAP54XX || AM33XX || AM43XX || ARCH_K3
default 0x4000 if ARCH_ROCKCHIP
default 0x822 if TARGET_SIFIVE_FU540
default 0x822 if TARGET_SIFIVE_UNLEASHED
help
Address on the MMC to load U-Boot from, when the MMC is being used
in raw mode. Units: MMC sectors (1 sector = 512 bytes).

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@ -8,7 +8,7 @@ CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
CONFIG_TARGET_SIFIVE_FU540=y
CONFIG_TARGET_SIFIVE_UNLEASHED=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y

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@ -6,4 +6,4 @@ SiFive
.. toctree::
:maxdepth: 2
fu540
unleashed

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@ -8,6 +8,6 @@ config RAM_SIFIVE
config SIFIVE_FU540_DDR
bool "SiFive FU540 DDR driver"
depends on RAM_SIFIVE
default y if TARGET_SIFIVE_FU540
default y if TARGET_SIFIVE_UNLEASHED
help
This enables DDR support for the platforms based on SiFive FU540 SoC.

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@ -166,7 +166,7 @@ config RESET_IPQ419
config RESET_SIFIVE
bool "Reset Driver for SiFive SoC's"
depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540
depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_UNLEASHED
default y
help
PRCI module within SiFive SoC's provides mechanism to reset