Commit graph

37 commits

Author SHA1 Message Date
Joakim Tjernlund
0f8aa15917 ppc: Use r12 instead of r14 as GOT pointer.
r14 is not supposed to be clobbered by functions. Switch
to r12 and call GET_GOT when needed. This will allow u-boot
to loose the -ffixed-r14 gcc option.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-01-26 19:30:13 +01:00
Joakim Tjernlund
fc4e188789 ppc: Loose GOT access in IRQ
Using the GOT in IRQ handlers requires r14 to be -ffixed-r14.
Avoid this by relocatate transfer_to_handler too.
This will allow to free up r14 later on.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-01-26 19:30:12 +01:00
Joakim Tjernlund
afc3ba0fc4 relocation: Do not relocate NULL pointers.
NULL is an absolute value and should not be relocated.
After this correction code like:
 void weak_fun(void) __attribute__((weak));
 printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2009-10-08 09:33:36 +02:00
Wolfgang Denk
455ae7e87f Coding style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-12-16 01:02:17 +01:00
Peter Tyser
561858ee7d Update U-Boot's build timestamp on every compile
Use the GNU 'date' command to auto-generate a new U-Boot
timestamp on every compile.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-06 23:36:43 +01:00
Becky Bruce
3111d32c49 mpc8641: Support 36-bit physical addressing
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled.  With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations.  This means we have to distinguish between
the two in the config file.  The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.

Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:05 -06:00
Becky Bruce
c759a01a00 mpc8641: Change 32-bit memory map
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.

The regions for some of the mappings were far larger than they
needed to be.  I have reduced the mappings to match the
actual sizes supported by the hardware.

In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them.  These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.

Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:04 -06:00
Becky Bruce
bf9a8c3430 mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLY
We define CONFIG_MONITOR_BASE_EARLY to define the initial location
of the bootpage in flash.   Use this to create an early mapping
definition for the FLASH, and change the early_bats code to use this.

This  change facilitates the relocation of the flash since the early
mappings are no longer tied to the final location of the flash.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:04 -06:00
Becky Bruce
c1e1cf6954 mpc86xx: Use SRR0/1/rfi to enable address translation, not blr
Using a mtmsr/blr means that you have to be executing at the
same virtual address once you enable translation.  This is
unnecessarily restrictive, and is not really how this is
usually done.  Change it to use the more common mtspr SRR0/SRR1
and rfi method.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:03 -06:00
Becky Bruce
24bfb48c35 mpc86xx: Move setup_bats into cpu_init_f
In order to later allow for a physical relocation of the
flash, setup_bats, which sets up the final BAT mapping
for the board, needs to happen *after* init_laws().
Otherwise, there will be no window programmed for the flash
at the new physical location at the point when we change
the mmu translation.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:02 -06:00
Becky Bruce
1266df8877 powerpc: change 86xx SMP boot method
We put the bootpg for the secondary cpus into memory and use
BPTR to get to it.  This is a step towards converting to the
ePAPR boot methodology.  Also, the code is written to
deal properly with more than 4GB of RAM.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-04 10:58:50 -06:00
Becky Bruce
104992fc54 powerpc 86xx: Handle CCSR relocation earlier
Currently, the CCSR gets relocated while translation is
enabled, meaning we need 2 BAT translations to get to both the
old location and the new location.  Also, the DEFAULT
CCSR location has a dependency on the BAT that maps the
FLASH region.  Moving the relocation removes this unnecessary
dependency. This makes it easier and more intutive to
modify the board's memory map.

Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same
BAT for CCSR space.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:05:00 -06:00
Dave Liu
eaa44c5dc8 86xx: remove the redundant r2 global data pointer save
The commit 67256678f0 add
the another global data pointer save, but in fact the
global data pointer will be initialized in the board_init_r,
so remove it such as the 85xx/83xx family.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
2008-10-30 10:31:42 -05:00
Dave Liu
bd888e9544 86xx: remove the unused code for 86xx family
I believe these code was copied from 74xx family, but for
86xx, it is unused.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
2008-10-30 10:31:23 -05:00
Dave Liu
dc2adad85b 86xx: Move the clear_tlbs before MMU turn on
We must invalidate TLBs before MMU turn on, but
currently the code is not, if there are some stale
TLB entry valid in the TLBs, it will cause strange
issue.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-10-30 10:26:37 -05:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Nick Spence
3924384060 mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.

lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
2008-10-13 13:57:14 +02:00
Becky Bruce
2d0daa0361 POWERPC 86xx: Move BAT setup code to C
This is needed because we will be possibly be locating
devices at physical addresses above 32bits, and the asm
preprocessing does not appear to deal with ULL constants
properly. We now call write_bat in lib_ppc/bat_rw.c.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-11 23:53:59 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Wolfgang Denk
9e04a81388 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx
Conflicts:

	common/cmd_reginfo.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-02-15 00:26:52 +01:00
Wolfgang Denk
e7670f6c1e PPC: Use r2 instead of r29 as global data pointer
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.

Use r2 instead.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-02-14 22:43:22 +01:00
Rafal Jaworowski
f57d7d364c ppc: Refactor cache routines, so there is only one common set.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2008-02-14 22:00:41 +01:00
Becky Bruce
9cd32426f2 86xx: Remove old-style law setup code
This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:40 -06:00
Becky Bruce
4933b91f8a 86xx: Support new law setup method and convert mpc8641
Adds the support code in cpu/mpc86xx for the new law setup code
recently created fsl_law.c, and changes the MPC8641HPCN config
to use this code.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:30 -06:00
Becky Bruce
1a41f7ce9c 86xx: Rearrange the sequence in start.S
* split the BAT initialization so that only 2 BATs (for the boot page
and stack) are programmed very early on.  The rest are initialized later.
* Move other BAT setup,  ccsrbar setup, and law setup later in the code
after translation has been enabled.

These changes will facilitate the moving of law and BAT initialization
to C code, and will aid with 36-bit physical addressing support.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:11:37 -06:00
Jon Loeliger
cfc7a7f5bb cpu/86xx fixes.
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.

Include MSSSR0 in error message.

Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-10 11:02:32 -05:00
Rafal Jaworowski
02032e8f14 [ppc] Fix build breakage for all non-4xx PowerPC variants.
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup
2007-06-22 14:58:04 +02:00
James Yang
a75af9bfd8 Conditionalize 8641 Rev1.0 MCM workarounds
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-05-01 12:43:58 -05:00
Wolfgang Denk
47a6989c10 Code cleanup 2006-10-24 15:32:57 +02:00
Jon Loeliger
7b382b7125 Fix whitespace issues. 2006-10-10 17:14:45 -05:00
Jon Loeliger
ffff3ae56f General indent and whitespace cleanups. 2006-08-22 12:06:18 -05:00
Haiying Wang
67256678f0 Copy Global Data Pointer to r29 for DECLARE_GLOBAL_DATA_PTR 2006-08-17 11:01:55 -05:00
Jon Loeliger
0e4c2a17ca Do not enable address translation on secondary CPUs.
Do not set up BATs on secondary CPUs.  Let Linux do the nasty.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-06-15 21:45:26 -05:00
Jon Loeliger
14e37081ff Change arbitration to round-robin for SMP linux. 2006-05-19 13:54:02 -05:00
Haiying Wang
6cfea33477 Remove unneeded INIT_RAM_LOCK cache twiddling.
Correctly tracks r29 as global data pointer now.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-10 09:38:06 -05:00
Jon Loeliger
5c9efb36a6 Cleanup whitespaces and style issues.
Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
2006-04-27 10:15:16 -05:00
Jon Loeliger
debb7354d1 Initial support for MPC8641 HPCN board. 2006-04-26 17:58:56 -05:00