Commit graph

1028 commits

Author SHA1 Message Date
Grzegorz Bernacki
2db6478406 Program EPLD to force full duplex mode for PHY.
EPLD forces modes of PHY operation. By default full duplex is turned off.
This fix turns it on.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-10-02 11:30:37 +02:00
Wolfgang Denk
1218abf1b5 Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as global
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-15 20:48:41 +02:00
Grzegorz Bernacki
7a888d6b3c [MPC512x] Streamline frame handling in the FEC driver
- convert frame size settings to be derived from a single base
- set frame size to the recommended default value

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-10 17:39:08 +02:00
Kyungmin Park
e251e00d0d Remove compiler warning: target CPU does not support interworking
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2007-09-10 09:26:35 +02:00
Wolfgang Denk
87eb200ea8 Merge with /home/raj/git/u-boot#440SPe_PCIe_fixes 2007-09-08 20:52:57 +02:00
Wolfgang Denk
fd63d832cd Merge with /home/raj/git/u-boot#ads5121_fixes 2007-09-08 20:45:59 +02:00
Grzegorz Bernacki
7f19139389 [PPC440SPe] Improve PCIe configuration space access
- correct configuration space mapping
- correct bus numbering
- better access to config space

Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 18:20:23 +02:00
Grzegorz Bernacki
15ee4734e4 [PPC440SPe] Convert machine check exceptions handling
Convert using fixup mechanism to suppressing MCK for the duration of config
read/write transaction: while fixups work fine with the case of a precise
exception, we identified a major drawback with this approach when there's
an imprecise case. In this scenario there is the following race condition:
the fixup is (by design) set to catch the instruction following the one
actually causing the exception; if an interrupt (e.g. decrementer) happens
between those two instructions, the ISR code is executed before the fixup
handler the machine check is no longer protected by the fixup handler as it
appears as within the ISR code. In consequence the fixup approach is being
phased out and replaced with explicit suppressing of MCK during a PCIe
config read/write cycle.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 17:46:18 +02:00
Grzegorz Bernacki
08e2e5fcd2 [MPC512x] Proper handling of larger frames in the FEC driver
When frame larger than local RX buffer is received, it is split and handled
by two buffer descriptors. Prior to this patch the FEC driver discarded
contents of a buffer descriptor without the 'LAST' bit set, so the first
part of the frame was lost in case of larger frames. This fix allows to
safely combine the two pieces into the whole frame.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 17:09:21 +02:00
Rafal Jaworowski
8d17979d03 [MPC512x] Correct fixup relocation
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-09-07 17:05:36 +02:00
stefano babic
80172c6181 PXA270: Add support for multiple serial ports.
This patch adds support for multiple serial ports to the PXA target.
FFUART, BTUART and STUART are supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2007-09-07 01:04:59 +02:00
Grant Likely
cf2817a84c Migrate 5xxx boards from CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDT
Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200

Tested on: lite5200b

Note: the fixup functions have not been moved to a common place.  This
patch is targeted for immediate merging as in solves a build issue, but
the final name/location of the fixups is still subject to debate.  I
propose to merge this now, and move the fixups in the next merge window
to be usable by all targets.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-09-06 09:46:23 -06:00
Haiying Wang
7a1ac419fa Enable L2 cache for MPC8568MDS board
The L2 cache size is 512KB for 8568, print out the correct informaiton.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-08-29 00:11:44 -05:00
Martin Krause
4a8527ef08 MPC5xxx: fix some compiler warnings in USB code
Fix the following warnings:
- usb.c:xx: warning: function declaration isn't a prototype
- usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
  from pointer wihtout a cast

Signed-off-by: Martin Krause <martin.krase@tqs.de>
2007-08-29 02:09:58 +02:00
Wolfgang Denk
6af2eeb1e9 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-29 01:32:05 +02:00
Heiko Schocher
a861558c65 [UC101] Fix: if no CF in the board, U-Boot resets sometimes.
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-08-28 17:40:33 +02:00
Wolfgang Denk
909627dca4 Merge with /home/wd/git/u-boot/custodian/u-boot-coldfire 2007-08-18 21:56:57 +02:00
Wolfgang Denk
1d55483cf7 Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx 2007-08-18 21:47:33 +02:00
Kim Phillips
79f240f7ec lib_ppc: make board_add_ram_info weak
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.

this consequently eliminates CONFIG_ADD_RAM_INFO.

Thanks to Stefan for the hint.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-18 21:39:46 +02:00
Stefan Roese
8280f6a1c4 Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-18 14:33:02 +02:00
TsiChungLiew
4a442d3186 ColdFire: Add M5235EVB Platform for MCF523x
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-17 11:36:29 -06:00
Kim Phillips
4cc1cd5941 mpc83xx: fix typo in DDR2 programming
introduced in the implement board_add_ram_info patch as I was cleaning out the
magic numbers.  sorry.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-17 09:30:00 -05:00
Kim Phillips
bbea46f76f mpc83xx: implement board_add_ram_info
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:

DRAM:  256 MB (DDR1, 64-bit, ECC on)

and for boards with SDRAM on the local bus, a line such as this is
added:

SDRAM: 64 MB (local bus)

also replaced some magic numbers with their equivalent define names.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-16 23:12:24 -05:00
TsiChungLiew
8ae158cd87 ColdFire: Add M54455EVB for MCF5445x
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:23 -06:00
TsiChungLiew
a1436a8426 ColdFire: Add M5253EVBE platform for MCF52x2
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:21 -06:00
TsiChungLiew
83ec20bc43 ColdFire: MCF52x2 update
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:20 -06:00
TsiChungLiew
f52e78304d ColdFire: MCF5329 update cache
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 17:43:20 -06:00
Kim Phillips
3fde9e8b22 mpc83xx: migrate remaining freescale boards to libfdt
this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.

Boards remain compatible with OF_FLAT_TREE.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Kim Phillips
6a16e0dfcc mpc83xx: move common /memory node update mechanism to cpu.c
also adds common prototypes to include/common.h.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Kim Phillips
8f9e0e9f33 mpc83xx: remaining 8360 libfdt fixes
PCI clocks and QE frequencies weren't being updated, and the core clock
was being updated incorrectly.  This patch also adds a /memory node if
it doesn't already exist prior to update.

plus some cosmetic trimming to single line comments.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Kim Phillips
f4b2ac5ed9 mpc83xx: fix UEC2->1 typo in libfdt setup code
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-15 22:36:33 -05:00
Stefan Roese
d61ea14885 Merge with git://www.denx.de/git/u-boot.git 2007-08-15 14:51:27 +02:00
Wolfgang Denk
541d41b2f2 Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-08-14 18:43:14 +02:00
Wolfgang Denk
f01dbb5424 Coding style cleanup. Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-14 18:42:36 +02:00
Stefan Roese
3b3bff4cbf Merge with git://www.denx.de/git/u-boot.git 2007-08-14 16:36:29 +02:00
Stefan Roese
429d9571f6 Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 15:03:17 +02:00
Stefan Roese
34886bbea2 Merge with /home/stefan/git/u-boot/zeus 2007-08-14 15:00:42 +02:00
Stefan Roese
779e975117 ppc4xx: Add initial Zeus (PPC405EP) board support
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 14:44:41 +02:00
Peter Pearse
dcbfd2e564 Add the files. 2007-08-14 10:14:05 +01:00
Peter Pearse
d4fc6012fd Add MACH_TYPE records for several AT91 boards.
Merge to two at45.c files into a common file, split to at45.c and spi.c
Fix spelling error in DM9161 PHY Support.
Initialize at91rm9200 board (and set LED).
Add PIO control for at91rm9200dk LEDs and Mux.
Change dataflash partition boundaries to be compatible with Linux 2.6.

Signed-off-by:	Peter Pearse <peter.pearse@arm.com>
Signed-off-by:	Ulf Samuelsson <ulf@atmel.com>
2007-08-14 10:10:52 +01:00
Randy Vinson
7f3f2bd2dc 85xxCDS: Add make targets for legacy systems.
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.

Signed-off-by Randy Vinson <rvinson@mvista.com>
2007-08-14 01:51:39 -05:00
Andy Fleming
da9d4610d7 Add support for UEC to 8568
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:47:44 -05:00
Haiying Wang
d111d6382c Empirically set cpo and clk_adjust for mpc85xx DDR2 support
This patch is against u-boot-mpc85xx.git of www.denx.com

Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.

Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-08-14 01:45:51 -05:00
Kumar Gala
3db0bef59e Use an absolute address when jumping out of 4k boot page
On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-14 01:45:09 -05:00
Andy Fleming
39980c610c MPC85xx BA bits not set for 3-bit bank address DIMM
The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).

Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
2007-08-14 01:44:55 -05:00
Andy Fleming
6c543597bb Fix minor 85xx warnings
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
  "\m" in the paths.  Made the defaults not Windows-specific (or
  anything-specific)

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:39:14 -05:00
Andy Fleming
61a21e980a 85xx start.S cleanup and exception support
From: Ed Swarthout <Ed.Swarthout@freescale.com>

Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.

Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.

Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl

Move additional code from .text to boot page to make room for
exception vectors at start of image.

Handle Machine Check, External and Critical exceptions.

Fix e500 machine check error determination in traps.c

TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:34:21 -05:00
Ed Swarthout
40c7f9b0de 85xx allow debugger to configure ddr.
Only check for mpc8548 rev 1 when compiled for 8548.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:22:01 -05:00
Ed Swarthout
29372ff38c mpc85xx L2 cache reporting and SRAM relocation option.
Allow debugger to override flash cs0/cs1 settings to enable alternate
boot regions

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:21:55 -05:00
Wolfgang Denk
8a92b7c60b Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xx 2007-08-13 22:00:25 +02:00