Commit graph

32274 commits

Author SHA1 Message Date
Vignesh R
664ab2c992 dma: ti-edma3: Add helper function to support edma3 transfer
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:15 +05:30
Tom Rini
146bad9619 sf: ops: Add spi_flash_copy_mmap function
When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Vignesh R
5b3b0d687e ARM: AM43XX: Add functions to enable and disable EDMA3 clocks
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Vignesh R
8a09cfe14b ARM: OMAP5: Add functions to enable and disable EDMA3 clocks
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Kishon Vijay Abraham I
16ca1d09e6 ARM: OMAP5: Add support for disabling clocks in uboot
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Kishon Vijay Abraham I
fca45722fb ARM: AM43xx: Add support for disabling clocks in uboot
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Ravi Babu
7dd0174467 env: use cache line aligned memory for flash read
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Ravi Babu
156e96f038 sf: allocate cache aligned buffers to copy from flash
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
vishalm@ti.com
a39cfe717c ti: qspi: set flash quad bit based on quad support flag
Update op_mode_rx flag based on CONFIG_QSPI_QUAD_SUPPORT flag,
instead of platform.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 23:29:14 +05:30
Stefan Roese
ce2cb1d3ed arm: mvebu: db-88f6820-gp: Enable PCI support
This patch enabled the MVEBU PCIe support on the db-88f6820-gp A38x
eval board. It also enabled the Intel E1000 driver support and
adds the initialization of PCIe network controllers to the
board code.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
2015-08-17 18:49:52 +02:00
Stefan Roese
41e705ac79 arm: mvebu: db-mv784mp-gp: Enable PCI support
This patch enabled the MVEBU PCIe support on the db-mv784mp-gp AXP
eval board. It also enabled the Intel E1000 driver support and
adds the initialization of PCIe network controllers to the
board code.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:47 +02:00
Anton Schubert
9c28d61c8e pci: mvebu: Add PCIe driver
This adds a PCI driver for the controllers found on Marvell MVEBU SoCs.

Besides the driver, this patch also removes the statically defined
PCI MBUS windows. As they are not needed anymore, since this PCIe
driver now creates the windows dynamically.

Tested on Armada XP db-mv784mp-gp eval board using an Intel E1000
PCIe card in all 3 PCIe slots. And on the Armada 38x db-88f6820-gp
eval board using this Intel E1000 PCIe card in the PCIe 0 slot.

This port was done in cooperation with Anton Schubert.

Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
2015-08-17 18:49:43 +02:00
Stefan Roese
0ceb2dae78 arm: mvebu: Add complete SDRAM ECC scrubbing
This patch introduces the SDRAM scrubbing for ECC enabled board
to fill/initialize the ECC bytes. This is done via the XOR engine
to speed up the process. The scrubbing is a 2-stage process:

1) SPL scrubs the area 0 - 0x100.0000 (16MiB) for the main U-Boot
2) U-Boot scrubs the remaining SDRAM area(s)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:33 +02:00
Stefan Roese
a8b57a90ec arm: mvebu: dram.c: Rework dram_init() and dram_init_banksize()
Rework these functions so that dram_init_banksize() does not call
dram_init() again. It only needs to set the banksize values in the
bdinfo struct.

Make sure to also clip the size of the last bank if it exceeds the
maximum allowed value of 3 GiB (0xc000.0000). Otherwise other
address windows (e.g. PCIe) will overlap with this memory window.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:29 +02:00
Stefan Roese
2923c2d2fe arm: mvebu: Move CONFIG_SYS_TEXT_BASE to an address < 16 MiB
This patch moves CONFIG_SYS_TEXT_BASE to 0x00800000 for all Armada
XP / 38x boards in mainline U-Boot. This is done in preparation for
the ECC SDRAM scrubbing that needs to be done in the main U-Boot.
The SPL (previously bin_hdr) has already scrubbed the area:
  0x0000.0000 - 0x0100.0000

In this area this main U-Boot needs to get loaded. The main U-Boot
then can scrub the remaining SDRAM area while running from this
location.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:25 +02:00
Stefan Roese
8a83c65f57 arm: mvebu: Display ECC enabled / disabled upon bootup
This patch adds "(ECC enabled)" or "(ECC disabled)" to the DRAM
bootup text. Making it easier for board with SPD DIMM's to see,
if ECC is enabled or not.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:19 +02:00
Anton Schubert
8a3337161d arm: mvebu: add multiple usb-hostcontroller support for AXP
This patch adds support for multiple hostcontrollers to the ehci-marvell driver
and enables all 3 usb-hcs on the db-mv784mp-gp board.

It depends on the initial Armada XP usb support patch from Stefan.

Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:15 +02:00
Stefan Roese
49114c8738 arm: mvebu: db-mv785mp-gp: Add USB/EHCI support
This patch enabled the USB/EHCI support for the Marvell
DB-MV784MP-GP Armada XP eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:11 +02:00
Stefan Roese
dee40d26d3 arm: mvebu: Enable USB EHCI support on Armada XP
This patch enables the USB EHCI support for the Marvell Armada XP (AXP)
SoCs. In compatism to the Armada 38x (A38x), the AXP needs to configure
the USB PLL and the USB PHY's specifically in U-Boot. The A38x has done
this already in the bin_hdr (SPL U-Boot). Without this, accessing the
controller registers in U-Boot or Linux will hang the CPU.

Additionally, the AXP uses a different USB EHCI base address. This
patch also takes care of this by runtime SoC detection in the Marvell
EHCI driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:07 +02:00
Stefan Roese
2a0b7dc3b6 arm: mvebu: Enable NAND controller on MVEBU SoC's
This patch enables the NAND controller on the Armada XP/38x and provides
a new function that returns the NAND controller input clock. This
function will be used by the MVEBU NAND driver.

As part of this patch, the multiple BIT macro definitions are moved
to a common place in soc.h.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:02 +02:00
Stefan Roese
501c098a1f arm: mvebu: Disable MBUS error propagation
Accessing MBUS windows not backed-up by e.g. PCIe devices will
hang the SoC. Disable MBUS error propagation back to CPU allows
to read 0xffffffff instead of hanging the SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:57 +02:00
Stefan Roese
2b181b5b04 arm: mvebu: Flush caches and disable MMU only on A38x
Only with disabled MMU its possible to switch the base register address
on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also
not accessible, as its still locked to cache.

So to fully release / unlock this area from cache, we need to first
flush all caches, then disable the MMU and disable the L2 cache.

On Armada XP this does not seem to be needed. Even worse, with this
code added, I sometimes see strange input charactes loss from the
console.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:52 +02:00
Stefan Roese
5b72dbfc23 arm: mvebu: Setup the MBUS bridge registers
With this patch, the MBUS bridge registers (base and size) are
configured upon each call to mbus_dt_setup_win(). This is needed, since
the board code can also call this function in later boot stages. As
done in the maxbcm board.

This is needed to fix a problem with the secondary CPU's not booting
in Linux on AXP.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:46 +02:00
Stefan Roese
8ed20d6501 arm: mvebu: Change MBUS base addresses and sizes
This patch changes the MBUS base addresses and sizes to use more
generic names and also adds defines for the sizes. It also moves
the base address to higher addresses.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:34 +02:00
Stefan Roese
2bd8711ef0 arm: mvebu: db-mv784mp-gp.h: Fix image creation - use correct offset
Signed-off-by: Stefan Roese <sr@denx.de>
2015-08-17 18:48:27 +02:00
Stefan Roese
a3ed9789e7 arm: mvebu: sdram: Enable ECC support on Armada XP
This is tested on the DB-MV784MP-GP eval board. To really enable ECC
support on this board the I2C EEPROM needs to get changed. As it
saves the enabling of ECC support internally. For this the following
commands can be used to enable ECC support on this board:

Its recommended for first save (print) the value(s) in this EEPROM
address:

=> i2c md 4e 0.1 2
0000: 05 00    ..

To enable ECC support you need to set bit 1 in the 2nd byte:

Marvell>> i2c mw 4e 1.1 02
Marvell>> i2c md 4e 0.1 2
0000: 05 02    ..

To disable ECC support again, please use this command:

Marvell>> i2c mw 4e 1.1 00
Marvell>> i2c md 4e 0.1 2
0000: 05 00    ..

On other AXP boards, simply plugging an ECC DIMM should be enough to
enable ECC support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:41:33 +02:00
Stefan Roese
8822fe1683 arm: mvebu/armada100: dram.c: Remove CONFIG_SYS_BOARD_DRAM_INIT
CONFIG_SYS_BOARD_DRAM_INIT is not defined anywhere. So lets get rid
of all references here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:41:33 +02:00
Sylvain Lemieux
58243001a9 i2c: lpc32xx: fix write timeout
Fix a condition that generate watchdog timeout inside "lpc32xx_i2c_write" when parameters alen = 0 and len = 0.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-17 08:11:50 -04:00
Sylvain Lemieux
3d2b6a2e5f i2c: lpc32xx: fix read timeout
Fix a condition that generate watchdog timeout inside "lpc32xx_i2c_read" when parameters alen != 0 and len = 0.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-17 08:11:49 -04:00
Sylvain Lemieux
b395a996a6 i2c: lpc32xx: use api to get hclk instead of fix value
The HCLK is not constant and can take different value; use the api function to get the value of the HCLK for the I2C clock high and low computation.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-17 08:11:49 -04:00
Sylvain Lemieux
2783fe6903 arm: lpc32xx: gpio macro for pin mapping
Add LPC32xx GPIO interface macro for pin mapping.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-17 08:11:05 -04:00
Sylvain Lemieux
576007aec9 lpc32xx: cpu: add support for soft reset
Add support for optional soft reset (i.e. "RESOUT_N" not asserted during reset).

To be compatible with the original U-Boot code, when the "addr" parameter is 0, a hard is performed; for any other values, a soft reset is done.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-17 08:10:58 -04:00
Sylvain Lemieux
d75b532a9e arm: lpc32xx: mux: add missing registers
Add missing registers in struct definition.
Update GPIO MUX base register to match GPIO base (refer to "LPC32x0 User manual" Rev. 3 - 22 July 2011).

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-08-17 08:10:53 -04:00
Marek Vasut
0a02655481 sf: Make 4K sector support configurable
Make the support for 4K subpage I/O on a SPI NOR flash configurable.
A board which requires the SPI NOR to be accessed in larger 32KiB
or 64KiB pages can disable the 4K subpage support, but by default,
the support for 4K subpage I/O is enabled. The functionality of this
option is the same as CONFIG_MTD_SPI_NOR_USE_4K_SECTORS in Linux.

This is extremely useful in case one uses UBI on a SPI NOR flash.
UBI needs at least 15k EBs and can not work on a flash which uses
4k ones, so disabling the support for 4k subpages lets UBI work on
such flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-17 15:59:48 +05:30
Thomas Abraham
14a66afead ARM: exynos: fix regression for Origen4210
The do_lowlevel_init() function includes certian CA15 specific L2 cache
configuration which is only applicable on Exynos5420 and members of its
family. Fix the regression on Origen4210 by skipping the Exynos5420
specific portions of the code.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-08-17 13:06:55 +09:00
Thomas Abraham
77b55e8cfc ARM: exynos: move SoC sources to mach-exynos
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow
reuse of existing code for ARMv8 based Exynos platforms.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-08-17 13:06:52 +09:00
Tom Rini
f0b38f2a41 Delete an accidentally added .rej file
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-14 18:39:44 -04:00
Tom Rini
632093b566 Merge git://git.denx.de/u-boot-x86 2015-08-14 16:27:16 -04:00
Tom Rini
61dfa65e40 Merge branch 'master' of git://git.denx.de/u-boot-pmic 2015-08-14 16:27:11 -04:00
Anatolij Gustschin
dfcd23e3e7 powerpc: ipek01: convert to generic board
Also update maintainer info.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:10 -04:00
Anatolij Gustschin
c829893556 powerpc: inka4x0: convert to generic board
Also update maintainer info.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:09 -04:00
Anatolij Gustschin
10865143aa powerpc: socrates: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: York Sun <yorksun@freescale.com>
2015-08-14 16:27:09 -04:00
Anatolij Gustschin
e12192294e powerpc: v38b: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:08 -04:00
Anatolij Gustschin
6fe3b538f9 powerpc: pcm030: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:08 -04:00
Anatolij Gustschin
aef8cd9f38 powerpc: munices: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:07 -04:00
Anatolij Gustschin
a02cb92743 powerpc: motionpro: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:06 -04:00
Anatolij Gustschin
50301a5a19 powerpc: jupiter: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:06 -04:00
Anatolij Gustschin
ab9f5f834e powerpc: canmb: convert to generic board
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2015-08-14 16:27:05 -04:00
Lokesh Vutla
16862604db ARM: OMAP5+: configs: Fix default boot command
The default boot command searches for dofastboot varaiable
and does a fastboot if it is set to 1.
But the condition "if test ${dofastboot} -eq 1" always
returns true if dofastboot is not defined and breaking mmc boot.
So make dofastboot as 0 by default and let the runtime
environment set it if fastboot is required.

Reported-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-14 16:27:04 -04:00
Simon Glass
236efe36be Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"
This reverts commit 5b34436035.

This function has a few problems. It calls fdt_parent_offset() which as
mentioned in code review is very slow.

https://patchwork.ozlabs.org/patch/499482/
https://patchwork.ozlabs.org/patch/452604/

It also happens to break SPI flash on Minnowboard max which is how I noticed
that this was applied. I can send a patch to tidy that up, but in any case
I think we should consider a revert until the function is better implemented.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-14 10:00:52 -06:00