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ARM: OMAP5: Add functions to enable and disable EDMA3 clocks
Adds functions to enable and disable edma3 clocks which can be invoked by drivers using edma3 to control the clocks. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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3 changed files with 52 additions and 0 deletions
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@ -565,6 +565,47 @@ void enable_basic_uboot_clocks(void)
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1);
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}
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#ifdef CONFIG_TI_EDMA3
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void enable_edma3_clocks(void)
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{
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u32 const clk_domains_edma3[] = {
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0
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};
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u32 const clk_modules_hw_auto_edma3[] = {
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(*prcm)->cm_l3main1_tptc1_clkctrl,
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(*prcm)->cm_l3main1_tptc2_clkctrl,
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0
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};
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u32 const clk_modules_explicit_en_edma3[] = {
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0
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};
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do_enable_clocks(clk_domains_edma3,
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clk_modules_hw_auto_edma3,
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clk_modules_explicit_en_edma3,
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1);
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}
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void disable_edma3_clocks(void)
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{
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u32 const clk_domains_edma3[] = {
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0
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};
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u32 const clk_modules_disable_edma3[] = {
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(*prcm)->cm_l3main1_tptc1_clkctrl,
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(*prcm)->cm_l3main1_tptc2_clkctrl,
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0
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};
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do_disable_clocks(clk_domains_edma3,
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clk_modules_disable_edma3,
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1);
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}
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#endif
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const struct ctrl_ioregs ioregs_omap5430 = {
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.ctrl_ddrch = DDR_IO_I_34OHM_SR_FASTEST_WD_DQ_NO_PULL_DQS_PULL_DOWN,
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.ctrl_lpddr2ch = DDR_IO_I_34OHM_SR_FASTEST_WD_CK_CKE_NCS_CA_PULL_DOWN,
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@ -989,4 +989,8 @@ struct prcm_regs const dra7xx_prcm = {
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.prm_abbldo_mpu_setup = 0x4AE07DDC,
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.prm_abbldo_mpu_ctrl = 0x4AE07DE0,
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/*l3main1 edma*/
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.cm_l3main1_tptc1_clkctrl = 0x4a008778,
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.cm_l3main1_tptc2_clkctrl = 0x4a008780,
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};
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@ -349,6 +349,10 @@ struct prcm_regs {
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/* IPU */
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u32 cm_ipu_clkstctrl;
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u32 cm_ipu_i2c5_clkctrl;
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/*l3main1 edma*/
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u32 cm_l3main1_tptc1_clkctrl;
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u32 cm_l3main1_tptc2_clkctrl;
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};
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struct omap_sys_ctrl_regs {
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@ -598,6 +602,9 @@ void recalibrate_iodelay(void);
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void omap_smc1(u32 service, u32 val);
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void enable_edma3_clocks(void);
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void disable_edma3_clocks(void);
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/* ABB */
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#define OMAP_ABB_NOMINAL_OPP 0
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#define OMAP_ABB_FAST_OPP 1
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