Commit graph

28 commits

Author SHA1 Message Date
Markus Brunner
f766cdf89b ppc4xx: PPC405EP Set EMAC noise filter bits
This bug was introduced with commit aee747f19b
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.

Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:47:28 +01:00
Mike Nuss
f66e2c8b25 ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.

Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-27 10:38:54 +01:00
Stefan Roese
2801b2d2a9 ppc4xx: Add basic support for AMCC 460EX/460GT (2/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
c05569066d ppc4xx: Enable 405EP PCI arbiter per default on all boards
In an attmemt to clean up the 4xx start.S file, I removed the enabling
of the internal 405EP PCI arbiter. This is needed for multiple other
405EP platforms, like most of the esd 405EP. Now the internal PCI
arbiter is enabled again per default as it has been before.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28 16:39:15 +01:00
Stefan Roese
bec9264616 ppc4xx: Fix bug in cpu_init.c (405EP instead of 450EP)
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-28 16:39:11 +01:00
Stefan Roese
aee747f19b ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platforms
- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE
- Cleanup of the 4xx GPIO functions
- Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h

Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-15 14:23:55 +01:00
Stefan Roese
dbbd125721 ppc4xx: Add PPC405EX support
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Igor Lisitsin
a11e06965e Extend POST support for PPC440
Added memory, CPU, UART, I2C and SPR POST tests for PPC440.

Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
2007-06-22 23:21:01 +02:00
Stefan Roese
0d974d5297 [PATCH] Add 4xx GPIO functions
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24 15:57:09 +01:00
Stefan Roese
e01bd218b0 [PATCH] Add AMCC PPC405EZ support
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.

Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21 13:38:59 +01:00
Stefan Roese
4745acaa1a [PATCH] Add support for the AMCC Katmai (440SPe) eval board
Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:57:08 +01:00
Heiko Schocher
cb4820725e [PATCH] Fix: Compilerwarnings for SC3 board.
The EBC Configuration Register is now by CFG_EBC_CFG definable
             Added JFFS2 support for the SC3 board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-01-18 11:28:51 +01:00
Wolfgang Denk
f11033e739 Merge with /home/hs/SC3/u-boot
Some code cleanup.
2007-01-15 13:41:04 +01:00
Heiko Schocher
ca43ba18e9 Added support for the SOLIDCARD III board from Eurodesign
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-01-11 15:44:44 +01:00
Stefan Roese
0238898382 [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
This code will optimize the DDR2 controller setup on a board specific
basis.

Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05 10:38:05 +01:00
Stefan Roese
1c2ce22620 [PATCH] Update Prodrive ALPR board support (440GX)
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:12:17 +01:00
Stefan Roese
e0a46554c3 * PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely.
- Add configuration of Open Drain GPIO Output selection
  - Add configuration of initial value of GPIO output pins
Patch by Tolunay Orkun, 07 Apr 2006
2006-10-12 20:09:27 +02:00
Stefan Roese
a4c8d1389f Add support for PCS440EP board
Patch by Stefan Roese, 02 Jun 2006
2006-06-02 16:20:36 +02:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Stefan Roese
d6c61aabc4 Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.c
now handling all 4xx cpu's.
Patch by Stefan Roese, 16 Aug 2005
2005-08-16 18:18:00 +02:00
Stefan Roese
846b0dd2dc Changed CONFIG_440_xx to CONFIG_440xx for a consistent design (405 and linux)
Patch by Stefan Roese, 08 Aug 2005
2005-08-08 12:42:22 +02:00
Stefan Roese
c157d8e219 Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
Patch by Steven Blakeslee, 27 Jul 2005
2005-08-01 16:41:48 +02:00
stroese
3720878599 - Fix bug for initial stack in data cache as pointed out by Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in data cache can be used even if the chip select is in use. 2003-06-05 15:35:20 +00:00
stroese
b867d705b6 PPC405EP support added. 2003-05-23 11:18:02 +00:00
stroese
baa3d528fe Changed PPC405GPr version from A to B. 2003-04-04 16:00:33 +00:00
stroese
38daa27d21 Set edge conditioning circuitry on PPC405GPr for compatibility to existing PPC405GP designs. 2003-03-20 15:21:50 +00:00
wdenk
4a9cbbe832 Initial revision 2002-08-27 09:48:53 +00:00