U-Boot's definition for the I2C controllers did not contain any
clock information. This resulted in the I2C not functioning when
the U-Boot control FDT was passed to Linux.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Move the GPIO controller definitions under the "soc" and in
the same relative position as the Linux kernel fsl-ls1088a.dtsi.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This is required for Linux to boot using the same FDT as
U-Boot (such as passing the control FDT to bootefi).
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
The Linux kernel fsl-ls1088a.dtsi disables (status="disabled")
all PCIe controllers by default, with the bootloader (i.e U-Boot)
enabling the appropriate controllers (specified by the board
reset control word/RCW) by FDT fixup.
However, U-Boot needs these controllers to be enabled
to be usable, which we can add in the u-boot only dtsi.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This moves the PCIe controller definitions under /soc and adopts
the same bindings (fsl,ls1088a-pcie) as Linux. Previously,
the format was different between the two versions.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
To synchronise the device tree in U-Boot with Linux, the GIC
(Interrupt Controller) and SMMU/IOMMU nodes need to be synchronised
before changing any dependent components like PCIe and DPAA2/fsl-mc.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This allows the Layerscape PCIe RC driver to use the upstream
style binding (two "reg" entries instead of four).
It is similar to the previous commit e10da1f985
("pci: layerscape: add official ls1028a binding support")
which implemented this for the LS1028A.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
The top-level "memory" node does not exist in the Linux
version of the fsl-ls1088a.dtsi file. Move it to the U-Boot
"tweak" file, so we can have an identical copy of
fsl-ls1088a.dtsi between the projects in the end.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This moves the bootph-all tags that were added in commit a593c1fec5
("arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all")
into a u-boot only include.
Due to the way the U-Boot device tree "tweak" system is setup[1],
we need to have a per-board <boardname>-u-boot.dtsi, which will
include the "fsl-ls1088a-u-boot.dtsi" tweaks.
By doing so, future updates to fsl-ls1088a.dtsi from upstream
(Linux kernel) can just be copied directly into the U-Boot tree,
without worrying about any extra data local to U-Boot.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] - https://u-boot.readthedocs.io/en/latest/develop/devicetree/control.html#adding-tweaks-for-u-boot
The CONFIG_SYS_SOC, CONFIG_SYS_CPU and CONFIG_SYS_VENDOR
values are the same for the entire Layerscape family,
meaning there is no ability to create a LS1088A only
file here. But we will be adding per-board tweaks
later in any case.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
The recent series "Convert LS1088A and LX2160 to DM_SERIAL"
from Ioana Ciornei provided the necessary support to enable
DM_SERIAL on the Ten64 board (LS1088A).
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This a problem I found while updating the U-Boot fsl-ls1088a.dtsi
to match the Linux version.
fdt_fixup_remove_jr did not check whether there was a "crypto"
alias in the device tree before calling more fdt_* functions,
which resulted in a crash.
Fixes: a797f274
("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
Update the DDR settings to those generated using 0.6 version of
Jacinto 7 DDRSS Register Configuration tool.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Update the DDR settings to those generated using 0.9.1 version of
Jacinto 7 DDRSS Register Configuration tool.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
On K3 HS-SE devices all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.
The K3 MCU Scratchpad for j721s2 was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.
Old map:
┌─────────────────────────────────────┐ 0x41c00000
│ SPL │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│ STACK │
├─────────────────────────────────────┤ 0x41c65f20
│ Global data │
│ sizeof(struct global_data) = 0xd8 │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│ HEAP │
│ CONFIG_SYS_MALLOC_F_LEN = 0x10000 │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│ SPL BSS │ (0x41c76000)
│ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
├─────────────────────────────────────┤ (0x41c80000)
│ DM DATA │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│ EMPTY │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
(0x41cffbfc)
New map:
┌─────────────────────────────────────┐ 0x41c00000
│ SPL │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│ STACK │
├─────────────────────────────────────┤ 0x41c65f20
│ Global data │
│ sizeof(struct global_data) = 0xd8 │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│ HEAP │
│ CONFIG_SYS_MALLOC_F_LEN = 0x10000 │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│ SPL BSS │ (0x41c76000)
│ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
├─────────────────────────────────────┤ (0x41c80000)
│ DM DATA │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│ EMPTY │
├─────────────────────────────────────┤ SYS_K3_MCU_SCRATCHPAD_BASE
│ SCRATCHPAD │ (0x41cff9fc)
│ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
(0x41cffbfc)
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.
Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Create *-u-boot.dtsi files for each target dtb of the IOT2050 series so
that we can drop the #include deviations from upstream dts[i] files
here.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
When OE is packaging a dtb file into the FIT image it names the node based
on the dtb filename. Node names can't have "/" so it is turned into "_".
We select our FIT config using the "fdtfile" env var so we don't duplicate
the board_name to fdt logic. Result is fdtfile needs mangled when used to
select a config node from OE made FIT image. Do this here.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable the CONFIG_TI_SECURE_DEVICE by default
Non-HS devices will continue to boot due to runtime device type detection.
TI's security enforcing SoCs will authenticate each binary it loads by
comparing it's signature with keys etched into the SoC during the boot
up process. The am62x family of SoCs by default will have some level of
security enforcement checking. To keep things as simple as possible,
enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of
secure SoCs will work out of the box
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
ESM MCU masks must be set to 0h so that PMIC can handle errors
that require attention for example SYS_SAFETY_ERRn. The required bits
must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK.
If PMIC expected to handle errors, make sure EVM is configured to
connect SOC_SAFETY_ERRz (Main) to the PMIC.
Note that even though the User Guide for TPS65941 for J721E mentions
that these bits are reset to 0h; it is not reflected once board boots to
kernel, possibly due to NVM configurations. Eithercase, it is best to
account for this from R5 SPL side as well.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
- Various typo fixes, pass -Werror to host tools builds, bdi cleanups,
fix hush and local variables, a FSL PCI fix and correct some python in
one of the tests.
Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.
At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.
For the time being we are not going to use any microcode patch
that uses memory about 0x3000, so reorganise setup to use:
- 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
- 0x3000 - 0x3c00 for init stack
For more details about CPM dual port ram, see
commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
We do not want to merge documentation that produces Sphinx warnings.
scripts/kernel-doc uses environment variable KDOC_WERROR to determine
if warnings should be treated as errors.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With relocation, CPM parameter RAM can be anywhere in the
dual port RAM, so don't split dual port RAM.
Remove dparam and dparam16 members of struct comm_proc
PROFF_XXX become offsets from the start of dual port RAM,
then they are now consistant with the offsets in RPBASE
registers.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().
This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.
Console is not available yet so remove the printfs.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
This function uses the same base name as all the others in this file, so
it is not easy to run just that one test. Add a _base suffix so that it
can be run on its own.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Main U-Boot is loaded by sector number, not by partition GUID type.
Fixes: 70415e1e52 ("board: sifive: add HiFive Unmatched board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The number of the partition that U-Boot SPL loads the main U-Boot from is
defined as 2 by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2. The
partition type GUID is not used currently.
Reword the description of the boot process to make it clearer.
Fixes: 5ecf9b0b8a ("board: starfive: add StarFive VisionFive v2 board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Support for the VisionFive 2 board is not contained in the most recent
OpenSBI release (v1.2).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Guide shows incorrect usage of proftool, which is confusing. If proftool
is used w/o '-o' argument it complains like following
$ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace > trace.dat
Must provide trace data, System.map file and output file
Usage: proftool [-cmtv] <cmd> <profdata>
s/>/-o/ fixes it and proftool outputs decoded data to trace.dat
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch drops 0x prefixes because all numbers are interpreted as HEX
by default.
Also, it fixes the mismatch between input arguments and output at 'mmc
write' example. Now it's 256 (0x100) blocks.
Signed-off-by: Alexander Shirokov <shirokovalexs@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct the function documentation.
Fixes: ca031c0827 ("dm: core: introduce uclass_get_device_by_of_path()")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Variable old_outdir cannot be used before assignment.
The assignment must occur before the try block.
tools/dtoc/test_fdt.py:796:26:
E0601: Using variable 'old_outdir' before assignment
(used-before-assignment)
Add missing space in assignment.
Fixes: a004f29464 ("binman: Tidy up _SetupDtb() to use its own temporary file")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Freescale PCIe Root Port has PEXCSRBAR register at position of PCI BAR0.
PCIe Root Port does not have any PCIe memory, so returns zero when trying
to read from PCIe Root Port BAR0 and ignore any writes.
Signed-off-by: Pali Rohár <pali@kernel.org>
The host compiler is not failing on warnings at present, when the
-E flag is used in buildman. Add the required flag to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com>
Fix comments error in EVENT_DEBUG description:
this get usefui -> this to get useful
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix comments syntax error in event description:
creasted -> created
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix comments syntax error in SPL_LOAD_FIT_APPLY_OVERLAY description.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Instead of always printing ethaddr of MAC 0, print eth%daddr of the current MAC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move all the network information printing into print_eth(),
no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Map fdt_blob and new_fdt to sysmem, otherwise $fdtcontroladdr
and bdinfo output do not match and the bdinfo output address
is not a valid address accessible via sandbox memory accessors.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Variable old_outdir cannot be used before assignment.
The assignment must occur before the try block.
tools/dtoc/test_fdt.py:796:26:
E0601: Using variable 'old_outdir' before assignment
(used-before-assignment)
Add missing space in assignment.
Fixes: a004f29464 ("binman: Tidy up _SetupDtb() to use its own temporary file")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test for the hush shell variable assignment and clear.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The u-boot hush shell doesn’t support the unset command to clear a
variable and therefore an empty value ("c=") should be a valid value
for the set_local_var function to clear the variable. This partial
reverts commit aa72252963 ("common: cli_hush: avoid dead code") and
only checks for a `=` in the string. Additionally explicit call the
unset_local_var function to remove the variable if the value is empty.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
