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arm: dts: fsl-ls1088a: sync PCIe controller definition with Linux
This moves the PCIe controller definitions under /soc and adopts the same bindings (fsl,ls1088a-pcie) as Linux. Previously, the format was different between the two versions. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
This commit is contained in:
Mathew McBride
Peng Fan
parent
c2509a36d3
commit
f365e3cc91
1 changed files with 106 additions and 48 deletions
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@ -81,6 +81,112 @@
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status = "disabled";
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};
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pcie1: pcie@3400000 {
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compatible = "fsl,ls1088a-pcie";
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reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
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<0x20 0x00000000 0x0 0x00002000>; /* configuration space */
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reg-names = "regs", "config";
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interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
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interrupt-names = "aer";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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dma-coherent;
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num-viewport = <256>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
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iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
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};
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pcie_ep1: pcie-ep@3400000 {
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compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
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reg = <0x00 0x03400000 0x0 0x00100000>,
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<0x20 0x00000000 0x8 0x00000000>;
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reg-names = "regs", "addr_space";
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num-ib-windows = <24>;
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num-ob-windows = <256>;
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max-functions = /bits/ 8 <2>;
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status = "disabled";
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};
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pcie2: pcie@3500000 {
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compatible = "fsl,ls1088a-pcie";
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reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
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<0x28 0x00000000 0x0 0x00002000>; /* configuration space */
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reg-names = "regs", "config";
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interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
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interrupt-names = "aer";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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dma-coherent;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
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iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
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};
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pcie_ep2: pcie-ep@3500000 {
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compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
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reg = <0x00 0x03500000 0x0 0x00100000>,
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<0x28 0x00000000 0x8 0x00000000>;
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reg-names = "regs", "addr_space";
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num-ib-windows = <6>;
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num-ob-windows = <6>;
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status = "disabled";
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};
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pcie3: pcie@3600000 {
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compatible = "fsl,ls1088a-pcie";
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reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
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<0x30 0x00000000 0x0 0x00002000>; /* configuration space */
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reg-names = "regs", "config";
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interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
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interrupt-names = "aer";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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dma-coherent;
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num-viewport = <6>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
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<0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
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iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
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};
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pcie_ep3: pcie-ep@3600000 {
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compatible = "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep";
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reg = <0x00 0x03600000 0x0 0x00100000>,
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<0x30 0x00000000 0x8 0x00000000>;
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reg-names = "regs", "addr_space";
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num-ib-windows = <6>;
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num-ob-windows = <6>;
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status = "disabled";
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};
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smmu: iommu@5000000 {
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compatible = "arm,mmu-500";
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reg = <0 0x5000000 0 0x800000>;
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@ -335,54 +441,6 @@
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};
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};
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pcie1: pcie@3400000 {
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compatible = "fsl,ls-pcie", "snps,dw-pcie";
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reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */
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0x00 0x03480000 0x0 0x80000 /* lut registers */
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0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
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0x20 0x00000000 0x0 0x20000>; /* configuration space */
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reg-names = "dbi", "lut", "ctrl", "config";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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num-lanes = <4>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x20 0x00020000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie2: pcie@3500000 {
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compatible = "fsl,ls-pcie", "snps,dw-pcie";
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reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
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0x00 0x03580000 0x0 0x80000 /* lut registers */
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0x00 0x035c0000 0x0 0x40000 /* pf controls registers */
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0x28 0x00000000 0x0 0x20000>; /* configuration space */
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reg-names = "dbi", "lut", "ctrl", "config";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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num-lanes = <4>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x28 0x00020000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie3: pcie@3600000 {
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compatible = "fsl,ls-pcie", "snps,dw-pcie";
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reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
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0x00 0x03680000 0x0 0x80000 /* lut registers */
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0x00 0x036c0000 0x0 0x40000 /* pf controls registers */
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0x30 0x00000000 0x0 0x20000>; /* configuration space */
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reg-names = "dbi", "lut", "ctrl", "config";
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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num-lanes = <8>;
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bus-range = <0x0 0xff>;
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ranges = <0x81000000 0x0 0x00000000 0x30 0x00020000 0x0 0x00010000 /* downstream I/O */
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0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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sata: sata@3200000 {
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compatible = "fsl,ls1088a-ahci";
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reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
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