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k3: pmic: Clear ESM masks

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ESM MCU masks must be set to 0h so that PMIC can handle errors
that require attention for example SYS_SAFETY_ERRn. The required bits
must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK.

If PMIC expected to handle errors, make sure EVM is configured to
connect SOC_SAFETY_ERRz (Main) to the PMIC.

Note that even though the User Guide for TPS65941 for J721E mentions
that these bits are reset to 0h; it is not reflected once board boots to
kernel, possibly due to NVM configurations. Eithercase, it is best to
account for this from R5 SPL side as well.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
This commit is contained in:
Neha Malcom Francis 2023-04-05 16:24:35 +05:30 • committed by Tom Rini
parent 7f30eec177
commit 8048a34376
1 changed files with 9 additions and 0 deletions
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9
drivers/misc/esm_pmic.c
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@ -26,6 +26,9 @@
#define ESM_MCU_EN BIT(6)
#define ESM_MCU_ENDRV BIT(5)
#define ESM_MCU_MASK_REG 0x59
#define ESM_MCU_MASK 0x7
/**
* pmic_esm_probe: configures and enables PMIC ESM functionality
*
@ -48,6 +51,12 @@ static int pmic_esm_probe(struct udevice *dev)
return ret;
}
ret = pmic_reg_write(dev->parent, ESM_MCU_MASK_REG, ESM_MCU_MASK);
if (ret) {
dev_err(dev, "clearing ESM masks failed: %d\n", ret);
return ret;
}
ret = pmic_reg_write(dev->parent, ESM_MCU_START_REG, ESM_MCU_START);
if (ret) {
dev_err(dev, "starting ESM failed: %d\n", ret);