Commit graph

75553 commits

Author SHA1 Message Date
Ricardo Salveti
7ce83854f2 Kconfig: Don't use RSA_FREESCALE_EXP on MX7ULP
The CAAM on IMX7ULP doesn't support public key hardware acceleration
(PKHA), as in other NXP parts. Disable RSA_FREESCALE_EXP for IMX7ULP
too.

Fixed: f4e9ff7135 ("Kconfig: Don't use RSA_FREESCALE_EXP on IMX")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-07 16:53:50 +02:00
Teresa Remmet
42cef89e86 arm: dts: imx8mp: Generate single bootable binary
binman conversion made flashing flash.bin
and u-boot.itb necessary. Update binman config
to create a single flash.bin image again.

This updates imx8mp_evk and phyCORE-i.MX8MP as they share the
same binman config.

Updated also imx8mp_evk documentation.

Tested on phyCORE-i.MX8MP.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-10-07 16:53:50 +02:00
Ying-Chun Liu (PaulLiu)
0f328fcc4c arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size
When purchasing imx8mm-cl-iot-gate it is able to customize the
memory size. It could be 1GB, 2GB and 4GB. We implement
board_phys_sdram_size() to detect the memory size for usage.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2021-10-07 16:53:50 +02:00
Andrey Zhizhikin
d9a6f0eed6 tree: imx: remove old fit generator script
Since derivatives are moving to binman from usage of the FIT generator
script, and considering the warning introduced in f4a43d2925
("Makefile: Warn against using CONFIG_SPL_FIT_GENERATOR"), usage of FIT
generator is discouraged.

Current FIT generator also generates broken output, since commit
3f04db891a ("image: Check for unit addresses in FITs") prohibits using
'@' for unit addresses but the generator script still emits the old
sematics.

Remove the generator script and corresponding call in Makefile, all
derivatives should be migrated to binman in order to provide binary
images.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-07 16:53:50 +02:00
Fabio Estevam
53a24dee86 imx8mm-cl-iot-gate: Split the defconfigs
Currently imx8mm-cl-iot-gate_defconfig fails to produce a working boot
binary due to the lack of fip.bin:

"  BINMAN  all
Image 'main-section' is missing external blobs and is non-functional: blob-ext

Some images are invalid"

To make the build process more consistent with the other i.MX8M targets,
split the defconfig in two:

- imx8mm-cl-iot-gate_defconfig: standard defconfig that only
requires ATF / DDR firmware.

- imx8mm-cl-iot-gate-optee_defconfig: "more advanced" defconfig that
requires ATF / Optee / mbedtls / DDR firmware.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2021-10-07 16:53:50 +02:00
Ricardo Salveti
88f4f50989 mx7ulp: Allow to enable CONFIG_IMX_HAB
Secure boot support on mx7ulp was added in the
commit 27117b2024 ("mx7ulp: Add HAB boot support").

Allow selecting CONFIG_IMX_HAB for ARCH_IMX7ULP.

Fixes: 27117b2024 ("mx7ulp: Add HAB boot support")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-07 16:53:50 +02:00
Ying-Chun Liu (PaulLiu)
5a6af8c19a imx8m: Restrict usable memory based on rom_pointer[0]
When TEE is loaded, we need to restrict the memory usage based
on rom_pointer[0]

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2021-10-07 16:53:50 +02:00
Tim Harvey
0cf5622998 arm: dts: imx8mm-venice*: remove thermal zone overrides
Remove the unnecessary thermal zone overrides.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
Tim Harvey
f8a792e51d board: gateworks: venice: update thermal temp thresholds per cpu grade
Update the passive/critical thermal zone dt config per CPU temperature
grade.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
Tim Harvey
cd7f37666a arm: dts: imx8mm-venice-gw700x: fix mp5416 pmic config
Fix various MP5416 PMIC configurations:
 - Update regulator names per dt-bindings
 - ensure values fit among valid register values
 - add required regulator-max-microamp property
 - add regulator-always-on prop

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
Tim Harvey
45e82c379c board: gateworks: venice: do not overwrite serial#
Do not overwrite existing serial# env to avoid:
 ## Error: Can't overwrite "serial#"
 ## Error inserting "serial#" variable, errno=1

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
Tim Harvey
9e4b38a12a board: gateworks: venice: display hwmon details by default
Display hwmon values by default when using the 'gsc' command.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-07 16:53:50 +02:00
Andrej Rosano
aaac39218d imx53: usbarmory: Add card detect configuration
After the enforcement of DM_MMC the microSD card is not detected. Fix by
correctly configuring the card detect in the devicetree.

Signed-off-by: Andrej Rosano <andrej.rosano@f-secure.com>
2021-10-07 16:53:50 +02:00
Ye Li
f68c897e2d mtd: nand: mxs_nand_spl: Add nand_spl_adjust_offset
Since the mxs_nand_spl has implemented adjust read offset in
nand_spl_load_image, so we don't need to check the bad block in
nand_spl_adjust_offset. Directly return the offset to continue
read by nand_spl_load_image.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-07 16:53:50 +02:00
Ye Li
ae3f752919 arm: imx8m: Fix pad DSE issue for i.MX8MM/MN/MP
According to 8MM/MN/MP reference manual, their pad registers only have
4 valid DSE values. And DSE2 and DSE4 are different with current
definitions in iomux-v3.h. Fix the issue to align with manual.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 16:53:50 +02:00
Ye Li
9b7c349550 mmc: fsl_esdhc_imx: Fix clock disable issue
The SD clock disable is wrapped by MMC_SUPPORTS_TUNING. So it
only works when UHS is enabled. However, in SD initialization the
power cycle does not depends on UHS. But the power cycle needs
disable the SD clock before power down.
So this causes a problem when UHS is not enabled. Some cards can't
become ready (ACMD14 timeout) due to the clock is enabled during
power cycle.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-07 16:53:50 +02:00
Heiko Schocher
deb80ec023 imx: spl: fix imx8m secure boot
cherry-picked from NXP code:
719d665a87c6: ("MLK-20467 imx8m: Fix issue for booting signed image through uuu")

which fixes secure boot on imx8m based boards. Problem was
that FIT header and so IVT header too, was loaded to
memallocated address. So the ivt header address coded
in IVT itself does not fit with the real position.

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
Heiko Schocher
9de3544858 imx: spl: implement spl_load_simple_fit_fix_load
read the address where the IVT header must sit
from IVT image header, loaded from SPL into
an malloced buffer and copy the IVT header
to this address

May make this dependend on SoC ?

Signed-off-by: Heiko Schocher <hs@denx.de>
2021-10-07 16:53:50 +02:00
Heiko Schocher
884ba50a07 spl_fit. add hook to make fixes after fit header is loaded
add hook function spl_load_simple_fit_fix_load()
which is called after fit image header is loaded.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-07 16:53:50 +02:00
Haolin Li
7d4541cdfb mtd: nand: Fix typo in MXC Kconfig symbol description
Trivial typo fix.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2021-10-07 16:53:50 +02:00
Tom Rini
ea67f467a4 Merge branch '2021-10-06-assorted-improvements'
- Use better values for ACPI OEM_VERSION
- Assorted NAND related Kconifg migrations and another dependency fix
2021-10-06 13:46:31 -04:00
Tom Rini
6115f1c4fe Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in
include/linux/mtd/omap_gpmc.h for valid ECC schemes.  Make which one we
will use be a choice statement, enumerating the ones which we have
implemented.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
Tom Rini
871fd508fc Convert CONFIG_SYS_NAND_U_BOOT_LOCATIONS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_U_BOOT_LOCATIONS
   CONFIG_SYS_NAND_U_BOOT_OFFS

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
Tom Rini
53f06134ed Convert CONFIG_NAND_FSL_ELBC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_FSL_ELBC
   CONFIG_NAND_FSL_IFC

Note that a number of PowerPC platforms had previously enabled
CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer
enable the option, reducing the size of a few functions.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
Tom Rini
b2e25afabd Convert CONFIG_SYS_NAND_MAX_CHIPS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_MAX_CHIPS

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
Tom Rini
1cefed1e39 nand.h: Cleanup linux/mtd/rawnand.h usage
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward
declaration of struct nand_chip, so do that directly.  Then, include
<linux/mtd/rawnand.h> where required directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
c0ad62c5f7 Convert CONFIG_SYS_NAND_ONFI_DETECTION to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_ONFI_DETECTION

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
4884d829d7 Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_5_ADDR_CYCLE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
9d9f59dd0a Convert CONFIG_SYS_NAND_BAD_BLOCK_POS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_BAD_BLOCK_POS

In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS
as those are the only valid values.  Use LARGE as the default as no
in-tree boards use SMALL, but it is possible.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
606c377849 nand_spl_simple: Drop CONFIG_SYS_NAND_4_ADDR_CYCLE support
This code is unused, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
8db73ec106 Convert CONFIG_SYS_NAND_PAGE_COUNT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_PAGE_COUNT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
a0de075392 Convert CONFIG_SPL_NAND_LOAD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NAND_LOAD
   CONFIG_SYS_NAND_BLOCK_SIZE
   CONFIG_SYS_NAND_PAGE_SIZE
   CONFIG_SYS_NAND_OOBSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
Tom Rini
ccdc7cfbdc Convert CONFIG_NAND_LPC32XX_MLC to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_LPC32XX_MLC

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:15:14 -04:00
Tom Rini
d73b9e67ed m53menlo: Switch to deriving CONFIG_SYS_NAND_PAGE_COUNT
Typically platforms will define CONFIG_SYS_NAND_PAGE_COUNT based on
CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE.  Switch to this
in preparation for migrating CONFIG_SYS_NAND namespace to Kconfig.

Cc: Marek Vasut <marex@denx.de>
Cc: Olaf Mandel <o.mandel@menlosystems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:15:14 -04:00
Tom Rini
c25ca9060a rk3308: Remove unused NAND defines
These platforms do not currently enable NAND, remove these references.

Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:15:14 -04:00
Oleksandr Suvorov
d4f05b3198 lib: rsa: fix dependency for SPL_RSA_VERIFY
SPL_RSA_VERIFY requires SPL_RSA to be enabled. Add correct
dependency.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-06 09:15:14 -04:00
Pali Rohár
a3423b3f23 acpi: Use U-Boot version for OEM_REVISION
OEM_REVISION is 32-bit unsigned number. It should be increased only when
changing software version. Therefore it should not depend on build time.

Change calculation to use U-Boot version numbers and set this revision
to date number.

Prior this change OEM_REVISION was calculated from build date and stored in
the same format.

After this change macro U_BOOT_BUILD_DATE is not used in other files so
remove it from global autogenerated files and also from Makefile.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-06 09:15:14 -04:00
Tom Rini
7240e1b8f9 Merge branch '2021-10-05-general-updates'
- Assorted OPTEE cleanups
- pinctrl, gpio improvements, assorted livetree migrations
- Assorted pytest improvements
2021-10-05 17:16:23 -04:00
Patrick Delaunay
c3ef4550a2 reboot-mode: migrate uclass to livetree
Use dev_ function to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Patrick Delaunay
455f2d15bf demo: migrate uclass to livetree
Use dev_ function to read the sides and colour to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Patrick Delaunay
e2170c29ee remoteproc: migrate uclass to livetree
Use dev_ function to read the name and boolean to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Simon Glass
5f8cefb7b1 doc: test: Explain how to run pytests in parallel
Add documentation for this so people can try it out. At present it does
not fully work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Simon Glass
17d1fe1c44 test: Allow tpm2 tests to run in parallel
These tests currently run in a particular sequence, with some of them
depending on the actions of earlier tests.

Add a check for sandbox and reset to a known state at the start of each
test, so that all tests can run in parallel.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Simon Glass
ea3164eeb0 test: Allow hush tests to run in parallel
The -z tests don't really need to be part of the main set. Separate them
out so we can drop the test setup/cleans functions and thus run all tests
in parallel.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Simon Glass
cfb83f3666 test: Allow vboot tests to run in parallel
Update the tests to use separate working directories, so we can run them
in parallel. It also makes it possible to see the individual output files
after the tests have completed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Alexandru Gagniuc
01e1e2a966 test/py: Check hashes produced by mkimage against known values
Target code and mkimage share the same hashing infrastructure. If one
is wrong, it's very likely that both are wrong in the same way. Thus
testing won't catch hash regressions. This already happened in
commit 92055e138f ("image: Drop if/elseif hash selection in
calculate_hash()"). None of the tests caught that CRC32 was broken.

Instead of testing hash_calculate() against itself, create a FIT with
containing a kernel with pre-calculated hashes. Then check the hashes
produced against the known good hashes.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Samuel Holland
8a47982ed8 gpio: Factor out DT flag translation
The generic GPIO flags binding is shared across many drivers, some of
which need their own xlate function. Factor out the flag translation
code from gpio_xlate_offs_flags so it does not need to be duplicated.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Samuel Holland
37c10bf7ef gpio: Verify validity of pin offsets from device trees
Translation of an OF GPIO specifier should fail if the pin offset is
larger than the number of pins in the GPIO bank.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Samuel Holland
390ccffe07 gpio: Verify validity of pin offsets when looking up names
Translation of a pin name to a device+offset should fail if the offset
is larger than the number of pins in the GPIO bank.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
Alexandru Gagniuc
c5b68ef8af arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee
This config is only used by three boards with this SOC. Most other
platforms derive this information from devicetree, and are unlikely
to ever need this config.

Moreover, it is confusing when Kconfig asks for this value under
"Support OPTEE images", but does not do anything with the value.
Move it to imx7 for those boards who still make use of it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05 08:50:14 -04:00