Commit graph

14012 commits

Author SHA1 Message Date
Patrick Delaunay
77b8cfef53 lmb: move CONFIG_LMB in Kconfig
Migrate CONFIG_LMB in Kconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22 14:09:45 -04:00
Peter Robinson
9db428904f ARM: imx: udoo_neo: convert to DM_MMC
Convert UDOO Neo to use DM MMC.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-04-20 13:31:35 -04:00
Peter Robinson
7942b9444d ARM: board: udoo_neo: Import UDOO Neo dts files
Import the i.MX6SX based UDOO Neo dts files from Linux 5.12-rc1
and sync the i.MX6SX pinfunc.h

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-04-20 13:31:35 -04:00
Joel Peshkin
4e9bce1243 Add support for stack-protector
Add support for stack protector for UBOOT, SPL, and TPL
as well as new pytest for stackprotector

Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>

Adjust UEFI build flags.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-20 07:31:12 -04:00
Andre Przywara
1238d0143a arm: highbank: Do DRAM init from DT
So far U-Boot was hard coding a (surely sufficient) memory size of 512
MB, even though all machines out there have at least 4GB of DRAM.
Since U-Boot uses its memory knowledge to populate the EFI memory map,
we are missing out here, at best losing everything beyond 4GB on Midway
boxes (which typically come with 8GB of DRAM).

Since the management processor populated the DT memory node already with
the detected DRAM size and configuration, we use that to populate
U-Boot's memory bank information, which is the base for the UEFI memory
map.
This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we
had in place to avoid U-Boot messing up the DT memory node before
loading the kernel.

Also, to cover the whole of memory, we need to enable PHYS_64BIT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-20 07:31:12 -04:00
Andre Przywara
debb07bf10 net: calxedagmac: Convert to DM_ETH
To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.

This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-04-20 07:31:12 -04:00
Andre Przywara
109552d773 arm: highbank: Enable OF_CONTROL
All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:

Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-20 07:31:12 -04:00
Wasim Khan
504f8648f0 arch: arm: update Kconfig to select IRQ when GIC_V3_ITS is enabled
GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select
IRQ when GIC_V3_ITS is enabled.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-04-20 07:31:12 -04:00
Hou Zhiqiang
6f6876a0c0 arm64: gic-v3-its: Clear the Pending table before enabling LPIs
The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables
must contain only zeros on initial allocation, and this must be visible
to the Redistributors, or else the effect is UNPREDICTABLE".

And as the following statement, we here clear the whole Pending tables
instead of the first 1KB.
"An LPI Pending table that contains only zeros, including in the first 1KB,
indicates that there are no pending LPIs.
The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However,
if the first 1KB of the LPI Pending table and the rest of the table contain
only zeros, this must indicate that there are no pending LPIs."

And there isn't any pending LPI under U-Boot, so it's unnecessary to
load the contents of the Pending table during the enablement, then set
the GICR_PENDBASER.PTZ flag.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # NXP LS1028A
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-20 07:31:12 -04:00
Neil Armstrong
c8dd2ad696 arm: dts: meson-khadas-vim3: enable PCIe in U-boot
Enable PCIe by default in u-boot, this should eventually be made dynamic
in the runtime board config depending on the MCU configuration.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-04-20 07:30:04 -04:00
Stefan Agner
30d083d226 arm64: dts: meson: odroidc2: readd PHY reset properties
The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some
ODROID-C2. The PHY seems to need proper reset timing to be functional
in U-Boot and Linux afterwards. Readd the old PHY reset bindings for
dwmac until we support the new bindings in the PHY node.

Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-04-20 07:30:04 -04:00
Tom Rini
5fa1e2ffeb Second set of u-boot-atmel features for 2021.07 cycle
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Merge tag 'u-boot-atmel-2021.07-b' of https://source.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features for 2021.07 cycle:

This small feature set include support for 5th PIO bank on pio4 pinctrl
driver and a fix for the SPL on sama5d3.
2021-04-19 11:34:17 -04:00
Alexandru Gagniuc
58b504e5e1 Revert "spl: Drop bd_info in the data section"
This reverts commit 38d6b7ebda.

struct global_data contains a pointer to the bd_info structure. This
pointer was populated spl_set_bd() to a pre-allocated bd_info in the
".data" section. The referenced commit replaced this mechanism to one
that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y.
which very few boards do.

The result is that (struct global_data)->bd is NULL in SPL on most
platforms. This breaks falcon mode, since arch_fixup_fdt() tries to
access (struct global_data)->bd and set the "/memory" node in the
devicetree. The result is that the "/memory" node contains garbage
values, causing linux to panic() as it sets up the page table.

Instead of trying to fix the mess, potentially causing other issues,
revert to the code that worked, while this change is reworked.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-04-19 11:34:01 -04:00
Manuel Reis
b0080ae1bb ARM: dts: at91: sama5d3: add u-boot properties to sama5d3 pit timer
in the early SPL boot stage whenever there is a call to udelay,
dm_timer_init fails to find the pit timer whenever it traverses
the device tree, if this property is not present

Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
CC: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-04-19 10:38:52 +03:00
Eugen Hristev
53d7664711 ARM: dts: at91: sama7g5: change pinctrl compatible to sama7g5
Change the pinctrl compatible to sama7g5, the right one for this product.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-04-19 10:38:49 +03:00
Tom Rini
c6ae5e9869 Merge https://source.denx.de/u-boot/custodians/u-boot-usb
This is a patchset which makes away with the .bind() controller indexing
workaround which was broken since before v2021.04, and then adds PHY
support and MX8M support on top of that. Better add it into the release
early to get as much testing as possible done, because this really does
a lot of changes to the ehci-mx6 driver.
2021-04-18 08:46:58 -04:00
Tom Rini
2fbc804715 Merge tag 'ti-v2021.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Support for pinmux status command on beaglebone
- Updates for MMC speed modes for J721e-evm
- Fix MMC booting on omap35_logic_somlv board
2021-04-18 08:46:39 -04:00
Marek Vasut
d78f7d8199 ARM: dts: imx8mn: Add power domain nodes
Add power domain nodes to DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-04-18 04:29:36 +02:00
Marek Vasut
f0e10e33e5 ARM: dts: imx8mm: Add power domain nodes
Add power domain nodes to DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-04-18 04:29:35 +02:00
Marek Vasut
5781f465f5 ARM: dts: imx8mn: Replace deprecated fsl,usbphy DT props with phys
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-04-18 04:29:35 +02:00
Marek Vasut
aded940f4f ARM: dts: imx8mm: Replace deprecated fsl,usbphy DT props with phys
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-04-18 04:29:35 +02:00
Marek Vasut
c7eb5d2c2e ARM: dts: k2g-evm: Use standard compatible string for USB no-op PHY
The standard compatible string is "usb-nop-xceiv", use it.
Note that keystone-k2g.dtsi already uses the aforementioned
compat string, so this patch can only remove the override.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-04-18 04:29:35 +02:00
Aswath Govindraju
e64665fa72 arm: dts: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.

Also, update the itap delay values for all the MMCSD subsystems according
the latest J721e data sheet[2]

[1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
[2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf

Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-04-16 19:09:24 +05:30
Tom Rini
7cb977fd51 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
This adds support for devices with R40 dual rank DRAM, and asymmetric
A64 DRAM devices like the Pinephone/3GB.
Also we enable automatic gzipped kernel support, and allow scripted
DT overlay support. The rest of the patches are cleanups, but also
some sunxi-specific preparatory patches for USB3.0 and improved HDMI
support. The bulk of those changes will go through other trees, though.

Build-tested for all 156 sunxi boards, and boot tested on a A64, A20, R40,
H5, H6 and H616 board. USB, SD card, eMMC, HDMI and Ethernet all work
there (where applicable), with the exception of Ethernet on the H5. Since
this is already broken in v2021.04, I will send a separate fix.
2021-04-16 08:30:25 -04:00
Jernej Skrabec
599177ed51 sunxi: video: select dw-hdmi in Kconfig, not Makefile
Currently sunxi Makefile manually specifies full path to dw-hdmi common
code. However, that is not needed because it can be selected in Kconfig
instead.

Select proper symbol in Kconfig and drop path from Makefile.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Samuel Holland
925cd8d77e sunxi: binman: Do not hardcode U-Boot load address
The FIT description has access to the configuration variables. Use the
appropriate variable instead of hardcoding the address.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Samuel Holland
ed4bc13f3d sunxi: binman: Respect the default FIT configuration
binman can fill in the default FIT configuration index as selected by
the "default-dt" argument, which is set to CONFIG_DEFAULT_DEVICE_TREE.
Let's respect the user's configuration by taking advantage of this
feature, instead of always defaulting to the first device tree in
CONFIG_OF_LIST.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:59 +01:00
Icenowy Zheng
a5ff6f5c72 sunxi: enable dual rank memory on R40
Previously we do not have proper dual rank memory detection on R40
(because we omitted PIR_QSGATE, which does not work on R40 with our
configuration), and dual rank memory is just simply disabled as early
R40 boards available (Banana Pi M2 Ultra and Berry) have single rank
memory.

As a board with dual rank memory (Forlinx OKA40i-C) is now known to us,
we need to have a way to do memory rank detection to support that board.

Add some routine to detect memory rank by trying to access the memory
in rank 1 and check for error status of the memory controller, and then
enable dual rank memory on R40.

Similar routine can be used to detect half DQ width (which is also
detected by PIR_QSGATE on other SoCs), but it's left unimplemented
because there's no known R40 board with half DQ width now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: Move R40 detect code call into sunxi_dram_init()]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:58 +01:00
Icenowy Zheng
e9dfd8e960 sunxi: support asymmetric dual rank DRAM on A64/R40
Previously we have known that R40 has a configuration register for its
rank 1, which allows different configuration than rank 0. Reverse
engineering of newest libdram of A64 from Allwinner shows that A64 has
this register too. It's bit 0 (which enables dual rank in rank 0
configuration register) means a dedicated rank size setup is used for
rank 1.

Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB
rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank
DRAM support necessary.

Add this support. The code could support both A64 and R40, but because
dual rank detection is broken on R40 now, we cannot really use it on R40
currently.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-04-16 01:12:58 +01:00
Tom Rini
a6232e065d Merge branch '2021-04-14-assorted-vboot-improvements'
- Add ECDSA support to FIT images
- Improve FIT image loadables (incl fpga) support
- Further FIT improvements with SPL
2021-04-15 17:10:25 -04:00
Tom Rini
45b3cf88da Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
update ls1028aqds networking protocol, config in ls1021atwr, env in ls1012a
Add seli3 board support, booke watchdog, update eTSEC support in ppc-qemu
Add DM_SERIAL and lpuart in sl28, add DM_ETH support for some of powerpc platforms

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 13:11:19 -04:00
Michael Walle
9b3843f8f7 board: sl28: add config to enable console output on SER0
Sometimes it is desireable to have the console output on the first
serial line. Introduce a configuration option for it (in the board
scope).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
6d1ab4a10e board: sl28: enable DM_SERIAL
With all preparations in place, switch over to DM_SERIAL.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
356a3384d0 board: sl28: move DM_* configs to Kconfig
Move the CONFIG_DM_* from the defconfig to the TARGET_SL28 config.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
918c72f3f2 armv8: fsl-layerscape: spl: call spl_early_init()
DM_SERIAL needs both the device tree as well as an early heap. Thus, we
have to call spl_early_init() to initialize the memory allocator and the
setup the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Michael Walle
019438e4fd armv8: fsl-layerscape: spl: add debug UART support
To use the debug UART we have to call debug_uart_init() in the SPL. Do
so as soon as possible.

As an example, here is how you can use it on a LS1028A SoC:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0x21c0500
CONFIG_DEBUG_UART_CLOCK=200000000

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:22 +05:30
Aleksandar Gerasimovski
91ee54741e board/km: add support for seli8 design based on nxp ls102x
The SELI8 design is a new tdm service unit card for Hitachi-Powergrids
XMC and FOX product lines.

It is based on NXP LS1021 SoC and it provides following interfaces:
 - IFC interface for NOR, NAND and external FPGA's
 - 1 x RGMII ETH for debug purposes
 - 2 x SGMII ETH for management communication via back-plane
 - 1 x uQE HDLC for management communication via back-plane
 - 1 x I2C for peripheral devices
 - 1 x SPI for peripheral devices
 - 1 x UART for debug logging

It is foreseen that the design will be later re-used for another XMC and
FOX service cards with similar SoC requirements.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Alex Marginean
a7fdac7e2a arm: dts: ls1028a: define QDS networking protocol combinations
Includes DT definition for the following serdes protocols using various
PHY cards: 85xx, 13xx, 65xx, 9999, 7777.

Note that the default device tree for QDS now uses 85xx.
Enabling any of the others requires patching the fsl-ls1028a-qds.dtsi
file (the includes at the bottom of the file).

The phy-handle is specified as a path rather than a label because it is
possible to use the #include multiple times (meaning that more than one
PHY riser card of one type is inserted), and therefore, there would be
duplicate labels with the same name.

LBRW means that the board needs lane B rework before using this dtsi.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Sean Anderson
d442f69399 common: fit: Add weak board_fit_config_name_match
Several architectures had a default board_fit_config_name_match already;
this provides a generic weak version. We default to rejecting all configs.
This will use the FIT's default config, instead of the first config. This
may result in boot failures if there are multiple configurations and the
first config is *not* the default.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2021-04-14 15:23:01 -04:00
Biju Das
3e5f3dbe3a arm: mach-rmobile: Add CPU info support for RZ/G2
Add CPU info support for RZ/G2 SoC's.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-04-13 23:36:25 +02:00
Peter Robinson
bedab97a21 Tegra: remove e2220-1170 board
It's an old bringup board with out upstream Linux or L4T support

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2021-04-12 17:17:11 -04:00
Heinrich Schuchardt
0ca7c4d964 bootm: do not hang on failure
On ARMv8 systems

    load mmc 0:1 $loadaddr  vmlinuz-5.10.0-3-arm64
    booti

leads to a hanging system requiring to physically reset the system:

    FDT and ATAGS support not compiled in - hanging
    ### ERROR ### Please RESET the board ###

For systems where physical access is difficult hanging is a poor choice.
It is preferable to reset the system when U-Boot reaches a state that is
not recoverable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12 17:17:11 -04:00
Tom Rini
3b676a1662 Merge branch '2021-04-11-remove-non-migrated-boards'
- Remove a large number of boards that have not migrated to DM_MMC, for
  which the migration deadline with 2 years ago at v2019.04.
2021-04-11 14:11:05 -04:00
Tom Rini
c6a4ee2aae - rk3399 eDP support
- pwm backlight without a known period_ns
  - add Chrome OS EC PWM driver
  - Kconfig SIMPLE_PANEL DM_GPIO dependency
  - remove mb862xx driver remnants
  - fix KiB format in reserve_video() debug trace
  - fix tegra124 sor CSTM LVDS_EN_ENABLE/DISABLE config
  - fix line padding calculation for 16 and 24 BPP bitmaps
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Merge tag 'video-2021-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-video

 - rk3399 eDP support
 - pwm backlight without a known period_ns
 - add Chrome OS EC PWM driver
 - Kconfig SIMPLE_PANEL DM_GPIO dependency
 - remove mb862xx driver remnants
 - fix KiB format in reserve_video() debug trace
 - fix tegra124 sor CSTM LVDS_EN_ENABLE/DISABLE config
 - fix line padding calculation for 16 and 24 BPP bitmaps
2021-04-11 07:40:25 -04:00
Tom Rini
4bbcec08eb arm: Remove mx6dlarm2 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
178d70b5b3 arm: Remove cgtqmx6eval board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
defd0dcfb9 arm: Remove titanium board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
80b386abe3 arm: Remove ts4800 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
4d24862848 arm: Remove mx53evk board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:30 -04:00
Tom Rini
397a43dc56 arm: Remove pfla02 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:30 -04:00