Commit graph

1312 commits

Author SHA1 Message Date
Tom Rini
7755b22007 - MTRR fixes for x86 boards
- Add a little more info to 'cbsysinfo' command
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Merge tag 'x86-pull-20230801' of https://source.denx.de/u-boot/custodians/u-boot-x86

- MTRR fixes for x86 boards
- Add a little more info to 'cbsysinfo' command
2023-08-01 11:57:55 -04:00
Nikhil M Jain
b8d3a6c7d1 drivers: video: tidss: tidss_drv: Use kconfig VIDEO_REMOVE to remove video
Perform removal of DSS if kconfigs VIDEO_REMOVE or SPL_VIDEO_REMOVE is
set by user. Otherwise if above Kconfigs are not selected, it is assumed
that user wants splash screen to be displayed until linux kernel boots
up. In such scenario, leave the power domain of DSS as "on" so that
splash screen stays intact until kernel boots up.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-08-01 13:41:02 +02:00
Nikhil M Jain
3f9b5a7ffa drivers: video: tidss: tidss_drv: Change remove method
Change remove method of DSS video driver to disable video port instead
of performing a soft reset, as soft reset takes longer duration. Video
port is disabled by setting enable bit of video port to 0.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-08-01 13:40:07 +02:00
Bin Meng
e1a0cafcfb video: bochs: Set the frame buffer size per configuration
At present the uclass stored frame buffer size is set to a hard
coded value, but we can calculate the correct value based on what
is configured.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:35:39 +02:00
Bin Meng
f91f0e74df video: kconfig: Set default FB size for Bochs
Set up a default frame buffer size of 8MiB for Bochs for non-x86
architecturs as PCI is normally not enumerated before relocation
on these architectures.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 13:34:51 +02:00
Bin Meng
185ae84af0 video: kconfig: Drop the superfluous dependency
PCI is always selected by X86 architecture hence "X86 && PCI" does
not make it better.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:34:05 +02:00
Bin Meng
17cd80237b video: kconfig: Fix wrong text for the PCI default FB size
There is an example in the VIDEO_PCI_DEFAULT_FB_SIZE help text to
tell people how to calculate its value but the resolution given
does not match the value. Fix it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 13:33:05 +02:00
Bin Meng
e1b46977de video: bochs: Remove the x86 dependency
Now that the driver is legacy free, remove the x86 dependency so
that it can be used on non-x86 architectures.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:32:25 +02:00
Bin Meng
ffe1c8379e video: bochs: Avoid using IO instructions to access VGA IO port
At present the driver uses IO instructions to access the legacy
VGA IO ports, which unfortunately limits the driver to work only
on x86. It turns out the IO instruction is not necessary as Bochs
VGA card remaps the legacy VGA IO ports (0x3c0 -> 0x3df) to its
memory mapped register space from offset 0x400.

Update the driver to use MMIO access for VGA IO port.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:31:29 +02:00
Bin Meng
caae795a1c video: bochs: Drop the useless argument of bochs_vga_write()
bochs_vga_write() takes 'index' as one argument, but never uses it.

While we are here, use macros instead of magic numbers for the
VGA IO port register name and value.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:30:41 +02:00
Bin Meng
5ee029a190 video: bochs: Drop inclusion of <asm/mtrr.h>
The driver does not call any MTRR APIs.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:29:14 +02:00
Bin Meng
08ece5b3ec dm: video: Cosmetic style fix
Some coding convention fixes for video_post_bind().

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-08-01 13:28:59 +02:00
Bin Meng
bff002d45b video: vesa: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Bin Meng
0f497b2b8c video: ivybridge: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Bin Meng
b5126f26d0 video: broadwell: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:

- mtrr_commit() will re-initialize all MTRR registers from index 0,
  using the settings previously added by mtrr_add_request() and saved
  in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
  has full control with MTRR programming (e.g.: U-Boot without any blob
  that does all low-level initialization on its own, or using FSP2 which
  does not touch MTRR), but this is not the case with FSP. FSP programs
  some MTRRs during its execution but U-Boot does not have the settings
  saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
  corrupt what was already programmed previously.

Correct this to use mtrr_set_next_var() instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-01 10:06:46 +08:00
Ondrej Jirman
0825522eea video: rockchip: Add support for RK3399 to dw-mipi-dsi bridge
This just needs some extra clocks enabled, and different registers
configured. Copied from Linux, just like the original submitter
of this driver did for rk3568.

Tested on Pinephone Pro.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Nikhil M Jain
63e73a13e9 drivers: video: Kconfig: Add config remove video
This is required since user may want to either call the remove method
of video driver and reset the display or not call the remove method
to continue displaying until next stage.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-21 15:32:12 -04:00
Nikhil M Jain
5bc610a7d9 common: board_f: Pass frame buffer info from SPL to u-boot
U-boot proper can use frame buffer address passed from SPL to reserve
the memory area used by framebuffer set in SPL so that splash image
set in SPL continues to get displayed while u-boot proper is running.

Put the framebuffer address and size in a bloblist to make them
available at u-boot proper, if in u-boot proper CONFIG_VIDEO is defined.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-21 15:32:12 -04:00
Nikhil M Jain
ccd21ee50e include: video: Reserve video using blob
Add method to reserve video framebuffer information using blob,
received from previous stage.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-21 15:32:12 -04:00
Tom Rini
13aa090b87 Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- bootstd: Add a bootmeth for ChromiumOS on x86
- x86: Use qemu-x86_64 to boot EFI installers
2023-07-17 10:38:28 -04:00
Simon Glass
e2d934b4da x86: video: Add a driver for QEMU bochs emulation
Bochs is convenient with QEMU on x86 since it does not require a video
BIOS. Add a driver for it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17 17:23:15 +08:00
Tom Rini
aa817dfcaf - fix video console default font selection
- add panel driver for HannStar HSD060BHW4
  - fix backlight pwm integer overflow in duty
    cycle calculation
  - fix dw_mipi_dsi hsync/vsync settings
  - various other fixes for rockchip dw_mipi_dsi
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Merge tag 'video-20230714' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix video console default font selection
 - add panel driver for HannStar HSD060BHW4
 - fix backlight pwm integer overflow in duty
   cycle calculation
 - fix dw_mipi_dsi hsync/vsync settings
 - various other fixes for rockchip dw_mipi_dsi
2023-07-16 16:31:18 -04:00
Simon Glass
04f3dcd503 video: Update stb_truetype
This was brought in in 2016 and a number of changes have been made since
then. There does not seem to be much change in functionality, but it is
a good idea to update from time to time.

Bring in the latest version:

   5736b15 ("re-add perlin noise again")

Add a few necessary functions, with dummies in some cases. Update the tests
as there are subtle changes in rendering, perhaps not for the better.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:51 -04:00
Simon Glass
2d6ee92c6a video: Use enum with video_index_to_colour()
Use the provided enum with this function, so it is clearer what should be
passed to it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:51 -04:00
Simon Glass
b828ed7d79 console: Allow measuring the bounding box of text
For laying out text accurately it is necessary to know the width and
height of the text. Add a measure() method to the console API, so this
can be supported.

Add an implementation for truetype and a base implementation for the
normal console.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:51 -04:00
Simon Glass
648a4991d0 video: Allow temporary colour changes
It is sometimes necessary to highlight some text in a different colour.
Add an easy way to do this and then restore the original console colours.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:51 -04:00
Simon Glass
a8f80409b0 console: Correct truetype spacing error
The putc_xy() method is supposed to return the amount of space used. The
existing implementation erroneously adds the previous sub-pixel position
to the returned value. This spaces out the characters very slightly more
than it should. It is seldom noticeable but it does make accurate
measurement of the text impossible.

Fix this minor but long-standing bug.

Fixes: a29b012037 ("video: Add a console driver that uses TrueType fonts")

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:51 -04:00
Simon Glass
0ab4f91a10 video: Provide a way to clear part of the console
This is useful when the background colour must be written before text
is updated, to avoid strange display artifacts.

Add a function for this, using the existing code from the truetype
console.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:50 -04:00
Simon Glass
7432f68c53 video: Drop #ifdefs from console_truetype
Use if() instead to reduce the number of build paths.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-14 12:54:50 -04:00
Ondrej Jirman
bd6375c551 video: rockchip: dw_mipi_dsi: Fix GRF access
Use proper register base and access method to access GRF registers.
GRF registers start at a completely different base, and need special
access method, that sets the change mask in the 16 MSBs.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:30:58 +02:00
Ondrej Jirman
7c5f278a03 video: rockchip: dw_mipi_dsi: Correct check for lacking phy phandle
If phy is not defined in DT (eg. on rk3399), generic_phy_get_by_name
will return -ENODATA. Handle that case correctly.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:29:11 +02:00
Ondrej Jirman
dc3f2403c2 video: rockchip: dw_mipi_dsi: Fix best_rate calculation
pllref_clk is unused after being retrieved. fin needs to be set
to dsi->ref clock's rate for the following calculation to work.
Otherwise fin is undefined, and calculation return bogus number
based on undefined variable.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:27:43 +02:00
Ondrej Jirman
4158d7f987 video: rockchip: dw_mipi_dsi: Return 0 from dsi_phy_init on success
ret is undefined if external phy is not used resulting in bogus
error being returned in that scenario.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:25:09 +02:00
Ondrej Jirman
14dd77fdc4 video: rockchip: dw_mipi_dsi: Fix error path checks in probe function
Wrong return codes were checked in several places. Check the proper ones.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:23:40 +02:00
Ondrej Jirman
b7d8d40346 video: rockchip: dw_mipi_dsi: Fix external phy existence check
&priv->phy is always true. Compiler warns about this loudly.

Use a propper check for phy device allocation. Without this fix
using this driver with SoC that doesn't use external phy (eg. RK3399)
doesn't work.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:19:08 +02:00
Ondrej Jirman
e62f2a622b video: dw_mipi_dsi: Fix hsync/vsync settings
These must be read from timings->flags, like other DSI HOST drivers do.

And they must not be inverted either. Low means low.

Without this fix, panel drivers that set *SYNC_LOW produce corrupted
output on screen (shifted horizontally and vertically by back porch
distance).

Signed-off-by: Ondrej Jirman <megi@xff.cz>
2023-07-14 18:17:43 +02:00
Ondrej Jirman
f4c7efe011 video: rockchip: vop: Fix whitespace
Fix confusing use of indentation.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-14 18:15:01 +02:00
Matthias Schiffer
533ad9dcda video: backlight: pwm: avoid integer overflow in duty cycle calculation
The intermediate value could overflow for large periods and levels.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-14 18:12:37 +02:00
Ondrej Jirman
6a0b888580 video: hx8394: Add panel driver for hannstar,hsd060bhw4
The driver is for panels based on the Himax HX8394 controller, such as the
HannStar HSD060BHW4 720x1440 TFT LCD panel that uses a MIPI-DSI interface.
This panel is used in Pinephone Pro.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
2023-07-14 18:10:05 +02:00
Ondrej Jirman
7a2fee8d29 video: console: Fix default font selection
Some callers expect to call this with NULL font name to select the
default font (eg. boot/scene.c). Without handling the NULL condition
U-Boot crashes instead of displaying a bootflow GUI menu.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
2023-07-14 18:07:31 +02:00
Michal Simek
322c0da86a video: zynqmp: Enable 1024x768 resolution
Add support for 1024x768 60p resolution and set it up this resolution by
default. This resolution is still able to use only one GT line. But for
example 800x600 60p has some issues with settings. That's why extend this
table by tested resolutions.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/957e1e85a05744326ec2606dadc1af6e69976f37.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:02 +02:00
Venkatesh Yadav Abbarapu
a29f44d631 video: zynqmp: Driver for Xilinx ZynqMP DisplayPort Subsystem
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, blender, an audio mixer and a
DisplayPort source controller (transmitter). The DisplayPort controller can
source data from memory (non-live input) or the stream (live input). The
DisplayPort controller is responsible for managing the link and physical
layer functionality. The controller packs audio/video data into transfer
units and sends them over the main link. The link rate and lane counts can
be selected based on the application bandwidth requirements. The
DisplayPort pipeline consists of the DisplayPort direct memory access (DMA)
for fetching data from memory. The DisplayPort DMA controller (DPDMA)
supports up to six input channels as non-live input.

This driver supports the DisplayPort Subsystem and implements
1)640x480 resolution
2)RGBA8888 32bpp format
3)DPDMA channel 3 for Graphics
4)Non-live input
5)Fixed 5.4G link rate
6)Tested on ZCU102 board

There will be additional work to configure GT lines based on DT, higher
resolutions, support for more compressed video formats, spliting code to
more files, add support for EDID, audio support, using clock framework for
all clocks and in general code clean up.

Codevelop-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5c1567b63d0280dacc7efba2998857c399c25358.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Venkatesh Yadav Abbarapu
c4865e1632 video: move zynqmp files to subdirectory
Place zynqmp files and headers in custom driver subdirectory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9aae6d217f0673c310818e3de38bb239c79c060c.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Michal Simek
f6de01d6af video: bmp: Support rgba8888 pixel format
Adding the support for RGBA8888 format for BMP decoding.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/322910eb24692f6140a001796501270eb1c53d9a.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
Michal Simek
e9500ba9e0 video: Add support for RGBA8888 format
Add support for RGBA8888 32bpp format where pixels are picked in
32-bit integers, where the colors are stored in memory such that
R is at lowest address, G after that, B after that, and A last.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa1de54b7d4ff46df6858f76d52634e0c5c71a4a.1684312924.git.michal.simek@amd.com
2023-06-12 13:25:01 +02:00
John Keeping
03972ff671 video: tweak CONFIG_SPL_VIDEO description
Make it clear that this is the SPL option to avoid potential confusion
when the description for CONFIG_SPL_VIDEO is the same as that for
CONFIG_VIDEO.

Signed-off-by: John Keeping <john@metanate.com>
2023-05-15 17:14:46 -04:00
Johan Jonker
a12a73b664 drivers: use dev_read_addr_ptr when cast to pointer
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-06 17:28:18 +08:00
Svyatoslav Ryhel
def72d5c62 video: panel: add generic endeavoru panel
Family of panels used by HTC in One X. Though were used variants
at least from 3 vendors, this driver provides generic support for
all of them.

Tested-by: Ion Agorria <ion@agorria.com> # HTC One X T30 Sony
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Sharp
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-26 07:35:57 +02:00
Svyatoslav Ryhel
d8cca91380 video: tegra: add DC based PWM backlight driver
DC based PWM backlight is found on some T20 and T30 devices
(HTC One X). This backlight is controlled by Tegra DC and
is adjustable by the DC PM0 or PM1 signal.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # HTC One X T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-26 07:32:25 +02:00
Svyatoslav Ryhel
6d9b3a7e83 video: panel: add Renesas R69328 MIPI DSI panel driver
Driver adds support for panels with Renesas R69328 IC

Currently supported compatible is:
- jdi,dx12d100vm0eaa

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-26 07:29:12 +02:00